# Common Reference

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<a href="https://rocm.blogs.amd.com/software-tools-optimization/compute-memory-modes/README.html" class="card-header-link">
  <h2 class="card-header">GPU Partitioning</h2>
</a>
<p class="paragraph">Learn how to split the compute units and memory to partition a GPU.</p>
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<a href="../gpu-arch/gpu-arch.html" class="card-header-link">
  <h2 class="card-header">Instinct Micro-architecture</h2>
</a>
<p class="paragraph">Review hardware aspects of the AMD Instinct™ MI350, MI300, MI200 and MI100 series of GPU accelerators.</p>
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<a href="https://rocm.docs.amd.com/projects/HIP/en/latest/index.html" class="card-header-link">
  <h2 class="card-header">HIP C++</h2>
</a>
<p class="paragraph">Learn about HIP programming model.</p>
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<a href="https://rocm.docs.amd.com/projects/llvm-project/en/latest/conceptual/openmp.html" class="card-header-link">
  <h2 class="card-header">OpenMP</h2>
</a>
<p class="paragraph">Explore the OpenMP programming model.</p>
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<a href="https://docs.amd.com/v/u/en-US/ug1729-amd-instinct-accelerators" class="card-header-link">
  <h2 class="card-header">AMD Technical Information Portal</h2>
</a>
<p class="paragraph"> Additional NDA technical documentation, software, and design collateral for AMD Instinct products;
Login Required </p>
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