amdsmi.h Source File

amdsmi.h Source File#

AMD SMI: amdsmi.h Source File
amdsmi.h
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1 /*
2  * Copyright (c) Advanced Micro Devices, Inc. All rights reserved.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a copy
5  * of this software and associated documentation files (the "Software"), to deal
6  * in the Software without restriction, including without limitation the rights
7  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
8  * copies of the Software, and to permit persons to whom the Software is
9  * furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
17  * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
19  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
20  * THE SOFTWARE.
21  */
22 
23 #ifndef __AMDSMI_H__
24 #define __AMDSMI_H__
25 
31 #ifndef __KERNEL__
32 #include <stdint.h>
33 #include <stdbool.h>
34 #include <stddef.h>
35 #endif
36 
44 typedef enum {
45  AMDSMI_INIT_ALL_PROCESSORS = 0xFFFFFFFF,
46  AMDSMI_INIT_AMD_CPUS = (1 << 0),
47  AMDSMI_INIT_AMD_GPUS = (1 << 1),
48  AMDSMI_INIT_NON_AMD_CPUS = (1 << 2),
49  AMDSMI_INIT_NON_AMD_GPUS = (1 << 3),
50  AMDSMI_INIT_AMD_APUS = (AMDSMI_INIT_AMD_CPUS | AMDSMI_INIT_AMD_GPUS)
52 } amdsmi_init_flags_t;
53 
59 typedef void *amdsmi_processor_handle;
60 typedef void *amdsmi_socket_handle;
61 
70 typedef enum {
71  AMDSMI_STATUS_SUCCESS = 0,
72  // Library usage errors
73  AMDSMI_STATUS_INVAL = 1,
74  AMDSMI_STATUS_NOT_SUPPORTED = 2,
75  AMDSMI_STATUS_NOT_YET_IMPLEMENTED = 3,
76  AMDSMI_STATUS_FAIL_LOAD_MODULE = 4,
77  AMDSMI_STATUS_FAIL_LOAD_SYMBOL = 5,
78  AMDSMI_STATUS_DRM_ERROR = 6,
79  AMDSMI_STATUS_API_FAILED = 7,
80  AMDSMI_STATUS_TIMEOUT = 8,
81  AMDSMI_STATUS_RETRY = 9,
82  AMDSMI_STATUS_NO_PERM = 10,
83  AMDSMI_STATUS_INTERRUPT = 11,
84  AMDSMI_STATUS_IO = 12,
85  AMDSMI_STATUS_ADDRESS_FAULT = 13,
86  AMDSMI_STATUS_FILE_ERROR = 14,
87  AMDSMI_STATUS_OUT_OF_RESOURCES = 15,
88  AMDSMI_STATUS_INTERNAL_EXCEPTION = 16,
89  AMDSMI_STATUS_INPUT_OUT_OF_BOUNDS = 17,
90  AMDSMI_STATUS_INIT_ERROR = 18,
91  AMDSMI_STATUS_REFCOUNT_OVERFLOW = 19,
92  AMDSMI_STATUS_DIRECTORY_NOT_FOUND = 20,
93  // Processor related errors
94  AMDSMI_STATUS_BUSY = 30,
95  AMDSMI_STATUS_NOT_FOUND = 31,
96  AMDSMI_STATUS_NOT_INIT = 32,
97  AMDSMI_STATUS_NO_SLOT = 33,
98  AMDSMI_STATUS_DRIVER_NOT_LOADED = 34,
99  // Data and size errors
100  AMDSMI_STATUS_MORE_DATA = 39,
101  AMDSMI_STATUS_NO_DATA = 40,
102  AMDSMI_STATUS_INSUFFICIENT_SIZE = 41,
103  AMDSMI_STATUS_UNEXPECTED_SIZE = 42,
104  AMDSMI_STATUS_UNEXPECTED_DATA = 43,
105  //esmi errors
106  AMDSMI_STATUS_NON_AMD_CPU = 44,
107  AMDSMI_STATUS_NO_ENERGY_DRV = 45,
108  AMDSMI_STATUS_NO_MSR_DRV = 46,
109  AMDSMI_STATUS_NO_HSMP_DRV = 47,
110  AMDSMI_STATUS_NO_HSMP_SUP = 48,
111  AMDSMI_STATUS_NO_HSMP_MSG_SUP = 49,
112  AMDSMI_STATUS_HSMP_TIMEOUT = 50,
113  AMDSMI_STATUS_NO_DRV = 51,
114  AMDSMI_STATUS_FILE_NOT_FOUND = 52,
115  AMDSMI_STATUS_ARG_PTR_NULL = 53,
116  AMDSMI_STATUS_AMDGPU_RESTART_ERR = 54,
117  AMDSMI_STATUS_SETTING_UNAVAILABLE = 55,
118  AMDSMI_STATUS_CORRUPTED_EEPROM = 56,
119  // General errors
120  AMDSMI_STATUS_MAP_ERROR = 0xFFFFFFFE,
121  AMDSMI_STATUS_UNKNOWN_ERROR = 0xFFFFFFFF,
122 } amdsmi_status_t;
123 
133 typedef enum {
134  AMDSMI_PROCESSOR_TYPE_UNKNOWN = 0,
135  AMDSMI_PROCESSOR_TYPE_AMD_GPU,
136  AMDSMI_PROCESSOR_TYPE_AMD_CPU,
137  AMDSMI_PROCESSOR_TYPE_NON_AMD_GPU,
138  AMDSMI_PROCESSOR_TYPE_NON_AMD_CPU,
139  AMDSMI_PROCESSOR_TYPE_AMD_CPU_CORE,
140  AMDSMI_PROCESSOR_TYPE_AMD_APU
141 } processor_type_t;
142 
148 #define AMDSMI_MAX_NUM_XGMI_PHYSICAL_LINK 64
149 #define AMDSMI_MAX_NUM_PM_POLICIES 32
150 #define AMDSMI_MAX_CONTAINER_TYPE 2
151 
157 #define AMDSMI_MAX_MM_IP_COUNT 8
158 #define AMDSMI_MAX_DEVICES 32
159 #define AMDSMI_MAX_STRING_LENGTH 256
160 #define AMDSMI_MAX_CACHE_TYPES 10
161 #define AMDSMI_MAX_CP_PROFILE_RESOURCES 32
162 #define AMDSMI_MAX_ACCELERATOR_PARTITIONS 8
163 #define AMDSMI_MAX_ACCELERATOR_PROFILE 32
164 #define AMDSMI_MAX_NUM_NUMA_NODES 32
165 #define AMDSMI_GPU_UUID_SIZE 38
166 
172 #define MAX_NUMBER_OF_AFIDS_PER_RECORD 12
173 
179 #define AMDSMI_MAX_VF_COUNT 32
180 #define AMDSMI_MAX_DRIVER_NUM 2
181 #define AMDSMI_DFC_FW_NUMBER_OF_ENTRIES 9
182 #define AMDSMI_MAX_WHITE_LIST_ELEMENTS 16
183 #define AMDSMI_MAX_BLACK_LIST_ELEMENTS 64
184 #define AMDSMI_MAX_UUID_ELEMENTS 16
185 #define AMDSMI_MAX_TA_WHITE_LIST_ELEMENTS 8
186 #define AMDSMI_MAX_ERR_RECORDS 10
187 #define AMDSMI_MAX_PROFILE_COUNT 16
188 
194 #define AMDSMI_TIME_FORMAT "%02d:%02d:%02d.%03d"
195 #define AMDSMI_DATE_FORMAT "%04d-%02d-%02d:%02d:%02d:%02d.%03d"
196 
202 typedef enum {
203  AMDSMI_MEMORY_PARTITION_UNKNOWN = 0,
204  AMDSMI_MEMORY_PARTITION_NPS1 = 1,
206  AMDSMI_MEMORY_PARTITION_NPS2 = 2,
209  AMDSMI_MEMORY_PARTITION_NPS4 = 4,
212  AMDSMI_MEMORY_PARTITION_NPS8 = 8,
217 } amdsmi_memory_partition_type_t;
218 
224 typedef enum {
225  AMDSMI_ACCELERATOR_PARTITION_INVALID = 0,
226  AMDSMI_ACCELERATOR_PARTITION_SPX,
228  AMDSMI_ACCELERATOR_PARTITION_DPX,
230  AMDSMI_ACCELERATOR_PARTITION_TPX,
232  AMDSMI_ACCELERATOR_PARTITION_QPX,
234  AMDSMI_ACCELERATOR_PARTITION_CPX,
236  AMDSMI_ACCELERATOR_PARTITION_MAX
237 } amdsmi_accelerator_partition_type_t;
238 
244 typedef enum {
245  AMDSMI_VRAM_TYPE_UNKNOWN = 0,
246  // HBM
247  AMDSMI_VRAM_TYPE_HBM = 1,
248  AMDSMI_VRAM_TYPE_HBM2 = 2,
249  AMDSMI_VRAM_TYPE_HBM2E = 3,
250  AMDSMI_VRAM_TYPE_HBM3 = 4,
251  AMDSMI_VRAM_TYPE_HBM3E = 5,
252  // DDR
253  AMDSMI_VRAM_TYPE_DDR2 = 10,
254  AMDSMI_VRAM_TYPE_DDR3 = 11,
255  AMDSMI_VRAM_TYPE_DDR4 = 12,
256  // GDDR
257  AMDSMI_VRAM_TYPE_GDDR1 = 17,
258  AMDSMI_VRAM_TYPE_GDDR2 = 18,
259  AMDSMI_VRAM_TYPE_GDDR3 = 19,
260  AMDSMI_VRAM_TYPE_GDDR4 = 20,
261  AMDSMI_VRAM_TYPE_GDDR5 = 21,
262  AMDSMI_VRAM_TYPE_GDDR6 = 22,
263  AMDSMI_VRAM_TYPE_GDDR7 = 23,
264 } amdsmi_vram_type_t;
265 
271 typedef enum {
272  AMDSMI_ACCELERATOR_XCC,
273  AMDSMI_ACCELERATOR_ENCODER,
274  AMDSMI_ACCELERATOR_DECODER,
275  AMDSMI_ACCELERATOR_DMA,
276  AMDSMI_ACCELERATOR_JPEG,
277  AMDSMI_ACCELERATOR_MAX
278 } amdsmi_accelerator_partition_resource_type_t;
279 
285 typedef enum {
286  AMDSMI_CLK_TYPE_SYS = 0x0,
287  AMDSMI_CLK_TYPE_FIRST = AMDSMI_CLK_TYPE_SYS,
288  AMDSMI_CLK_TYPE_GFX = AMDSMI_CLK_TYPE_SYS,
289  AMDSMI_CLK_TYPE_DF,
291  AMDSMI_CLK_TYPE_DCEF,
293  AMDSMI_CLK_TYPE_SOC,
294  AMDSMI_CLK_TYPE_MEM,
295  AMDSMI_CLK_TYPE_PCIE,
296  AMDSMI_CLK_TYPE_VCLK0,
297  AMDSMI_CLK_TYPE_VCLK1,
298  AMDSMI_CLK_TYPE_DCLK0,
299  AMDSMI_CLK_TYPE_DCLK1,
300  AMDSMI_CLK_TYPE__MAX = AMDSMI_CLK_TYPE_DCLK1
301 } amdsmi_clk_type_t;
302 
309 typedef enum {
310  AMDSMI_TEMPERATURE_TYPE_EDGE,
311  AMDSMI_TEMPERATURE_TYPE_FIRST = AMDSMI_TEMPERATURE_TYPE_EDGE,
312  AMDSMI_TEMPERATURE_TYPE_HOTSPOT,
313  AMDSMI_TEMPERATURE_TYPE_JUNCTION = AMDSMI_TEMPERATURE_TYPE_HOTSPOT,
314  AMDSMI_TEMPERATURE_TYPE_VRAM,
315  AMDSMI_TEMPERATURE_TYPE_HBM_0,
316  AMDSMI_TEMPERATURE_TYPE_HBM_1,
317  AMDSMI_TEMPERATURE_TYPE_HBM_2,
318  AMDSMI_TEMPERATURE_TYPE_HBM_3,
319  AMDSMI_TEMPERATURE_TYPE_PLX,
320  AMDSMI_TEMPERATURE_TYPE__MAX = AMDSMI_TEMPERATURE_TYPE_PLX
321 } amdsmi_temperature_type_t;
322 
329 typedef enum {
330  AMDSMI_TEMP_CURRENT = 0x0,
331  AMDSMI_TEMP_FIRST = AMDSMI_TEMP_CURRENT,
332  AMDSMI_TEMP_MAX,
333  AMDSMI_TEMP_MIN,
334  AMDSMI_TEMP_MAX_HYST,
336  AMDSMI_TEMP_MIN_HYST,
338  AMDSMI_TEMP_CRITICAL,
340  AMDSMI_TEMP_CRITICAL_HYST,
342  AMDSMI_TEMP_EMERGENCY,
346  AMDSMI_TEMP_EMERGENCY_HYST,
348  AMDSMI_TEMP_CRIT_MIN,
350  AMDSMI_TEMP_CRIT_MIN_HYST,
352  AMDSMI_TEMP_OFFSET,
354  AMDSMI_TEMP_LOWEST,
355  AMDSMI_TEMP_HIGHEST,
356  AMDSMI_TEMP_SHUTDOWN,
357  AMDSMI_TEMP_LAST = AMDSMI_TEMP_SHUTDOWN
358 } amdsmi_temperature_metric_t;
359 
365 typedef enum {
366  AMDSMI_CARD_FORM_FACTOR_PCIE,
367  AMDSMI_CARD_FORM_FACTOR_OAM,
368  AMDSMI_CARD_FORM_FACTOR_CEM,
369  AMDSMI_CARD_FORM_FACTOR_UNKNOWN
370 } amdsmi_card_form_factor_t;
371 
377 typedef enum {
378  AMDSMI_LINK_TYPE_INTERNAL = 0,
379  AMDSMI_LINK_TYPE_PCIE = 1,
380  AMDSMI_LINK_TYPE_XGMI = 2,
381  AMDSMI_LINK_TYPE_NOT_APPLICABLE = 3,
382  AMDSMI_LINK_TYPE_UNKNOWN = 4
383 } amdsmi_link_type_t;
384 
390 typedef enum {
391  AMDSMI_CACHE_PROPERTY_ENABLED = 0x00000001,
392  AMDSMI_CACHE_PROPERTY_DATA_CACHE = 0x00000002,
393  AMDSMI_CACHE_PROPERTY_INST_CACHE = 0x00000004,
394  AMDSMI_CACHE_PROPERTY_CPU_CACHE = 0x00000008,
395  AMDSMI_CACHE_PROPERTY_SIMD_CACHE = 0x00000010
396 } amdsmi_cache_property_type_t;
397 
403 typedef enum {
404  AMDSMI_GPU_BLOCK_INVALID = 0,
405  AMDSMI_GPU_BLOCK_FIRST = (1ULL << 0),
406  AMDSMI_GPU_BLOCK_UMC = AMDSMI_GPU_BLOCK_FIRST,
407  AMDSMI_GPU_BLOCK_SDMA = (1ULL << 1),
408  AMDSMI_GPU_BLOCK_GFX = (1ULL << 2),
409  AMDSMI_GPU_BLOCK_MMHUB = (1ULL << 3),
410  AMDSMI_GPU_BLOCK_ATHUB = (1ULL << 4),
411  AMDSMI_GPU_BLOCK_PCIE_BIF = (1ULL << 5),
412  AMDSMI_GPU_BLOCK_HDP = (1ULL << 6),
413  AMDSMI_GPU_BLOCK_XGMI_WAFL = (1ULL << 7),
414  AMDSMI_GPU_BLOCK_DF = (1ULL << 8),
415  AMDSMI_GPU_BLOCK_SMN = (1ULL << 9),
416  AMDSMI_GPU_BLOCK_SEM = (1ULL << 10),
417  AMDSMI_GPU_BLOCK_MP0 = (1ULL << 11),
418  AMDSMI_GPU_BLOCK_MP1 = (1ULL << 12),
419  AMDSMI_GPU_BLOCK_FUSE = (1ULL << 13),
420  AMDSMI_GPU_BLOCK_MCA = (1ULL << 14),
421  AMDSMI_GPU_BLOCK_VCN = (1ULL << 15),
422  AMDSMI_GPU_BLOCK_JPEG = (1ULL << 16),
423  AMDSMI_GPU_BLOCK_IH = (1ULL << 17),
424  AMDSMI_GPU_BLOCK_MPIO = (1ULL << 18),
425  AMDSMI_GPU_BLOCK_LAST = AMDSMI_GPU_BLOCK_MPIO,
426  AMDSMI_GPU_BLOCK_RESERVED = (1ULL << 63)
427 } amdsmi_gpu_block_t;
428 
435 typedef enum {
436  AMDSMI_FW_ID_SMU = 1,
438  AMDSMI_FW_ID_FIRST = AMDSMI_FW_ID_SMU,
439  AMDSMI_FW_ID_CP_CE,
440  AMDSMI_FW_ID_CP_PFP,
441  AMDSMI_FW_ID_CP_ME,
442  AMDSMI_FW_ID_CP_MEC_JT1,
443  AMDSMI_FW_ID_CP_MEC_JT2,
444  AMDSMI_FW_ID_CP_MEC1,
445  AMDSMI_FW_ID_CP_MEC2,
446  AMDSMI_FW_ID_RLC,
447  AMDSMI_FW_ID_SDMA0,
448  AMDSMI_FW_ID_SDMA1,
449  AMDSMI_FW_ID_SDMA2,
450  AMDSMI_FW_ID_SDMA3,
451  AMDSMI_FW_ID_SDMA4,
452  AMDSMI_FW_ID_SDMA5,
453  AMDSMI_FW_ID_SDMA6,
454  AMDSMI_FW_ID_SDMA7,
455  AMDSMI_FW_ID_VCN,
456  AMDSMI_FW_ID_UVD,
457  AMDSMI_FW_ID_VCE,
458  AMDSMI_FW_ID_ISP,
459  AMDSMI_FW_ID_DMCU_ERAM,
460  AMDSMI_FW_ID_DMCU_ISR,
461  AMDSMI_FW_ID_RLC_RESTORE_LIST_GPM_MEM,
462  AMDSMI_FW_ID_RLC_RESTORE_LIST_SRM_MEM,
463  AMDSMI_FW_ID_RLC_RESTORE_LIST_CNTL,
464  AMDSMI_FW_ID_RLC_V,
465  AMDSMI_FW_ID_MMSCH,
466  AMDSMI_FW_ID_PSP_SYSDRV,
467  AMDSMI_FW_ID_PSP_SOSDRV,
468  AMDSMI_FW_ID_PSP_TOC,
469  AMDSMI_FW_ID_PSP_KEYDB,
470  AMDSMI_FW_ID_DFC,
471  AMDSMI_FW_ID_PSP_SPL,
472  AMDSMI_FW_ID_DRV_CAP,
473  AMDSMI_FW_ID_MC,
474  AMDSMI_FW_ID_PSP_BL,
475  AMDSMI_FW_ID_CP_PM4,
476  AMDSMI_FW_ID_RLC_P,
477  AMDSMI_FW_ID_SEC_POLICY_STAGE2,
478  AMDSMI_FW_ID_REG_ACCESS_WHITELIST,
479  AMDSMI_FW_ID_IMU_DRAM,
480  AMDSMI_FW_ID_IMU_IRAM,
481  AMDSMI_FW_ID_SDMA_TH0,
482  AMDSMI_FW_ID_SDMA_TH1,
483  AMDSMI_FW_ID_CP_MES,
484  AMDSMI_FW_ID_MES_KIQ,
485  AMDSMI_FW_ID_MES_STACK,
486  AMDSMI_FW_ID_MES_THREAD1,
487  AMDSMI_FW_ID_MES_THREAD1_STACK,
488  AMDSMI_FW_ID_RLX6,
489  AMDSMI_FW_ID_RLX6_DRAM_BOOT,
490  AMDSMI_FW_ID_RS64_ME,
491  AMDSMI_FW_ID_RS64_ME_P0_DATA,
492  AMDSMI_FW_ID_RS64_ME_P1_DATA,
493  AMDSMI_FW_ID_RS64_PFP,
494  AMDSMI_FW_ID_RS64_PFP_P0_DATA,
495  AMDSMI_FW_ID_RS64_PFP_P1_DATA,
496  AMDSMI_FW_ID_RS64_MEC,
497  AMDSMI_FW_ID_RS64_MEC_P0_DATA,
498  AMDSMI_FW_ID_RS64_MEC_P1_DATA,
499  AMDSMI_FW_ID_RS64_MEC_P2_DATA,
500  AMDSMI_FW_ID_RS64_MEC_P3_DATA,
501  AMDSMI_FW_ID_PPTABLE,
502  AMDSMI_FW_ID_PSP_SOC,
503  AMDSMI_FW_ID_PSP_DBG,
504  AMDSMI_FW_ID_PSP_INTF,
505  AMDSMI_FW_ID_RLX6_CORE1,
506  AMDSMI_FW_ID_RLX6_DRAM_BOOT_CORE1,
507  AMDSMI_FW_ID_RLCV_LX7,
508  AMDSMI_FW_ID_RLC_SAVE_RESTORE_LIST,
509  AMDSMI_FW_ID_ASD,
510  AMDSMI_FW_ID_TA_RAS,
511  AMDSMI_FW_ID_TA_XGMI,
512  AMDSMI_FW_ID_XGMI,
513  AMDSMI_FW_ID_RLC_SRLG,
514  AMDSMI_FW_ID_RLC_SRLS,
515  AMDSMI_FW_ID_PM,
516  AMDSMI_FW_ID_SMC,
517  AMDSMI_FW_ID_DMCU,
518  AMDSMI_FW_ID_PSP_RAS,
519  AMDSMI_FW_ID_P2S_TABLE,
520  AMDSMI_FW_ID_PLDM_BUNDLE,
521  AMDSMI_FW_ID__MAX
522 } amdsmi_fw_block_t;
523 
532 typedef enum {
533  AMDSMI_VIRTUALIZATION_MODE_UNKNOWN = 0,
534  AMDSMI_VIRTUALIZATION_MODE_BAREMETAL,
535  AMDSMI_VIRTUALIZATION_MODE_HOST,
536  AMDSMI_VIRTUALIZATION_MODE_GUEST,
537  AMDSMI_VIRTUALIZATION_MODE_PASSTHROUGH
538 } amdsmi_virtualization_mode_t;
539 
545 typedef enum {
546  AMDSMI_AFFINITY_SCOPE_NODE,
547  AMDSMI_AFFINITY_SCOPE_SOCKET
548 } amdsmi_affinity_scope_t;
549 
555 typedef enum {
556  AMDSMI_LINK_STATUS_ENABLED = 0,
557  AMDSMI_LINK_STATUS_DISABLED = 1,
558  AMDSMI_LINK_STATUS_INACTIVE = 2,
559  AMDSMI_LINK_STATUS_ERROR = 3
560 } amdsmi_link_status_t;
561 
567 typedef union {
568  struct bdf_ {
569  uint64_t function_number : 3;
570  uint64_t device_number : 5;
571  uint64_t bus_number : 8;
572  uint64_t domain_number : 48;
573  } bdf;
574  struct {
575  uint64_t function_number : 3;
576  uint64_t device_number : 5;
577  uint64_t bus_number : 8;
578  uint64_t domain_number : 48;
579  };
580  uint64_t as_uint;
581 } amdsmi_bdf_t;
582 
588 typedef struct {
589  struct pcie_static_ {
590  uint16_t max_pcie_width;
591  uint32_t max_pcie_speed;
592  uint32_t pcie_interface_version;
593  amdsmi_card_form_factor_t slot_type;
594  uint32_t max_pcie_interface_version;
595  uint64_t reserved[9];
596  } pcie_static;
597  struct pcie_metric_ {
598  uint16_t pcie_width;
599  uint32_t pcie_speed;
600  uint32_t pcie_bandwidth;
601  uint64_t pcie_replay_count;
602  uint64_t pcie_l0_to_recovery_count;
603  uint64_t pcie_replay_roll_over_count;
604  uint64_t pcie_nak_sent_count;
605  uint64_t pcie_nak_received_count;
606  uint32_t pcie_lc_perf_other_end_recovery_count;
607  uint64_t reserved[12];
608  } pcie_metric;
609  uint64_t reserved[32];
610 } amdsmi_pcie_info_t;
611 
617 typedef struct {
618  uint32_t num_links;
619  struct _links {
620  amdsmi_bdf_t bdf;
621  uint32_t bit_rate;
622  uint32_t max_bandwidth;
623  amdsmi_link_type_t link_type;
624  uint64_t read;
625  uint64_t write;
626  amdsmi_link_status_t link_status;
627  uint64_t reserved[1];
628  } links[AMDSMI_MAX_NUM_XGMI_PHYSICAL_LINK];
629  uint64_t reserved[7];
630 } amdsmi_link_metrics_t;
631 
637 typedef struct {
638  uint64_t power_cap;
639  uint64_t default_power_cap;
640  uint64_t dpm_cap;
641  uint64_t min_power_cap;
642  uint64_t max_power_cap;
643  uint64_t reserved[3];
644 } amdsmi_power_cap_info_t;
645 
651 typedef struct {
652  char name[AMDSMI_MAX_STRING_LENGTH];
653  char build_date[AMDSMI_MAX_STRING_LENGTH];
654  char part_number[AMDSMI_MAX_STRING_LENGTH];
655  char version[AMDSMI_MAX_STRING_LENGTH];
656  char boot_firmware[AMDSMI_MAX_STRING_LENGTH];
657  uint64_t reserved[36];
658 } amdsmi_vbios_info_t;
659 
665 typedef struct {
666  char market_name[AMDSMI_MAX_STRING_LENGTH];
667  uint32_t vendor_id;
668  char vendor_name[AMDSMI_MAX_STRING_LENGTH];
669  uint32_t subvendor_id;
670  uint64_t device_id;
671  uint32_t rev_id;
672  char asic_serial[AMDSMI_MAX_STRING_LENGTH];
673  uint32_t oam_id;
674  uint32_t num_of_compute_units;
675  uint64_t target_graphics_version;
676  uint32_t subsystem_id;
677  uint32_t reserved[21];
678 } amdsmi_asic_info_t;
679 
685 typedef struct {
686  uint64_t socket_power;
687  uint32_t current_socket_power;
688  uint32_t average_socket_power;
689  uint64_t gfx_voltage;
690  uint64_t soc_voltage;
691  uint64_t mem_voltage;
692  uint32_t power_limit;
693  uint64_t reserved[18];
694 } amdsmi_power_info_t;
695 
701 typedef struct {
702  char driver_version[AMDSMI_MAX_STRING_LENGTH];
703  char driver_date[AMDSMI_MAX_STRING_LENGTH];
704  char driver_name[AMDSMI_MAX_STRING_LENGTH];
705  uint64_t reserved[64];
706 } amdsmi_driver_info_t;
707 
713 typedef struct {
714  amdsmi_vram_type_t vram_type;
715  char vram_vendor[AMDSMI_MAX_STRING_LENGTH];
716  uint64_t vram_size;
717  uint32_t vram_bit_width;
718  uint64_t vram_max_bandwidth;
719  uint64_t reserved[37];
720 } amdsmi_vram_info_t;
721 
731 typedef struct {
732  uint32_t gfx_activity;
733  uint32_t umc_activity;
734  uint32_t mm_activity;
735  uint32_t reserved[13];
736 } amdsmi_engine_usage_t;
737 
743 typedef struct {
744  uint32_t clk;
745  uint32_t min_clk;
746  uint32_t max_clk;
747  uint8_t clk_locked;
748  uint8_t clk_deep_sleep;
749  uint32_t reserved[4];
750 } amdsmi_clk_info_t;
751 
757 typedef struct {
758  uint64_t correctable_count;
759  uint64_t uncorrectable_count;
760  uint64_t deferred_count;
761  uint64_t reserved[5];
762 } amdsmi_error_count_t;
763 
769 typedef union {
770  struct nps_flags_{
771  uint32_t nps1_cap :1;
772  uint32_t nps2_cap :1;
773  uint32_t nps4_cap :1;
774  uint32_t nps8_cap :1;
775  uint32_t reserved :28;
776  } nps_flags;
777  uint32_t nps_cap_mask;
778 } amdsmi_nps_caps_t;
779 
786 typedef struct {
787  amdsmi_nps_caps_t partition_caps;
788  amdsmi_memory_partition_type_t mp_mode;
789  uint32_t num_numa_ranges;
790  struct numa_range_{
791  amdsmi_vram_type_t memory_type;
792  uint64_t start;
793  uint64_t end;
794  } numa_range[AMDSMI_MAX_NUM_NUMA_NODES];
795  uint64_t reserved[11];
796 } amdsmi_memory_partition_config_t;
797 
803 typedef struct {
804  amdsmi_accelerator_partition_type_t profile_type;
805  uint32_t num_partitions;
806  amdsmi_nps_caps_t memory_caps;
807  uint32_t profile_index;
808  uint32_t num_resources;
809  uint32_t resources[AMDSMI_MAX_ACCELERATOR_PARTITIONS][AMDSMI_MAX_CP_PROFILE_RESOURCES];
810  uint64_t reserved[13];
811 } amdsmi_accelerator_partition_profile_t;
812 
819 typedef struct {
820  uint32_t profile_index;
821  amdsmi_accelerator_partition_resource_type_t resource_type;
822  uint32_t partition_resource;
823  uint32_t num_partitions_share_resource;
824  uint64_t reserved[6];
825 } amdsmi_accelerator_partition_resource_profile_t;
826 
832 typedef struct {
833  uint32_t num_profiles;
834  uint32_t num_resource_profiles;
835  amdsmi_accelerator_partition_resource_profile_t resource_profiles[AMDSMI_MAX_CP_PROFILE_RESOURCES];
836  uint32_t default_profile_index;
837  amdsmi_accelerator_partition_profile_t profiles[AMDSMI_MAX_ACCELERATOR_PROFILE];
838  uint64_t reserved[30];
839 } amdsmi_accelerator_partition_profile_config_t;
840 
846 typedef struct {
847  char model_number[AMDSMI_MAX_STRING_LENGTH];
848  char product_serial[AMDSMI_MAX_STRING_LENGTH];
849  char fru_id[AMDSMI_MAX_STRING_LENGTH];
850  char product_name[AMDSMI_MAX_STRING_LENGTH];
851  char manufacturer_name[AMDSMI_MAX_STRING_LENGTH];
852  uint64_t reserved[64];
853 } amdsmi_board_info_t;
854 
860 typedef struct {
861  uint8_t is_iolink_coherent;
862  uint8_t is_iolink_atomics_32bit;
863  uint8_t is_iolink_atomics_64bit;
864  uint8_t is_iolink_dma;
865  uint8_t is_iolink_bi_directional;
866 } amdsmi_p2p_capability_t;
867 
873 typedef struct {
874  uint32_t num_cache_types;
875  struct cache_ {
876  uint32_t cache_properties;
877  uint32_t cache_size;
878  uint32_t cache_level;
879  uint32_t max_num_cu_shared;
880  uint32_t num_cache_instance;
881  uint32_t reserved[3];
882  } cache[AMDSMI_MAX_CACHE_TYPES];
883  uint32_t reserved[15];
884 } amdsmi_gpu_cache_info_t;
885 
891 typedef struct {
892  uint8_t num_fw_info;
893  struct {
894  amdsmi_fw_block_t fw_id;
895  uint64_t fw_version;
896  uint64_t reserved[2];
897  } fw_info_list[AMDSMI_FW_ID__MAX];
898  uint32_t reserved[7];
899 } amdsmi_fw_info_t;
900 
906 typedef struct {
907  uint32_t policy_id;
908  char policy_description[AMDSMI_MAX_STRING_LENGTH];
909 } amdsmi_dpm_policy_entry_t;
910 
918 typedef struct {
919  uint32_t num_supported;
920  uint32_t current;
921  amdsmi_dpm_policy_entry_t policies[AMDSMI_MAX_NUM_PM_POLICIES];
922 } amdsmi_dpm_policy_t;
923 
929 typedef struct {
930  uint32_t ras_eeprom_version;
932  uint32_t ecc_correction_schema_flag;
935 } amdsmi_ras_feature_t;
936 
942 typedef enum {
943  AMDSMI_CPER_SEV_NON_FATAL_UNCORRECTED = 0,
944  AMDSMI_CPER_SEV_FATAL = 1,
945  AMDSMI_CPER_SEV_NON_FATAL_CORRECTED = 2,
946  AMDSMI_CPER_SEV_NUM = 3,
947  AMDSMI_CPER_SEV_UNUSED = 10
948 } amdsmi_cper_sev_t;
949 
955 typedef enum {
956  AMDSMI_CPER_NOTIFY_TYPE_CMC = 0x450eBDD72DCE8BB1,
957  AMDSMI_CPER_NOTIFY_TYPE_CPE = 0x4a55D8434E292F96,
958  AMDSMI_CPER_NOTIFY_TYPE_MCE = 0x4cc5919CE8F56FFE,
959  AMDSMI_CPER_NOTIFY_TYPE_PCIE = 0x4dfc1A16CF93C01F,
960  AMDSMI_CPER_NOTIFY_TYPE_INIT = 0x454a9308CC5263E8,
961  AMDSMI_CPER_NOTIFY_TYPE_NMI = 0x42c9B7E65BAD89FF,
962  AMDSMI_CPER_NOTIFY_TYPE_BOOT = 0x409aAB403D61A466,
963  AMDSMI_CPER_NOTIFY_TYPE_DMAR = 0x4c27C6B3667DD791,
964  AMDSMI_CPER_NOTIFY_TYPE_SEA = 0x11E4BBE89A78788A,
965  AMDSMI_CPER_NOTIFY_TYPE_SEI = 0x4E87B0AE5C284C81,
966  AMDSMI_CPER_NOTIFY_TYPE_PEI = 0x4214520409A9D5AC,
967  AMDSMI_CPER_NOTIFY_TYPE_CXL_COMPONENT = 0x49A341DF69293BC9
968 } amdsmi_cper_notify_type_t;
969 
970 #pragma pack(push, 1)
971 
977 typedef struct {
978  unsigned char b[16];
979 } amdsmi_cper_guid_t;
980 
981 typedef struct {
982  uint8_t seconds;
983  uint8_t minutes;
984  uint8_t hours;
985  uint8_t flag;
986  uint8_t day;
987  uint8_t month;
988  uint8_t year;
989  uint8_t century;
990 } amdsmi_cper_timestamp_t;
991 
992 typedef union {
993  struct valid_bits_ {
994  uint32_t platform_id : 1;
995  uint32_t timestamp : 1;
996  uint32_t partition_id : 1;
997  uint32_t reserved : 29;
998  } valid_bits;
999  uint32_t valid_mask;
1000 } amdsmi_cper_valid_bits_t;
1001 
1002 typedef struct {
1003  char signature[4];
1004  uint16_t revision;
1005  uint32_t signature_end;
1006  uint16_t sec_cnt;
1007  amdsmi_cper_sev_t error_severity;
1008  amdsmi_cper_valid_bits_t cper_valid_bits;
1009  uint32_t record_length;
1010  amdsmi_cper_timestamp_t timestamp;
1011  char platform_id[16];
1012  amdsmi_cper_guid_t partition_id;
1013  char creator_id[16];
1014  amdsmi_cper_guid_t notify_type;
1015  char record_id[8];
1016  uint32_t flags;
1017  uint64_t persistence_info;
1018  uint8_t reserved[12];
1019 } amdsmi_cper_hdr_t;
1020 
1021 #pragma pack(pop)
1027 #define SMI_VERSION_ALPHA_0 0x00000002
1028 #define SMI_VERSION_BETA_0 0x00000003
1029 #define SMI_VERSION_BETA_1 0x00000004
1030 #define SMI_VERSION_BETA_2 0x00000005
1031 #define SMI_VERSION_BETA_3 0x00000006
1032 #define SMI_VERSION_BETA_4 0x00000007
1033 
1041 #define AMDSMI_MASK_ALL (~0ULL)
1042 
1044 #define AMDSMI_MASK_DEFAULT ((1ULL << 62) - 1)
1045 
1047 #define AMDSMI_MASK_INIT (0ULL)
1048 
1050 #define AMDSMI_MASK_HIGH_AND_MED_SEVERITY (~((1ULL << 61) - 1))
1051 
1057 #define AMDSMI_MASK_HIGH_ERROR_SEVERITY_ONLY(mask) (mask & ((1ULL << 60) - 1))
1058 #define AMDSMI_MASK_INCLUDE_MED_ERROR_SEVERITY(mask) (mask | (1ULL << 60))
1059 #define AMDSMI_MASK_INCLUDE_LOW_ERROR_SEVERITY(mask) (mask | (1ULL << 61))
1060 #define AMDSMI_MASK_INCLUDE_WARN_SEVERITY(mask) (mask | (1ULL << 62))
1061 #define AMDSMI_MASK_INCLUDE_INFO_SEVERITY(mask) (mask | (1ULL << 63))
1062 
1068 #define AMDSMI_MASK_HIGH_SEVERITY_ONLY(mask) (mask & ((1ULL << 62) - 1))
1069 #define AMDSMI_MASK_INCLUDE_MED_SEVERITY(mask) AMDSMI_MASK_INCLUDE_WARN_SEVERITY(mask)
1070 #define AMDSMI_MASK_INCLUDE_LOW_SEVERITY(mask) AMDSMI_MASK_INCLUDE_INFO_SEVERITY(mask)
1071 
1072 #define AMDSMI_MASK_INCLUDE_CATEGORY(mask, cate) (mask | (1ULL << cate))
1073 #define AMDSMI_MASK_EXCLUDE_CATEGORY(mask, cate) (mask & (~(1ULL << cate)))
1074 
1075 #define AMDSMI_MAX_FB_SHARING_GROUPS 64
1076 #define AMDSMI_MAX_NUM_CONNECTED_NODES 64
1077 
1078 #define AMDSMI_MAX_NUM_METRICS_V1 255
1079 #define AMDSMI_MAX_NUM_METRICS_V2 512
1080 #define AMDSMI_MAX_NUM_METRICS AMDSMI_MAX_NUM_METRICS_V2
1081 
1082 #define AMDSMI_MAX_BAD_PAGE_RECORD_V1 512
1083 #define AMDSMI_MAX_BAD_PAGE_RECORD_V2 16384
1084 #define AMDSMI_MAX_BAD_PAGE_RECORD AMDSMI_MAX_BAD_PAGE_RECORD_V2
1085 
1091 typedef void *amdsmi_event_set;
1092 
1098 typedef enum {
1099  AMDSMI_EVENT_CATEGORY_NON_USED = 0,
1100  AMDSMI_EVENT_CATEGORY_DRIVER = 1,
1101  AMDSMI_EVENT_CATEGORY_RESET = 2,
1102  AMDSMI_EVENT_CATEGORY_SCHED = 3,
1103  AMDSMI_EVENT_CATEGORY_VBIOS = 4,
1104  AMDSMI_EVENT_CATEGORY_ECC = 5,
1105  AMDSMI_EVENT_CATEGORY_PP = 6,
1106  AMDSMI_EVENT_CATEGORY_IOV = 7,
1107  AMDSMI_EVENT_CATEGORY_VF = 8,
1108  AMDSMI_EVENT_CATEGORY_FW = 9,
1109  AMDSMI_EVENT_CATEGORY_GPU = 10,
1110  AMDSMI_EVENT_CATEGORY_GUARD = 11,
1111  AMDSMI_EVENT_CATEGORY_GPUMON = 12,
1112  AMDSMI_EVENT_CATEGORY_MMSCH = 13,
1113  AMDSMI_EVENT_CATEGORY_XGMI = 14,
1114  AMDSMI_EVENT_CATEGORY__MAX
1115 } amdsmi_event_category_t;
1116 
1122 typedef enum {
1123  AMDSMI_EVENT_GPU_DEVICE_LOST = 0,
1124  AMDSMI_EVENT_GPU_NOT_SUPPORTED,
1125  AMDSMI_EVENT_GPU_RMA,
1126  AMDSMI_EVENT_GPU_NOT_INITIALIZED,
1127  AMDSMI_EVENT_GPU_MMSCH_ABNORMAL_STATE,
1128  AMDSMI_EVENT_GPU_RLCV_ABNORMAL_STATE,
1129  AMDSMI_EVENT_GPU_SDMA_ENGINE_BUSY,
1130  AMDSMI_EVENT_GPU_RLC_ENGINE_BUSY,
1131  AMDSMI_EVENT_GPU_GC_ENGINE_BUSY,
1132  AMDSMI_EVENT_GPU__MAX
1133 } amdsmi_event_gpu_t;
1134 
1140 typedef enum {
1141  AMDSMI_EVENT_DRIVER_SPIN_LOCK_BUSY = 0,
1142  AMDSMI_EVENT_DRIVER_ALLOC_SYSTEM_MEM_FAIL,
1143  AMDSMI_EVENT_DRIVER_CREATE_GFX_WORKQUEUE_FAIL,
1144  AMDSMI_EVENT_DRIVER_CREATE_MM_WORKQUEUE_FAIL,
1145  AMDSMI_EVENT_DRIVER_BUFFER_OVERFLOW,
1146 
1147  AMDSMI_EVENT_DRIVER_DEV_INIT_FAIL,
1148  AMDSMI_EVENT_DRIVER_CREATE_THREAD_FAIL,
1149  AMDSMI_EVENT_DRIVER_NO_ACCESS_PCI_REGION,
1150  AMDSMI_EVENT_DRIVER_MMIO_FAIL,
1151  AMDSMI_EVENT_DRIVER_INTERRUPT_INIT_FAIL,
1152 
1153  AMDSMI_EVENT_DRIVER_INVALID_VALUE,
1154  AMDSMI_EVENT_DRIVER_CREATE_MUTEX_FAIL,
1155  AMDSMI_EVENT_DRIVER_CREATE_TIMER_FAIL,
1156  AMDSMI_EVENT_DRIVER_CREATE_EVENT_FAIL,
1157  AMDSMI_EVENT_DRIVER_CREATE_SPIN_LOCK_FAIL,
1158 
1159  AMDSMI_EVENT_DRIVER_ALLOC_FB_MEM_FAIL,
1160  AMDSMI_EVENT_DRIVER_ALLOC_DMA_MEM_FAIL,
1161  AMDSMI_EVENT_DRIVER_NO_FB_MANAGER,
1162  AMDSMI_EVENT_DRIVER_HW_INIT_FAIL,
1163  AMDSMI_EVENT_DRIVER_SW_INIT_FAIL,
1164 
1165  AMDSMI_EVENT_DRIVER_INIT_CONFIG_ERROR,
1166  AMDSMI_EVENT_DRIVER_ERROR_LOGGING_FAILED,
1167  AMDSMI_EVENT_DRIVER_CREATE_RWLOCK_FAIL,
1168  AMDSMI_EVENT_DRIVER_CREATE_RWSEMA_FAIL,
1169  AMDSMI_EVENT_DRIVER_GET_READ_LOCK_FAIL,
1170 
1171  AMDSMI_EVENT_DRIVER_GET_WRITE_LOCK_FAIL,
1172  AMDSMI_EVENT_DRIVER_GET_READ_SEMA_FAIL,
1173  AMDSMI_EVENT_DRIVER_GET_WRITE_SEMA_FAIL,
1174 
1175  AMDSMI_EVENT_DRIVER_DIAG_DATA_INIT_FAIL,
1176  AMDSMI_EVENT_DRIVER_DIAG_DATA_MEM_REQ_FAIL,
1177  AMDSMI_EVENT_DRIVER_DIAG_DATA_VADDR_REQ_FAIL,
1178  AMDSMI_EVENT_DRIVER_DIAG_DATA_BUS_ADDR_REQ_FAIL,
1179 
1180  AMDSMI_EVENT_DRIVER_REMOTE_DEBUG_INIT_FAIL,
1181  AMDSMI_EVENT_DRIVER_REMOTE_DEBUG_MEM_REQ_FAIL,
1182  AMDSMI_EVENT_DRIVER_REMOTE_DEBUG_VADDR_REQ_FAIL,
1183  AMDSMI_EVENT_DRIVER_REMOTE_DEBUG_BUS_ADDR_REQ_FAIL,
1184 
1185  AMDSMI_EVENT_DRIVER_HRTIMER_START_FAIL,
1186  AMDSMI_EVENT_DRIVER_CREATE_DRIVER_FILE_FAIL,
1187  AMDSMI_EVENT_DRIVER_CREATE_DEVICE_FILE_FAIL,
1188  AMDSMI_EVENT_DRIVER_CREATE_DEBUGFS_FILE_FAIL,
1189  AMDSMI_EVENT_DRIVER_CREATE_DEBUGFS_DIR_FAIL,
1190 
1191  AMDSMI_EVENT_DRIVER_PCI_ENABLE_DEVICE_FAIL,
1192  AMDSMI_EVENT_DRIVER_FB_MAP_FAIL,
1193  AMDSMI_EVENT_DRIVER_DOORBELL_MAP_FAIL,
1194  AMDSMI_EVENT_DRIVER_PCI_REGISTER_DRIVER_FAIL,
1195 
1196  AMDSMI_EVENT_DRIVER_ALLOC_IOVA_ALIGN_FAIL,
1197 
1198  AMDSMI_EVENT_DRIVER_ROM_MAP_FAIL,
1199  AMDSMI_EVENT_DRIVER_FULL_ACCESS_TIMEOUT,
1200 
1201  AMDSMI_EVENT_DRIVER__MAX
1202 } amdsmi_event_driver_t;
1203 
1209 typedef enum {
1210  AMDSMI_EVENT_FW_CMD_ALLOC_BUF_FAIL = 0,
1211  AMDSMI_EVENT_FW_CMD_BUF_PREP_FAIL,
1212  AMDSMI_EVENT_FW_RING_INIT_FAIL,
1213  AMDSMI_EVENT_FW_FW_APPLY_SECURITY_POLICY_FAIL,
1214  AMDSMI_EVENT_FW_START_RING_FAIL,
1215 
1216  AMDSMI_EVENT_FW_FW_LOAD_FAIL,
1217  AMDSMI_EVENT_FW_EXIT_FAIL,
1218  AMDSMI_EVENT_FW_INIT_FAIL,
1219  AMDSMI_EVENT_FW_CMD_SUBMIT_FAIL,
1220  AMDSMI_EVENT_FW_CMD_FENCE_WAIT_FAIL,
1221 
1222  AMDSMI_EVENT_FW_TMR_LOAD_FAIL,
1223  AMDSMI_EVENT_FW_TOC_LOAD_FAIL,
1224  AMDSMI_EVENT_FW_RAS_LOAD_FAIL,
1225  AMDSMI_EVENT_FW_RAS_UNLOAD_FAIL,
1226  AMDSMI_EVENT_FW_RAS_TA_INVOKE_FAIL,
1227  AMDSMI_EVENT_FW_RAS_TA_ERR_INJECT_FAIL,
1228 
1229  AMDSMI_EVENT_FW_ASD_LOAD_FAIL,
1230  AMDSMI_EVENT_FW_ASD_UNLOAD_FAIL,
1231  AMDSMI_EVENT_FW_AUTOLOAD_FAIL,
1232  AMDSMI_EVENT_FW_VFGATE_FAIL,
1233 
1234  AMDSMI_EVENT_FW_XGMI_LOAD_FAIL,
1235  AMDSMI_EVENT_FW_XGMI_UNLOAD_FAIL,
1236  AMDSMI_EVENT_FW_XGMI_TA_INVOKE_FAIL,
1237 
1238  AMDSMI_EVENT_FW_TMR_INIT_FAIL,
1239  AMDSMI_EVENT_FW_NOT_SUPPORTED_FEATURE,
1240  AMDSMI_EVENT_FW_GET_PSP_TRACELOG_FAIL,
1241 
1242  AMDSMI_EVENT_FW_SET_SNAPSHOT_ADDR_FAIL,
1243  AMDSMI_EVENT_FW_SNAPSHOT_TRIGGER_FAIL,
1244 
1245  AMDSMI_EVENT_FW_MIGRATION_GET_PSP_INFO_FAIL,
1246  AMDSMI_EVENT_FW_MIGRATION_EXPORT_FAIL,
1247  AMDSMI_EVENT_FW_MIGRATION_IMPORT_FAIL,
1248 
1249  AMDSMI_EVENT_FW_BL_FAIL,
1250  AMDSMI_EVENT_FW_RAS_BOOT_FAIL,
1251  AMDSMI_EVENT_FW_MAILBOX_ERROR,
1252 
1253  AMDSMI_EVENT_FW__MAX
1254 } amdsmi_event_fw_t;
1255 
1256 #define AMDSMI_EVENT_FW_FW_INIT_FAIL AMDSMI_EVENT_FW_RING_INIT_FAIL
1257 
1263 typedef enum {
1264  AMDSMI_EVENT_RESET_GPU = 0,
1265  AMDSMI_EVENT_RESET_GPU_FAILED,
1266  AMDSMI_EVENT_RESET_FLR,
1267  AMDSMI_EVENT_RESET_FLR_FAILED,
1268  AMDSMI_EVENT_RESET__MAX
1269 } amdsmi_event_reset_t;
1270 
1276 typedef enum {
1277  AMDSMI_EVENT_IOV_NO_GPU_IOV_CAP = 0,
1278  AMDSMI_EVENT_IOV_ASIC_NO_SRIOV_SUPPORT,
1279  AMDSMI_EVENT_IOV_ENABLE_SRIOV_FAIL,
1280  AMDSMI_EVENT_IOV_CMD_TIMEOUT,
1281  AMDSMI_EVENT_IOV_CMD_ERROR,
1282 
1283  AMDSMI_EVENT_IOV_INIT_IV_RING_FAIL,
1284  AMDSMI_EVENT_IOV_SRIOV_STRIDE_ERROR,
1285  AMDSMI_EVENT_IOV_WS_SAVE_TIMEOUT,
1286  AMDSMI_EVENT_IOV_WS_IDLE_TIMEOUT,
1287  AMDSMI_EVENT_IOV_WS_RUN_TIMEOUT,
1288  AMDSMI_EVENT_IOV_WS_LOAD_TIMEOUT,
1289  AMDSMI_EVENT_IOV_WS_SHUTDOWN_TIMEOUT,
1290  AMDSMI_EVENT_IOV_WS_ALREADY_SHUTDOWN,
1291  AMDSMI_EVENT_IOV_WS_INFINITE_LOOP,
1292  AMDSMI_EVENT_IOV_WS_REENTRANT_ERROR,
1293  AMDSMI_EVENT_IOV__MAX
1294 } amdsmi_event_iov_t;
1295 
1301 typedef enum {
1302  AMDSMI_EVENT_ECC_UCE = 0,
1303  AMDSMI_EVENT_ECC_CE,
1304  AMDSMI_EVENT_ECC_IN_PF_FB,
1305  AMDSMI_EVENT_ECC_IN_CRI_REG,
1306  AMDSMI_EVENT_ECC_IN_VF_CRI,
1307  AMDSMI_EVENT_ECC_REACH_THD,
1308  AMDSMI_EVENT_ECC_VF_CE,
1309  AMDSMI_EVENT_ECC_VF_UE,
1310  AMDSMI_EVENT_ECC_IN_SAME_ROW,
1311  AMDSMI_EVENT_ECC_UMC_UE,
1312  AMDSMI_EVENT_ECC_GFX_CE,
1313  AMDSMI_EVENT_ECC_GFX_UE,
1314  AMDSMI_EVENT_ECC_SDMA_CE,
1315  AMDSMI_EVENT_ECC_SDMA_UE,
1316  AMDSMI_EVENT_ECC_GFX_CE_TOTAL,
1317  AMDSMI_EVENT_ECC_GFX_UE_TOTAL,
1318  AMDSMI_EVENT_ECC_SDMA_CE_TOTAL,
1319  AMDSMI_EVENT_ECC_SDMA_UE_TOTAL,
1320  AMDSMI_EVENT_ECC_UMC_CE_TOTAL,
1321  AMDSMI_EVENT_ECC_UMC_UE_TOTAL,
1322  AMDSMI_EVENT_ECC_MMHUB_CE,
1323  AMDSMI_EVENT_ECC_MMHUB_UE,
1324  AMDSMI_EVENT_ECC_MMHUB_CE_TOTAL,
1325  AMDSMI_EVENT_ECC_MMHUB_UE_TOTAL,
1326  AMDSMI_EVENT_ECC_XGMI_WAFL_CE,
1327  AMDSMI_EVENT_ECC_XGMI_WAFL_UE,
1328  AMDSMI_EVENT_ECC_XGMI_WAFL_CE_TOTAL,
1329  AMDSMI_EVENT_ECC_XGMI_WAFL_UE_TOTAL,
1330  AMDSMI_EVENT_ECC_FATAL_ERROR,
1331  AMDSMI_EVENT_ECC_POISON_CONSUMPTION,
1332  AMDSMI_EVENT_ECC_ACA_DUMP,
1333  AMDSMI_EVENT_ECC_WRONG_SOCKET_ID,
1334  AMDSMI_EVENT_ECC_ACA_UNKNOWN_BLOCK_INSTANCE,
1335  AMDSMI_EVENT_ECC_UNKNOWN_CHIPLET_CE,
1336  AMDSMI_EVENT_ECC_UNKNOWN_CHIPLET_UE,
1337  AMDSMI_EVENT_ECC_UMC_CHIPLET_CE,
1338  AMDSMI_EVENT_ECC_UMC_CHIPLET_UE,
1339  AMDSMI_EVENT_ECC_GFX_CHIPLET_CE,
1340  AMDSMI_EVENT_ECC_GFX_CHIPLET_UE,
1341  AMDSMI_EVENT_ECC_SDMA_CHIPLET_CE,
1342  AMDSMI_EVENT_ECC_SDMA_CHIPLET_UE,
1343  AMDSMI_EVENT_ECC_MMHUB_CHIPLET_CE,
1344  AMDSMI_EVENT_ECC_MMHUB_CHIPLET_UE,
1345  AMDSMI_EVENT_ECC_XGMI_WAFL_CHIPLET_CE,
1346  AMDSMI_EVENT_ECC_XGMI_WAFL_CHIPLET_UE,
1347  AMDSMI_EVENT_ECC_EEPROM_ENTRIES_FOUND,
1348  AMDSMI_EVENT_ECC_UMC_DE,
1349  AMDSMI_EVENT_ECC_UMC_DE_TOTAL,
1350  AMDSMI_EVENT_ECC_UNKNOWN,
1351  AMDSMI_EVENT_ECC_EEPROM_REACH_THD,
1352  AMDSMI_EVENT_ECC_UMC_CHIPLET_DE,
1353  AMDSMI_EVENT_ECC_UNKNOWN_CHIPLET_DE,
1354  AMDSMI_EVENT_ECC_EEPROM_CHK_MISMATCH,
1355  AMDSMI_EVENT_ECC_EEPROM_RESET,
1356  AMDSMI_EVENT_ECC_EEPROM_RESET_FAILED,
1357  AMDSMI_EVENT_ECC_EEPROM_APPEND,
1358  AMDSMI_EVENT_ECC_THD_CHANGED,
1359  AMDSMI_EVENT_ECC_DUP_ENTRIES,
1360  AMDSMI_EVENT_ECC_EEPROM_WRONG_HDR,
1361  AMDSMI_EVENT_ECC_EEPROM_WRONG_VER,
1362  AMDSMI_EVENT_ECC__MAX
1363 } amdsmi_event_ecc_t;
1364 
1370 typedef enum {
1371  AMDSMI_EVENT_PP_SET_DPM_POLICY_FAIL = 0,
1372  AMDSMI_EVENT_PP_ACTIVATE_DPM_POLICY_FAIL,
1373  AMDSMI_EVENT_PP_I2C_SLAVE_NOT_PRESENT,
1374  AMDSMI_EVENT_PP_THROTTLER_EVENT,
1375  AMDSMI_EVENT_PP__MAX
1376 } amdsmi_event_pp_t;
1377 
1383 typedef enum {
1384  AMDSMI_EVENT_SCHED_WORLD_SWITCH_FAIL = 0,
1385  AMDSMI_EVENT_SCHED_DISABLE_AUTO_HW_SWITCH_FAIL,
1386  AMDSMI_EVENT_SCHED_ENABLE_AUTO_HW_SWITCH_FAIL,
1387  AMDSMI_EVENT_SCHED_GFX_SAVE_REG_FAIL,
1388  AMDSMI_EVENT_SCHED_GFX_IDLE_REG_FAIL,
1389 
1390  AMDSMI_EVENT_SCHED_GFX_RUN_REG_FAIL,
1391  AMDSMI_EVENT_SCHED_GFX_LOAD_REG_FAIL,
1392  AMDSMI_EVENT_SCHED_GFX_INIT_REG_FAIL,
1393  AMDSMI_EVENT_SCHED_MM_SAVE_REG_FAIL,
1394  AMDSMI_EVENT_SCHED_MM_IDLE_REG_FAIL,
1395 
1396  AMDSMI_EVENT_SCHED_MM_RUN_REG_FAIL,
1397  AMDSMI_EVENT_SCHED_MM_LOAD_REG_FAIL,
1398  AMDSMI_EVENT_SCHED_MM_INIT_REG_FAIL,
1399  AMDSMI_EVENT_SCHED_INIT_GPU_FAIL,
1400  AMDSMI_EVENT_SCHED_RUN_GPU_FAIL,
1401 
1402  AMDSMI_EVENT_SCHED_SAVE_GPU_STATE_FAIL,
1403  AMDSMI_EVENT_SCHED_LOAD_GPU_STATE_FAIL,
1404  AMDSMI_EVENT_SCHED_IDLE_GPU_FAIL,
1405  AMDSMI_EVENT_SCHED_FINI_GPU_FAIL,
1406  AMDSMI_EVENT_SCHED_DEAD_VF,
1407 
1408  AMDSMI_EVENT_SCHED_EVENT_QUEUE_FULL,
1409  AMDSMI_EVENT_SCHED_SHUTDOWN_VF_FAIL,
1410  AMDSMI_EVENT_SCHED_RESET_VF_NUM_FAIL,
1411  AMDSMI_EVENT_SCHED_IGNORE_EVENT,
1412  AMDSMI_EVENT_SCHED_PF_SWITCH_FAIL,
1413  AMDSMI_EVENT_SCHED__MAX
1414 } amdsmi_event_sched_t;
1415 
1421 typedef enum {
1422  AMDSMI_EVENT_VF_ATOMBIOS_INIT_FAIL = 0,
1423  AMDSMI_EVENT_VF_NO_VBIOS,
1424  AMDSMI_EVENT_VF_GPU_POST_ERROR,
1425  AMDSMI_EVENT_VF_ATOMBIOS_GET_CLOCK_FAIL,
1426  AMDSMI_EVENT_VF_FENCE_INIT_FAIL,
1427  AMDSMI_EVENT_VF_AMDGPU_INIT_FAIL,
1428  AMDSMI_EVENT_VF_IB_INIT_FAIL,
1429  AMDSMI_EVENT_VF_AMDGPU_LATE_INIT_FAIL,
1430  AMDSMI_EVENT_VF_ASIC_RESUME_FAIL,
1431  AMDSMI_EVENT_VF_GPU_RESET_FAIL,
1432  AMDSMI_EVENT_VF__MAX
1433 } amdsmi_event_vf_max_t;
1434 
1440 typedef enum {
1441  AMDSMI_EVENT_VBIOS_INVALID = 0,
1442  AMDSMI_EVENT_VBIOS_IMAGE_MISSING,
1443  AMDSMI_EVENT_VBIOS_CHECKSUM_ERR,
1444  AMDSMI_EVENT_VBIOS_POST_FAIL,
1445  AMDSMI_EVENT_VBIOS_READ_FAIL,
1446 
1447  AMDSMI_EVENT_VBIOS_READ_IMG_HEADER_FAIL,
1448  AMDSMI_EVENT_VBIOS_READ_IMG_SIZE_FAIL,
1449  AMDSMI_EVENT_VBIOS_GET_FW_INFO_FAIL,
1450  AMDSMI_EVENT_VBIOS_GET_TBL_REVISION_FAIL,
1451  AMDSMI_EVENT_VBIOS_PARSER_TBL_FAIL,
1452 
1453  AMDSMI_EVENT_VBIOS_IP_DISCOVERY_FAIL,
1454  AMDSMI_EVENT_VBIOS_TIMEOUT,
1455  AMDSMI_EVENT_VBIOS_HASH_INVALID,
1456  AMDSMI_EVENT_VBIOS_HASH_UPDATED,
1457  AMDSMI_EVENT_VBIOS_IP_DISCOVERY_BINARY_CHECKSUM_FAIL,
1458  AMDSMI_EVENT_VBIOS_IP_DISCOVERY_TABLE_CHECKSUM_FAIL,
1459  AMDSMI_EVENT_VBIOS__MAX
1460 } amdsmi_event_vbios_t;
1461 
1467 typedef enum {
1468  AMDSMI_EVENT_GUARD_RESET_FAIL = 0,
1469  AMDSMI_EVENT_GUARD_EVENT_OVERFLOW,
1470  AMDSMI_EVENT_GUARD__MAX
1471 } amdsmi_event_guard_t;
1472 
1478 typedef enum {
1479  AMDSMI_EVENT_GPUMON_INVALID_OPTION = 0,
1480  AMDSMI_EVENT_GPUMON_INVALID_VF_INDEX,
1481  AMDSMI_EVENT_GPUMON_INVALID_FB_SIZE,
1482  AMDSMI_EVENT_GPUMON_NO_SUITABLE_SPACE,
1483  AMDSMI_EVENT_GPUMON_NO_AVAILABLE_SLOT,
1484 
1485  AMDSMI_EVENT_GPUMON_OVERSIZE_ALLOCATION,
1486  AMDSMI_EVENT_GPUMON_OVERLAPPING_FB,
1487  AMDSMI_EVENT_GPUMON_INVALID_GFX_TIMESLICE,
1488  AMDSMI_EVENT_GPUMON_INVALID_MM_TIMESLICE,
1489  AMDSMI_EVENT_GPUMON_INVALID_GFX_PART,
1490 
1491  AMDSMI_EVENT_GPUMON_VF_BUSY,
1492  AMDSMI_EVENT_GPUMON_INVALID_VF_NUM,
1493  AMDSMI_EVENT_GPUMON_NOT_SUPPORTED,
1494  AMDSMI_EVENT_GPUMON__MAX
1495 } amdsmi_event_gpumon_t;
1496 
1502 typedef enum {
1503  AMDSMI_EVENT_MMSCH_IGNORED_JOB = 0,
1504  AMDSMI_EVENT_MMSCH_UNSUPPORTED_VCN_FW,
1505  AMDSMI_EVENT_MMSCH__MAX
1506 } amdsmi_event_mmsch_t;
1507 
1513 typedef enum {
1514  AMDSMI_EVENT_XGMI_TOPOLOGY_UPDATE_FAILED = 0,
1515  AMDSMI_EVENT_XGMI_TOPOLOGY_HW_INIT_UPDATE,
1516  AMDSMI_EVENT_XGMI_TOPOLOGY_UPDATE_DONE,
1517  AMDSMI_EVENT_XGMI_FB_SHARING_SETTING_ERROR,
1518  AMDSMI_EVENT_XGMI_FB_SHARING_SETTING_RESET,
1519  AMDSMI_EVENT_XGMI__MAX
1520 } amdsmi_event_xgmi_t;
1521 
1527 typedef enum {
1528  AMDSMI_RAS_ECC_SUPPORT_PARITY = (1 << 0),
1529  AMDSMI_RAS_ECC_SUPPORT_CORRECTABLE = (1 << 1),
1530  AMDSMI_RAS_ECC_SUPPORT_UNCORRECTABLE = (1 << 2),
1531  AMDSMI_RAS_ECC_SUPPORT_POISON = (1 << 3)
1532 } amdsmi_ecc_correction_schema_support_t;
1533 
1539 typedef enum {
1540  AMDSMI_GUEST_FW_ID_VCE = 0,
1541  AMDSMI_GUEST_FW_ID_UVD,
1542  AMDSMI_GUEST_FW_ID_MC,
1543  AMDSMI_GUEST_FW_ID_ME,
1544  AMDSMI_GUEST_FW_ID_PFP,
1545  AMDSMI_GUEST_FW_ID_CE,
1546  AMDSMI_GUEST_FW_ID_RLC,
1547  AMDSMI_GUEST_FW_ID_RLC_SRLC,
1548  AMDSMI_GUEST_FW_ID_RLC_SRLG,
1549  AMDSMI_GUEST_FW_ID_RLC_SRLS,
1550  AMDSMI_GUEST_FW_ID_MEC,
1551  AMDSMI_GUEST_FW_ID_MEC2,
1552  AMDSMI_GUEST_FW_ID_SOS,
1553  AMDSMI_GUEST_FW_ID_ASD,
1554  AMDSMI_GUEST_FW_ID_TA_RAS,
1555  AMDSMI_GUEST_FW_ID_TA_XGMI,
1556  AMDSMI_GUEST_FW_ID_SMC,
1557  AMDSMI_GUEST_FW_ID_SDMA,
1558  AMDSMI_GUEST_FW_ID_SDMA2,
1559  AMDSMI_GUEST_FW_ID_VCN,
1560  AMDSMI_GUEST_FW_ID_DMCU,
1561  AMDSMI_GUEST_FW_ID__MAX
1562 } amdsmi_guest_fw_engine_id_t;
1563 
1569 typedef enum {
1570  AMDSMI_VF_CONFIG_FB_SIZE_SET = 0,
1571  AMDSMI_VF_CONFIG_FB_OFFSET_SET,
1572  AMDSMI_VF_CONFIG_GFX_TIMESLICE_US_SET,
1573  AMDSMI_VF_CONFIG_ENG_COMPUTE_BW_SET,
1574  AMDSMI_VF_CONFIG_GUARD_THRESHOLD_FLR_SET,
1575  AMDSMI_VF_CONFIG_GUARD_THRESHOLD_EXCL_MOD_SET,
1576  AMDSMI_VF_CONFIG_GUARD_THRESHOLD_EXCL_TIMEOUT_SET,
1577  AMDSMI_VF_CONFIG_GUARD_THRESHOLD_ALL_INT_SET,
1578  AMDSMI_VF_CONFIG_ENG_ENCODE_BW_UVD_SET,
1579  AMDSMI_VF_CONFIG_ENG_ENCODE_BW_VCE_SET,
1580  AMDSMI_VF_CONFIG_ENG_ENCODE_BW_UVD1_SET,
1581  AMDSMI_VF_CONFIG_ENG_ENCODE_BW_VCN_SET,
1582  AMDSMI_VF_CONFIG_ENG_ENCODE_BW_VCN1_SET,
1583  AMDSMI_VF_CONFIG__MAX
1584 } amdsmi_vf_config_flags_t;
1585 
1591 typedef enum {
1592  AMDSMI_VF_STATE_UNAVAILABLE,
1593  AMDSMI_VF_STATE_AVAILABLE,
1594  AMDSMI_VF_STATE_ACTIVE,
1595  AMDSMI_VF_STATE_SUSPENDED,
1596  AMDSMI_VF_STATE_FULLACCESS,
1597  AMDSMI_VF_STATE_DEFAULT_AVAILABLE,
1598 } amdsmi_vf_sched_state_t;
1599 
1605 typedef enum {
1606  AMDSMI_GUARD_EVENT_FLR,
1607  AMDSMI_GUARD_EVENT_EXCLUSIVE_MOD,
1608  AMDSMI_GUARD_EVENT_EXCLUSIVE_TIMEOUT,
1609  AMDSMI_GUARD_EVENT_ALL_INT,
1610  AMDSMI_GUARD_EVENT_RAS_ERR_COUNT,
1611  AMDSMI_GUARD_EVENT_RAS_CPER_DUMP,
1612  AMDSMI_GUARD_EVENT_RAS_BAD_PAGES,
1613  AMDSMI_GUARD_EVENT__MAX
1614 } amdsmi_guard_type_t;
1615 
1621 typedef enum {
1622  AMDSMI_DRIVER_LIBGV,
1623  AMDSMI_DRIVER_KMD,
1624  AMDSMI_DRIVER_AMDGPUV,
1625  AMDSMI_DRIVER_AMDGPU,
1626  AMDSMI_DRIVER_VMWGPUV,
1627  AMDSMI_DRIVER__MAX,
1628 } amdsmi_driver_t;
1629 
1635 typedef enum {
1636  AMDSMI_GUARD_STATE_NORMAL = 0,
1637  AMDSMI_GUARD_STATE_FULL = 1,
1638  AMDSMI_GUARD_STATE_OVERFLOW = 2,
1639 } amdsmi_guard_state_t;
1640 
1646 typedef enum {
1647  AMDSMI_SCHED_BLOCK_GFX = 0x0,
1648  AMDSMI_SCHED_BLOCK_UVD = 0x1,
1649  AMDSMI_SCHED_BLOCK_VCE = 0x2,
1650  AMDSMI_SCHED_BLOCK_UVD1 = 0x3,
1651  AMDSMI_SCHED_BLOCK_VCN = 0x4,
1652  AMDSMI_SCHED_BLOCK_VCN1 = 0x5,
1653 } amdsmi_sched_block_t;
1654 
1660 typedef enum {
1661  AMDSMI_GUEST_FW_LOAD_STATUS_OK = 0,
1662  AMDSMI_GUEST_FW_LOAD_STATUS_OBSOLETE_FW = 1,
1663  AMDSMI_GUEST_FW_LOAD_STATUS_BAD_SIG = 2,
1664  AMDSMI_GUEST_FW_LOAD_STATUS_FW_LOAD_FAIL = 3,
1665  AMDSMI_GUEST_FW_LOAD_STATUS_ERR_GENERIC = 4
1666 } amdsmi_guest_fw_load_status_t;
1667 
1673 typedef enum {
1674  AMDSMI_XGMI_FB_SHARING_MODE_CUSTOM = 0,
1675  AMDSMI_XGMI_FB_SHARING_MODE_1 = 1,
1676  AMDSMI_XGMI_FB_SHARING_MODE_2 = 2,
1677  AMDSMI_XGMI_FB_SHARING_MODE_4 = 4,
1678  AMDSMI_XGMI_FB_SHARING_MODE_8 = 8,
1679  AMDSMI_XGMI_FB_SHARING_MODE_UNKNOWN = 0xFFFFFFFF
1680 } amdsmi_xgmi_fb_sharing_mode_t;
1681 
1687 typedef enum {
1688  AMDSMI_PROFILE_CAPABILITY_MEMORY = 0,
1689  AMDSMI_PROFILE_CAPABILITY_ENCODE = 1,
1690  AMDSMI_PROFILE_CAPABILITY_DECODE = 2,
1691  AMDSMI_PROFILE_CAPABILITY_COMPUTE = 3,
1692  AMDSMI_PROFILE_CAPABILITY__MAX,
1693 } amdsmi_profile_capability_type_t;
1694 
1700 typedef enum {
1701  AMDSMI_METRIC_CATEGORY_ACC_COUNTER,
1702  AMDSMI_METRIC_CATEGORY_FREQUENCY,
1703  AMDSMI_METRIC_CATEGORY_ACTIVITY,
1704  AMDSMI_METRIC_CATEGORY_TEMPERATURE,
1705  AMDSMI_METRIC_CATEGORY_POWER,
1706  AMDSMI_METRIC_CATEGORY_ENERGY,
1707  AMDSMI_METRIC_CATEGORY_THROTTLE,
1708  AMDSMI_METRIC_CATEGORY_PCIE,
1709  AMDSMI_METRIC_CATEGORY_STATIC,
1710  AMDSMI_METRIC_CATEGORY_SYS_ACC_COUNTER,
1711  AMDSMI_METRIC_CATEGORY_SYS_BASEBOARD_TEMP,
1712  AMDSMI_METRIC_CATEGORY_SYS_GPUBOARD_TEMP,
1713  AMDSMI_METRIC_CATEGORY_UNKNOWN
1714 } amdsmi_metric_category_t;
1715 
1721 typedef enum {
1722  AMDSMI_METRIC_NAME_METRIC_ACC_COUNTER,
1723  AMDSMI_METRIC_NAME_FW_TIMESTAMP,
1724  AMDSMI_METRIC_NAME_CLK_GFX,
1725  AMDSMI_METRIC_NAME_CLK_SOC,
1726  AMDSMI_METRIC_NAME_CLK_MEM,
1727  AMDSMI_METRIC_NAME_CLK_VCLK,
1728  AMDSMI_METRIC_NAME_CLK_DCLK,
1729 
1730  AMDSMI_METRIC_NAME_USAGE_GFX,
1731  AMDSMI_METRIC_NAME_USAGE_MEM,
1732  AMDSMI_METRIC_NAME_USAGE_MM,
1733  AMDSMI_METRIC_NAME_USAGE_VCN,
1734  AMDSMI_METRIC_NAME_USAGE_JPEG,
1735 
1736  AMDSMI_METRIC_NAME_VOLT_GFX,
1737  AMDSMI_METRIC_NAME_VOLT_SOC,
1738  AMDSMI_METRIC_NAME_VOLT_MEM,
1739 
1740  AMDSMI_METRIC_NAME_TEMP_HOTSPOT_CURR,
1741  AMDSMI_METRIC_NAME_TEMP_HOTSPOT_LIMIT,
1742  AMDSMI_METRIC_NAME_TEMP_MEM_CURR,
1743  AMDSMI_METRIC_NAME_TEMP_MEM_LIMIT,
1744  AMDSMI_METRIC_NAME_TEMP_VR_CURR,
1745  AMDSMI_METRIC_NAME_TEMP_SHUTDOWN,
1746 
1747  AMDSMI_METRIC_NAME_POWER_CURR,
1748  AMDSMI_METRIC_NAME_POWER_LIMIT,
1749 
1750  AMDSMI_METRIC_NAME_ENERGY_SOCKET,
1751  AMDSMI_METRIC_NAME_ENERGY_CCD,
1752  AMDSMI_METRIC_NAME_ENERGY_XCD,
1753  AMDSMI_METRIC_NAME_ENERGY_AID,
1754  AMDSMI_METRIC_NAME_ENERGY_MEM,
1755 
1756  AMDSMI_METRIC_NAME_THROTTLE_SOCKET_ACTIVE,
1757  AMDSMI_METRIC_NAME_THROTTLE_VR_ACTIVE,
1758  AMDSMI_METRIC_NAME_THROTTLE_MEM_ACTIVE,
1759 
1760  AMDSMI_METRIC_NAME_PCIE_BANDWIDTH,
1761  AMDSMI_METRIC_NAME_PCIE_L0_TO_RECOVERY_COUNT,
1762  AMDSMI_METRIC_NAME_PCIE_REPLAY_COUNT,
1763  AMDSMI_METRIC_NAME_PCIE_REPLAY_ROLLOVER_COUNT,
1764  AMDSMI_METRIC_NAME_PCIE_NAK_SENT_COUNT,
1765  AMDSMI_METRIC_NAME_PCIE_NAK_RECEIVED_COUNT,
1766 
1767  AMDSMI_METRIC_NAME_CLK_GFX_MAX_LIMIT,
1768  AMDSMI_METRIC_NAME_CLK_SOC_MAX_LIMIT,
1769  AMDSMI_METRIC_NAME_CLK_MEM_MAX_LIMIT,
1770  AMDSMI_METRIC_NAME_CLK_VCLK_MAX_LIMIT,
1771  AMDSMI_METRIC_NAME_CLK_DCLK_MAX_LIMIT,
1772 
1773  AMDSMI_METRIC_NAME_CLK_GFX_MIN_LIMIT,
1774  AMDSMI_METRIC_NAME_CLK_SOC_MIN_LIMIT,
1775  AMDSMI_METRIC_NAME_CLK_MEM_MIN_LIMIT,
1776  AMDSMI_METRIC_NAME_CLK_VCLK_MIN_LIMIT,
1777  AMDSMI_METRIC_NAME_CLK_DCLK_MIN_LIMIT,
1778 
1779  AMDSMI_METRIC_NAME_CLK_GFX_LOCKED,
1780 
1781  AMDSMI_METRIC_NAME_CLK_GFX_DS_DISABLED,
1782  AMDSMI_METRIC_NAME_CLK_MEM_DS_DISABLED,
1783  AMDSMI_METRIC_NAME_CLK_SOC_DS_DISABLED,
1784  AMDSMI_METRIC_NAME_CLK_VCLK_DS_DISABLED,
1785  AMDSMI_METRIC_NAME_CLK_DCLK_DS_DISABLED,
1786 
1787  AMDSMI_METRIC_NAME_PCIE_LINK_SPEED,
1788  AMDSMI_METRIC_NAME_PCIE_LINK_WIDTH,
1789 
1790  AMDSMI_METRIC_NAME_DRAM_BANDWIDTH,
1791  AMDSMI_METRIC_NAME_MAX_DRAM_BANDWIDTH,
1792 
1793  AMDSMI_METRIC_NAME_GFX_CLK_BELOW_HOST_LIMIT_PPT,
1794  AMDSMI_METRIC_NAME_GFX_CLK_BELOW_HOST_LIMIT_THM,
1795  AMDSMI_METRIC_NAME_GFX_CLK_BELOW_HOST_LIMIT_TOTAL,
1796  AMDSMI_METRIC_NAME_GFX_CLK_LOW_UTILIZATION,
1797  AMDSMI_METRIC_NAME_INPUT_TELEMETRY_VOLTAGE,
1798  AMDSMI_METRIC_NAME_PLDM_VERSION,
1799  AMDSMI_METRIC_NAME_TEMP_XCD,
1800  AMDSMI_METRIC_NAME_TEMP_AID,
1801  AMDSMI_METRIC_NAME_TEMP_HBM,
1802 
1803  AMDSMI_METRIC_NAME_SYS_METRIC_ACC_COUNTER,
1804  AMDSMI_METRIC_NAME_SYSTEM_TEMP_UBB_FPGA,
1805  AMDSMI_METRIC_NAME_SYSTEM_TEMP_UBB_FRONT,
1806  AMDSMI_METRIC_NAME_SYSTEM_TEMP_UBB_BACK,
1807  AMDSMI_METRIC_NAME_SYSTEM_TEMP_UBB_OAM7,
1808  AMDSMI_METRIC_NAME_SYSTEM_TEMP_UBB_IBC,
1809  AMDSMI_METRIC_NAME_SYSTEM_TEMP_UBB_UFPGA,
1810  AMDSMI_METRIC_NAME_SYSTEM_TEMP_UBB_OAM1,
1811  AMDSMI_METRIC_NAME_SYSTEM_TEMP_OAM_0_1_HSC,
1812  AMDSMI_METRIC_NAME_SYSTEM_TEMP_OAM_2_3_HSC,
1813  AMDSMI_METRIC_NAME_SYSTEM_TEMP_OAM_4_5_HSC,
1814  AMDSMI_METRIC_NAME_SYSTEM_TEMP_OAM_6_7_HSC,
1815  AMDSMI_METRIC_NAME_SYSTEM_TEMP_UBB_FPGA_0V72_VR,
1816  AMDSMI_METRIC_NAME_SYSTEM_TEMP_UBB_FPGA_3V3_VR,
1817  AMDSMI_METRIC_NAME_SYSTEM_TEMP_RETIMER_0_1_2_3_1V2_VR,
1818  AMDSMI_METRIC_NAME_SYSTEM_TEMP_RETIMER_4_5_6_7_1V2_VR,
1819  AMDSMI_METRIC_NAME_SYSTEM_TEMP_RETIMER_0_1_0V9_VR,
1820  AMDSMI_METRIC_NAME_SYSTEM_TEMP_RETIMER_4_5_0V9_VR,
1821  AMDSMI_METRIC_NAME_SYSTEM_TEMP_RETIMER_2_3_0V9_VR,
1822  AMDSMI_METRIC_NAME_SYSTEM_TEMP_RETIMER_6_7_0V9_VR,
1823  AMDSMI_METRIC_NAME_SYSTEM_TEMP_OAM_0_1_2_3_3V3_VR,
1824  AMDSMI_METRIC_NAME_SYSTEM_TEMP_OAM_4_5_6_7_3V3_VR,
1825  AMDSMI_METRIC_NAME_SYSTEM_TEMP_IBC_HSC,
1826  AMDSMI_METRIC_NAME_SYSTEM_TEMP_IBC,
1827  AMDSMI_METRIC_NAME_NODE_TEMP_RETIMER,
1828  AMDSMI_METRIC_NAME_NODE_TEMP_IBC_TEMP,
1829  AMDSMI_METRIC_NAME_NODE_TEMP_IBC_2_TEMP,
1830  AMDSMI_METRIC_NAME_NODE_TEMP_VDD18_VR_TEMP,
1831  AMDSMI_METRIC_NAME_NODE_TEMP_04_HBM_B_VR_TEMP,
1832  AMDSMI_METRIC_NAME_NODE_TEMP_04_HBM_D_VR_TEMP,
1833  AMDSMI_METRIC_NAME_VR_TEMP_VDDCR_VDD0,
1834  AMDSMI_METRIC_NAME_VR_TEMP_VDDCR_VDD1,
1835  AMDSMI_METRIC_NAME_VR_TEMP_VDDCR_VDD2,
1836  AMDSMI_METRIC_NAME_VR_TEMP_VDDCR_VDD3,
1837  AMDSMI_METRIC_NAME_VR_TEMP_VDDCR_SOC_A,
1838  AMDSMI_METRIC_NAME_VR_TEMP_VDDCR_SOC_C,
1839  AMDSMI_METRIC_NAME_VR_TEMP_VDDCR_SOCIO_A,
1840  AMDSMI_METRIC_NAME_VR_TEMP_VDDCR_SOCIO_C,
1841  AMDSMI_METRIC_NAME_VR_TEMP_VDD_085_HBM,
1842  AMDSMI_METRIC_NAME_VR_TEMP_VDDCR_11_HBM_B,
1843  AMDSMI_METRIC_NAME_VR_TEMP_VDDCR_11_HBM_D,
1844  AMDSMI_METRIC_NAME_VR_TEMP_VDD_USR,
1845  AMDSMI_METRIC_NAME_VR_TEMP_VDDIO_11_E32,
1846 
1847  AMDSMI_METRIC_NAME_UNKNOWN
1848 } amdsmi_metric_name_t;
1849 
1855 typedef enum {
1856  AMDSMI_METRIC_UNIT_COUNTER,
1857  AMDSMI_METRIC_UNIT_UINT,
1858  AMDSMI_METRIC_UNIT_BOOL,
1859  AMDSMI_METRIC_UNIT_MHZ,
1860  AMDSMI_METRIC_UNIT_PERCENT,
1861  AMDSMI_METRIC_UNIT_MILLIVOLT,
1862  AMDSMI_METRIC_UNIT_CELSIUS,
1863  AMDSMI_METRIC_UNIT_WATT,
1864  AMDSMI_METRIC_UNIT_JOULE,
1865  AMDSMI_METRIC_UNIT_GBPS,
1866  AMDSMI_METRIC_UNIT_MBITPS,
1867  AMDSMI_METRIC_UNIT_PCIE_GEN,
1868  AMDSMI_METRIC_UNIT_PCIE_LANES,
1869  AMDSMI_METRIC_UNIT_15_625_MILLIJOULE,
1870  AMDSMI_METRIC_UNIT_UNKNOWN
1871 } amdsmi_metric_unit_t;
1872 
1878 typedef enum {
1879  AMDSMI_METRIC_TYPE_COUNTER = (1 << 0),
1880  AMDSMI_METRIC_TYPE_CHIPLET = (1 << 1),
1881  AMDSMI_METRIC_TYPE_INST = (1 << 2),
1882  AMDSMI_METRIC_TYPE_ACC = (1 << 3)
1883 } amdsmi_metric_type_t;
1884 
1885 typedef enum {
1886  AMDSMI_METRIC_RES_GROUP_UNKNOWN,
1887  AMDSMI_METRIC_RES_GROUP_NA,
1888  AMDSMI_METRIC_RES_GROUP_GPU,
1889  AMDSMI_METRIC_RES_GROUP_XCP,
1890  AMDSMI_METRIC_RES_GROUP_AID,
1891  AMDSMI_METRIC_RES_GROUP_MID,
1892  AMDSMI_METRIC_RES_GROUP_SYSTEM
1893 } amdsmi_metric_res_group_t;
1894 
1895 typedef enum {
1896  AMDSMI_METRIC_RES_SUBGROUP_UNKNOWN,
1897  AMDSMI_METRIC_RES_SUBGROUP_NA,
1898  AMDSMI_METRIC_RES_SUBGROUP_XCC,
1899  AMDSMI_METRIC_RES_SUBGROUP_ENGINE,
1900  AMDSMI_METRIC_RES_SUBGROUP_HBM,
1901  AMDSMI_METRIC_RES_SUBGROUP_BASEBOARD,
1902  AMDSMI_METRIC_RES_SUBGROUP_GPUBOARD
1903 } amdsmi_metric_res_subgroup_t;
1904 
1905 typedef enum {
1906  AMDSMI_VF_MODE_1 = (1U << 1),
1907  AMDSMI_VF_MODE_2 = (1U << 2),
1908  AMDSMI_VF_MODE_4 = (1U << 4),
1909  AMDSMI_VF_MODE_8 = (1U << 8),
1910  AMDSMI_VF_MODE_ALL = (AMDSMI_VF_MODE_1 | AMDSMI_VF_MODE_2 | AMDSMI_VF_MODE_4 | AMDSMI_VF_MODE_8)
1911 } amdsmi_vf_mode_t;
1912 
1918 typedef enum {
1919  AMDSMI_DRIVER_MODEL_TYPE_WDDM = 0,
1920  AMDSMI_DRIVER_MODEL_TYPE_WDM = 1,
1921  AMDSMI_DRIVER_MODEL_TYPE_MCDM = 2,
1922  AMDSMI_DRIVER_MODEL_TYPE__MAX = 3,
1923 } amdsmi_driver_model_type_t;
1924 
1930 typedef struct {
1931  uint64_t handle;
1932 } amdsmi_vf_handle_t;
1933 
1939 typedef struct {
1940  amdsmi_vf_handle_t fcn_id;
1941  uint64_t dev_id;
1942  uint64_t timestamp;
1943  uint64_t data;
1944  uint32_t category;
1945  uint32_t subcode;
1946  uint32_t level;
1947  char date[AMDSMI_MAX_STRING_LENGTH];
1948  char message[AMDSMI_MAX_STRING_LENGTH];
1949  uint64_t reserved[6];
1950 } amdsmi_event_entry_t;
1951 
1957 typedef struct {
1958  uint32_t version;
1959 } amdsmi_handshake_t;
1960 
1966 typedef struct {
1967  uint32_t total_fb_size;
1968  uint32_t pf_fb_reserved;
1969  uint32_t pf_fb_offset;
1970  uint32_t fb_alignment;
1971  uint32_t max_vf_fb_usable;
1972  uint32_t min_vf_fb_usable;
1973  uint64_t reserved[5];
1974 } amdsmi_pf_fb_info_t;
1975 
1981 typedef struct {
1982  uint32_t fb_offset;
1983  uint32_t fb_size;
1984  uint64_t reserved[3];
1985 } amdsmi_vf_fb_info_t;
1986 
1992 typedef struct {
1993  amdsmi_vf_handle_t id;
1994  amdsmi_vf_fb_info_t fb;
1995  uint64_t reserved[3];
1996 } amdsmi_partition_info_t;
1997 
2003 typedef struct {
2004  uint8_t enabled;
2005  struct {
2006  amdsmi_guard_state_t state;
2007  /* amount of monitor event after enabled */
2008  uint32_t amount;
2009  /* threshold of events in the interval(seconds) */
2010  uint64_t interval;
2011  uint32_t threshold;
2012  /* current number of events in the interval*/
2013  uint32_t active;
2014  uint32_t reserved[4];
2015  } guard[AMDSMI_GUARD_EVENT__MAX];
2016  uint32_t reserved[6];
2017 } amdsmi_guard_info_t;
2018 
2024 typedef struct {
2025  amdsmi_vf_fb_info_t fb;
2026  uint32_t gfx_timeslice;
2027  uint64_t reserved[27];
2028 } amdsmi_vf_info_t;
2029 
2035 typedef struct {
2036  uint64_t flr_count;
2037  uint64_t boot_up_time;
2038  uint64_t shutdown_time;
2039  uint64_t reset_time;
2040  amdsmi_vf_sched_state_t state;
2041  char last_boot_start[AMDSMI_MAX_STRING_LENGTH];
2042  char last_boot_end[AMDSMI_MAX_STRING_LENGTH];
2043  char last_shutdown_start[AMDSMI_MAX_STRING_LENGTH];
2044  char last_shutdown_end[AMDSMI_MAX_STRING_LENGTH];
2045  char last_reset_start[AMDSMI_MAX_STRING_LENGTH];
2046  char last_reset_end[AMDSMI_MAX_STRING_LENGTH];
2047  char current_active_time[AMDSMI_MAX_STRING_LENGTH];
2048  char current_running_time[AMDSMI_MAX_STRING_LENGTH];
2049  char total_active_time[AMDSMI_MAX_STRING_LENGTH];
2050  char total_running_time[AMDSMI_MAX_STRING_LENGTH];
2051  uint64_t reserved[11];
2052 } amdsmi_sched_info_t;
2053 
2059 typedef struct {
2060  amdsmi_sched_info_t sched;
2061  amdsmi_guard_info_t guard;
2062  uint64_t reserved[8];
2063 } amdsmi_vf_data_t;
2064 
2070 typedef struct {
2071  uint64_t total;
2072  uint64_t available;
2073  uint64_t optimal;
2074  uint64_t min_value;
2075  uint64_t max_value;
2076  uint64_t reserved[2];
2077 } amdsmi_profile_caps_info_t;
2078 
2084 typedef struct {
2085  uint8_t profile_count;
2086  uint8_t current_profile_index;
2087  struct {
2088  uint32_t vf_count;
2089  amdsmi_profile_caps_info_t profile_caps[AMDSMI_PROFILE_CAPABILITY__MAX];
2090  } profiles[AMDSMI_MAX_PROFILE_COUNT];
2091  uint32_t reserved[6];
2092 } amdsmi_profile_info_t;
2093 
2099 typedef struct {
2100  char driver_version[AMDSMI_MAX_STRING_LENGTH];
2101  uint32_t fb_usage;
2102  uint64_t reserved[23];
2103 } amdsmi_guest_data_t;
2104 
2110 typedef struct {
2111  uint32_t dfc_fw_version;
2112  uint32_t dfc_fw_total_entries;
2113  uint32_t dfc_gart_wr_guest_min;
2114  uint32_t dfc_gart_wr_guest_max;
2115  uint32_t reserved[12];
2116 } amdsmi_dfc_fw_header_t;
2117 
2123 typedef struct {
2124  uint32_t oldest;
2125  uint32_t latest;
2126 } amdsmi_dfc_fw_white_list_t;
2127 
2133 typedef struct {
2134  uint8_t ta_uuid[AMDSMI_MAX_UUID_ELEMENTS];
2135 } amdsmi_dfc_fw_ta_uuid_t;
2136 
2142 typedef struct {
2143  uint32_t dfc_fw_type;
2144  uint32_t verification_enabled;
2145  uint32_t customer_ordinal;
2146  uint32_t reserved[13];
2147  union {
2148  amdsmi_dfc_fw_white_list_t white_list[AMDSMI_MAX_WHITE_LIST_ELEMENTS];
2149  amdsmi_dfc_fw_ta_uuid_t ta_white_list[AMDSMI_MAX_TA_WHITE_LIST_ELEMENTS];
2150  };
2151  uint32_t black_list[AMDSMI_MAX_BLACK_LIST_ELEMENTS];
2152 } amdsmi_dfc_fw_data_t;
2153 
2159 typedef struct {
2160  amdsmi_dfc_fw_header_t header;
2161  amdsmi_dfc_fw_data_t data[AMDSMI_DFC_FW_NUMBER_OF_ENTRIES];
2162 } amdsmi_dfc_fw_t;
2163 
2173 typedef struct {
2174  uint64_t retired_page;
2175  uint64_t ts;
2176  unsigned char err_type;
2177  union {
2178  unsigned char bank;
2179  unsigned char cu;
2180  };
2181  unsigned char mem_channel;
2182  unsigned char mcumc_id;
2183  uint32_t reserved[3];
2184 } amdsmi_eeprom_table_record_t;
2185 
2191 typedef struct {
2192  uint64_t timestamp;
2193  uint32_t vf_idx;
2194  uint32_t fw_id;
2195  uint16_t status;
2196  uint32_t reserved[3];
2197 } amdsmi_fw_load_error_record_t;
2198 
2204 typedef struct {
2205  uint8_t num_err_records;
2206  amdsmi_fw_load_error_record_t err_records[AMDSMI_MAX_ERR_RECORDS];
2207  uint64_t reserved[7];
2208 } amdsmi_fw_error_record_t;
2209 
2215 typedef struct {
2216  uint64_t weight;
2217  amdsmi_link_status_t link_status;
2218  amdsmi_link_type_t link_type;
2219  uint8_t num_hops;
2220  uint8_t fb_sharing;
2221  uint32_t reserved[10];
2222 } amdsmi_link_topology_t;
2223 
2229 typedef struct {
2230  uint32_t count;
2231  amdsmi_processor_handle processor_list[AMDSMI_MAX_DEVICES];
2232  uint64_t reserved[15];
2233 } amdsmi_topology_nearest_t;
2234 
2240 typedef union {
2241  struct cap_ {
2242  uint32_t mode_custom_cap :1;
2243  uint32_t mode_1_cap :1;
2244  uint32_t mode_2_cap :1;
2245  uint32_t mode_4_cap :1;
2246  uint32_t mode_8_cap :1;
2247  uint32_t reserved :27;
2248  } cap;
2249  uint32_t xgmi_fb_sharing_cap_mask;
2250 } amdsmi_xgmi_fb_sharing_caps_t;
2251 
2257 typedef struct {
2258  amdsmi_metric_unit_t unit;
2259  amdsmi_metric_name_t name;
2260  amdsmi_metric_category_t category;
2261  uint32_t flags;
2262  uint32_t vf_mask;
2263  uint64_t val;
2264  amdsmi_metric_res_group_t res_group;
2265  amdsmi_metric_res_subgroup_t res_subgroup;
2266  uint32_t res_instance;
2267  uint32_t reserved[5];
2268 } amdsmi_metric_t;
2269 
2275 typedef struct {
2276  uint32_t major;
2277  uint32_t minor;
2278  uint32_t release;
2279 } amdsmi_version_t;
2280 
2281 typedef struct {
2282  amdsmi_accelerator_partition_profile_t profile;
2283  uint32_t vf_mode;
2284  uint64_t reserved[6];
2285 } amdsmi_accelerator_partition_profile_global_t;
2286 
2287 typedef struct {
2288  uint32_t num_profiles;
2289  uint32_t num_resource_profiles;
2290  amdsmi_accelerator_partition_resource_profile_t resource_profiles[AMDSMI_MAX_CP_PROFILE_RESOURCES];
2291  uint32_t default_profile_index;
2292  amdsmi_accelerator_partition_profile_global_t profiles[AMDSMI_MAX_ACCELERATOR_PROFILE];
2293  uint64_t reserved[30];
2294 } amdsmi_accelerator_partition_profile_config_global_t;
2295 
2296 /*****************************************************************************/
2324 amdsmi_status_t amdsmi_init(uint64_t init_flags);
2325 
2339 amdsmi_status_t amdsmi_shut_down(void);
2340 
2343 /*****************************************************************************/
2367 amdsmi_status_t amdsmi_get_processor_type(amdsmi_processor_handle processor_handle,
2368  processor_type_t *processor_type);
2369 
2385 amdsmi_status_t amdsmi_get_processor_handle_from_index(uint32_t processor_index, amdsmi_processor_handle *processor_handle);
2386 
2418 amdsmi_status_t amdsmi_get_socket_handles(uint32_t *socket_count, amdsmi_socket_handle *socket_handles);
2419 
2435 amdsmi_status_t amdsmi_get_index_from_processor_handle(amdsmi_processor_handle processor_handle, uint32_t *processor_index);
2436 
2475 amdsmi_status_t amdsmi_get_processor_handles(amdsmi_socket_handle socket_handle,
2476  uint32_t *processor_count,
2477  amdsmi_processor_handle *processor_handles);
2478 
2498 amdsmi_status_t amdsmi_get_socket_info(amdsmi_socket_handle socket_handle, size_t len, char *name);
2499 
2517 amdsmi_status_t amdsmi_get_processor_handle_from_bdf(amdsmi_bdf_t bdf, amdsmi_processor_handle *processor_handle);
2518 
2533 amdsmi_status_t amdsmi_get_gpu_device_bdf(amdsmi_processor_handle processor_handle, amdsmi_bdf_t *bdf);
2534 
2549 amdsmi_status_t amdsmi_get_processor_handle_from_uuid(const char *uuid, amdsmi_processor_handle *processor_handle);
2550 
2570 amdsmi_status_t amdsmi_get_gpu_device_uuid(amdsmi_processor_handle processor_handle, unsigned int *uuid_length, char *uuid);
2571 
2589  amdsmi_status_t amdsmi_get_gpu_virtualization_mode(amdsmi_processor_handle processor_handle, amdsmi_virtualization_mode_t *mode);
2590 
2616 amdsmi_status_t amdsmi_get_cpu_affinity_with_scope(amdsmi_processor_handle processor_handle,
2617  uint32_t cpu_set_size, uint64_t *cpu_set, amdsmi_affinity_scope_t scope);
2618 
2633 amdsmi_status_t amdsmi_get_vf_handle_from_bdf(amdsmi_bdf_t bdf, amdsmi_vf_handle_t *vf_handle);
2634 
2649 amdsmi_status_t amdsmi_get_vf_handle_from_uuid(const char *uuid, amdsmi_vf_handle_t *vf_handle);
2650 
2666 amdsmi_status_t amdsmi_get_vf_handle_from_vf_index(amdsmi_processor_handle processor_handle, uint32_t fcn_idx, amdsmi_vf_handle_t *vf_handle);
2667 
2681 amdsmi_status_t amdsmi_get_vf_bdf(amdsmi_vf_handle_t vf_handle, amdsmi_bdf_t *bdf);
2682 
2701 amdsmi_status_t amdsmi_get_vf_uuid(amdsmi_vf_handle_t processor_handle, unsigned int *uuid_length, char *uuid);
2702 
2705 /*****************************************************************************/
2726 amdsmi_status_t amdsmi_get_lib_version(amdsmi_version_t *version);
2727 
2730 /*****************************************************************************/
2755 amdsmi_status_t amdsmi_status_code_to_string(amdsmi_status_t status, const char **status_string);
2756 
2759 /*****************************************************************************/
2779 amdsmi_status_t amdsmi_get_gpu_driver_info(amdsmi_processor_handle processor_handle, amdsmi_driver_info_t *info);
2780 
2794 amdsmi_status_t amdsmi_get_gpu_driver_model(amdsmi_processor_handle processor_handle, amdsmi_driver_model_type_t *model);
2795 
2798 /*****************************************************************************/
2822 amdsmi_status_t amdsmi_get_gpu_asic_info(amdsmi_processor_handle processor_handle, amdsmi_asic_info_t *info);
2823 
2843 amdsmi_status_t
2844 amdsmi_get_power_cap_info(amdsmi_processor_handle processor_handle, uint32_t sensor_ind,
2845  amdsmi_power_cap_info_t *info);
2846 
2861 amdsmi_status_t amdsmi_get_pcie_info(amdsmi_processor_handle processor_handle, amdsmi_pcie_info_t *info);
2862 
2877 amdsmi_status_t amdsmi_get_gpu_vram_info(amdsmi_processor_handle processor_handle, amdsmi_vram_info_t *info);
2878 
2893 amdsmi_status_t amdsmi_get_gpu_board_info(amdsmi_processor_handle processor_handle, amdsmi_board_info_t *info);
2894 
2909 amdsmi_status_t amdsmi_get_fb_layout(amdsmi_processor_handle processor_handle, amdsmi_pf_fb_info_t *info);
2910 
2913 /*****************************************************************************/
2932 amdsmi_status_t
2933 amdsmi_get_fw_info(amdsmi_processor_handle processor_handle, amdsmi_fw_info_t *info);
2934 
2950 amdsmi_status_t
2951 amdsmi_get_gpu_vbios_info(amdsmi_processor_handle processor_handle, amdsmi_vbios_info_t *info);
2952 
2967 amdsmi_status_t amdsmi_get_fw_error_records(amdsmi_processor_handle processor_handle, amdsmi_fw_error_record_t *records);
2968 
2982 amdsmi_status_t amdsmi_get_dfc_fw_table(amdsmi_processor_handle processor_handle, amdsmi_dfc_fw_t *info);
2983 
2986 /*****************************************************************************/
3005 amdsmi_status_t amdsmi_get_gpu_activity(amdsmi_processor_handle processor_handle, amdsmi_engine_usage_t *info);
3006 
3023 amdsmi_status_t amdsmi_get_power_info(amdsmi_processor_handle processor_handle, amdsmi_power_info_t *info);
3024 
3038 amdsmi_status_t
3039 amdsmi_is_gpu_power_management_enabled(amdsmi_processor_handle processor_handle, bool *enabled);
3040 
3060 amdsmi_status_t amdsmi_get_clock_info(amdsmi_processor_handle processor_handle, amdsmi_clk_type_t clk_type, amdsmi_clk_info_t *info);
3061 
3091 amdsmi_status_t amdsmi_get_temp_metric(amdsmi_processor_handle processor_handle, amdsmi_temperature_type_t sensor_type,
3092  amdsmi_temperature_metric_t metric, int64_t *temperature);
3093 
3112 amdsmi_status_t amdsmi_get_gpu_metrics(amdsmi_processor_handle processor_handle, uint32_t *metrics_size,
3113  amdsmi_metric_t *metrics);
3114 
3117 /*****************************************************************************/
3136  amdsmi_status_t
3137  amdsmi_get_gpu_memory_partition_config(amdsmi_processor_handle processor_handle,
3138  amdsmi_memory_partition_config_t *config);
3139 
3153 amdsmi_status_t
3154 amdsmi_set_gpu_memory_partition_mode(amdsmi_processor_handle processor_handle, amdsmi_memory_partition_type_t mode);
3155 
3158 /*****************************************************************************/
3180 amdsmi_status_t
3181 amdsmi_get_gpu_accelerator_partition_profile_config(amdsmi_processor_handle processor_handle,
3182  amdsmi_accelerator_partition_profile_config_t *profile_config);
3183 
3204 amdsmi_status_t
3205 amdsmi_get_gpu_accelerator_partition_profile(amdsmi_processor_handle processor_handle,
3206  amdsmi_accelerator_partition_profile_t *profile,
3207  uint32_t *partition_id);
3208 
3226 amdsmi_status_t
3227 amdsmi_set_gpu_accelerator_partition_profile(amdsmi_processor_handle processor_handle,
3228  uint32_t profile_index);
3229 
3252 amdsmi_status_t
3253 amdsmi_get_gpu_accelerator_partition_profile_config_global(amdsmi_processor_handle processor_handle,
3254  amdsmi_accelerator_partition_profile_config_global_t *config);
3255 
3258 /*****************************************************************************/
3277 amdsmi_status_t amdsmi_get_link_metrics(amdsmi_processor_handle processor_handle, amdsmi_link_metrics_t *link_metrics);
3278 
3303 amdsmi_status_t
3304 amdsmi_get_link_topology_nearest(amdsmi_processor_handle processor_handle,
3305  amdsmi_link_type_t link_type,
3306  amdsmi_topology_nearest_t* topology_nearest_info);
3307 
3334 amdsmi_status_t amdsmi_topo_get_p2p_status(amdsmi_processor_handle processor_handle_src,
3335  amdsmi_processor_handle processor_handle_dst,
3336  amdsmi_link_type_t *type, amdsmi_p2p_capability_t *cap);
3337 
3357 amdsmi_status_t amdsmi_topo_get_numa_node_number(amdsmi_processor_handle processor_handle, uint32_t *numa_node);
3358 
3375 amdsmi_status_t amdsmi_get_link_topology(amdsmi_processor_handle processor_handle_src,
3376  amdsmi_processor_handle processor_handle_dst,
3377  amdsmi_link_topology_t *topology_info);
3378 
3393 amdsmi_status_t amdsmi_get_xgmi_fb_sharing_caps(amdsmi_processor_handle processor_handle,
3394  amdsmi_xgmi_fb_sharing_caps_t *caps);
3395 
3414 amdsmi_status_t amdsmi_get_xgmi_fb_sharing_mode_info(amdsmi_processor_handle processor_handle_src,
3415  amdsmi_processor_handle processor_handle_dst,
3416  amdsmi_xgmi_fb_sharing_mode_t mode,
3417  uint8_t *fb_sharing);
3418 
3432 amdsmi_status_t amdsmi_set_xgmi_fb_sharing_mode(amdsmi_processor_handle processor_handle,
3433  amdsmi_xgmi_fb_sharing_mode_t mode);
3434 
3452 amdsmi_status_t amdsmi_set_xgmi_fb_sharing_mode_v2(amdsmi_processor_handle *processor_list,
3453  uint32_t num_processors,
3454  amdsmi_xgmi_fb_sharing_mode_t mode);
3455 
3458 /*****************************************************************************/
3484 amdsmi_status_t amdsmi_get_soc_pstate(amdsmi_processor_handle processor_handle,
3485  amdsmi_dpm_policy_t* policy);
3486 
3508 amdsmi_status_t amdsmi_set_soc_pstate(amdsmi_processor_handle processor_handle,
3509  uint32_t policy_id);
3510 
3530 amdsmi_status_t amdsmi_get_xgmi_plpd(amdsmi_processor_handle processor_handle,
3531  amdsmi_dpm_policy_t *xgmi_plpd);
3532 
3554 amdsmi_status_t amdsmi_set_xgmi_plpd(amdsmi_processor_handle processor_handle,
3555  uint32_t policy_id);
3556 
3559 /*****************************************************************************/
3586 amdsmi_status_t amdsmi_set_power_cap(amdsmi_processor_handle processor_handle,
3587  uint32_t sensor_ind, uint64_t cap);
3588 
3591 /*****************************************************************************/
3612 amdsmi_status_t amdsmi_get_gpu_cache_info(amdsmi_processor_handle processor_handle, amdsmi_gpu_cache_info_t *info);
3613 
3616 /*****************************************************************************/
3647 amdsmi_status_t amdsmi_get_gpu_ecc_count(amdsmi_processor_handle processor_handle,
3648  amdsmi_gpu_block_t block, amdsmi_error_count_t *ec);
3649 
3678 amdsmi_status_t amdsmi_get_gpu_ecc_enabled(amdsmi_processor_handle processor_handle,
3679  uint64_t *enabled_blocks);
3680 
3697 amdsmi_status_t
3698 amdsmi_get_gpu_total_ecc_count(amdsmi_processor_handle processor_handle, amdsmi_error_count_t *ec);
3699 
3725 amdsmi_status_t amdsmi_get_bad_page_threshold(amdsmi_processor_handle processor_handle, uint32_t *threshold);
3726 
3763 amdsmi_status_t
3764 amdsmi_get_gpu_cper_entries(amdsmi_processor_handle processor_handle, uint32_t severity_mask, char *cper_data,
3765  uint64_t *buf_size, amdsmi_cper_hdr_t** cper_hdrs, uint64_t *entry_count, uint64_t *cursor);
3766 
3792 amdsmi_status_t amdsmi_get_afids_from_cper(char *cper_buffer, uint32_t buf_size, uint64_t *afids, uint32_t *num_afids);
3793 
3808 amdsmi_status_t amdsmi_get_gpu_ras_feature_info(amdsmi_processor_handle processor_handle, amdsmi_ras_feature_t *ras_feature);
3809 
3829 amdsmi_status_t amdsmi_get_gpu_bad_page_info(amdsmi_processor_handle processor_handle, uint32_t *bad_page_size,
3830  amdsmi_eeprom_table_record_t *bad_pages);
3831 
3834 /*****************************************************************************/
3855 amdsmi_status_t amdsmi_reset_gpu(amdsmi_processor_handle processor_handle);
3856 
3859 /*****************************************************************************/
3881 amdsmi_status_t
3882 amdsmi_get_num_vf(amdsmi_processor_handle processor_handle, uint32_t *num_vf_enabled,
3883  uint32_t *num_vf_supported);
3884 
3903 amdsmi_status_t
3904 amdsmi_get_vf_partition_info(amdsmi_processor_handle processor_handle, unsigned int vf_buffer_num,
3905  amdsmi_partition_info_t *info);
3906 
3921 amdsmi_status_t
3922 amdsmi_get_partition_profile_info(amdsmi_processor_handle processor_handle,
3923  amdsmi_profile_info_t *profile_info);
3924 
3927 /*****************************************************************************/
3946 amdsmi_status_t
3947 amdsmi_get_vf_info(amdsmi_vf_handle_t vf_handle, amdsmi_vf_info_t *config);
3948 
3963 amdsmi_status_t
3964 amdsmi_get_vf_data(amdsmi_vf_handle_t vf_handle, amdsmi_vf_data_t *info);
3965 
3968 /*****************************************************************************/
4008 amdsmi_status_t
4009 amdsmi_event_create(amdsmi_processor_handle *processor_list, uint32_t num_devices,
4010  uint64_t event_types, amdsmi_event_set *set);
4011 
4043 amdsmi_status_t
4044 amdsmi_event_read(amdsmi_event_set set, int64_t timeout_usec, amdsmi_event_entry_t *event);
4045 
4057 amdsmi_status_t
4058 amdsmi_event_destroy(amdsmi_event_set set);
4059 
4062 /*****************************************************************************/
4084 amdsmi_status_t
4085 amdsmi_get_guest_data(amdsmi_vf_handle_t vf_handle, amdsmi_guest_data_t *info);
4086 
4102 amdsmi_status_t
4103 amdsmi_get_vf_fw_info(amdsmi_vf_handle_t vf_handle, amdsmi_fw_info_t *info);
4104 
4107 /*****************************************************************************/
4124 amdsmi_status_t amdsmi_clear_vf_fb(amdsmi_vf_handle_t vf_handle);
4125 
4139 amdsmi_status_t amdsmi_set_num_vf(amdsmi_processor_handle processor_handle, uint32_t num_vf);
4140 
4143 #endif // __AMDSMI_H__
4144 
amdsmi_event_reset_t
amdsmi_event_reset_t
Event Reset.
Definition: amdsmi.h:1263
amdsmi_vf_mode_t
amdsmi_vf_mode_t
Definition: amdsmi.h:1905
AMDSMI_VF_MODE_ALL
@ AMDSMI_VF_MODE_ALL
All VF counts supported.
Definition: amdsmi.h:1910
AMDSMI_MAX_ACCELERATOR_PROFILE
#define AMDSMI_MAX_ACCELERATOR_PROFILE
Maximum number of accelerator profiles.
Definition: amdsmi.h:163
AMDSMI_MAX_WHITE_LIST_ELEMENTS
#define AMDSMI_MAX_WHITE_LIST_ELEMENTS
Maximum number of white list elements for device access control.
Definition: amdsmi.h:182
amdsmi_event_fw_t
amdsmi_event_fw_t
Event Firmware.
Definition: amdsmi.h:1209
amdsmi_metric_category_t
amdsmi_metric_category_t
Metric Category.
Definition: amdsmi.h:1700
amdsmi_link_type_t
amdsmi_link_type_t
Link type.
Definition: amdsmi.h:377
AMDSMI_LINK_TYPE_NOT_APPLICABLE
@ AMDSMI_LINK_TYPE_NOT_APPLICABLE
Not Applicable Link Type.
Definition: amdsmi.h:381
AMDSMI_LINK_TYPE_INTERNAL
@ AMDSMI_LINK_TYPE_INTERNAL
Internal Link Type, within chip.
Definition: amdsmi.h:378
AMDSMI_LINK_TYPE_UNKNOWN
@ AMDSMI_LINK_TYPE_UNKNOWN
Unknown Link Type.
Definition: amdsmi.h:382
AMDSMI_LINK_TYPE_PCIE
@ AMDSMI_LINK_TYPE_PCIE
Peripheral Component Interconnect Express Link Type.
Definition: amdsmi.h:379
AMDSMI_LINK_TYPE_XGMI
@ AMDSMI_LINK_TYPE_XGMI
GPU Memory Interconnect (multi GPU communication)
Definition: amdsmi.h:380
amdsmi_event_xgmi_t
amdsmi_event_xgmi_t
Event XGMI.
Definition: amdsmi.h:1513
AMDSMI_MAX_PROFILE_COUNT
#define AMDSMI_MAX_PROFILE_COUNT
Maximum number of profiles supported.
Definition: amdsmi.h:187
amdsmi_event_ecc_t
amdsmi_event_ecc_t
Event ECC.
Definition: amdsmi.h:1301
amdsmi_event_gpumon_t
amdsmi_event_gpumon_t
Event GPU Monitor.
Definition: amdsmi.h:1478
amdsmi_accelerator_partition_type_t
amdsmi_accelerator_partition_type_t
Accelerator Partition.
Definition: amdsmi.h:224
AMDSMI_ACCELERATOR_PARTITION_DPX
@ AMDSMI_ACCELERATOR_PARTITION_DPX
Definition: amdsmi.h:228
AMDSMI_ACCELERATOR_PARTITION_QPX
@ AMDSMI_ACCELERATOR_PARTITION_QPX
Definition: amdsmi.h:232
AMDSMI_ACCELERATOR_PARTITION_INVALID
@ AMDSMI_ACCELERATOR_PARTITION_INVALID
Invalid accelerator partition type.
Definition: amdsmi.h:225
AMDSMI_ACCELERATOR_PARTITION_SPX
@ AMDSMI_ACCELERATOR_PARTITION_SPX
Definition: amdsmi.h:226
AMDSMI_ACCELERATOR_PARTITION_TPX
@ AMDSMI_ACCELERATOR_PARTITION_TPX
Definition: amdsmi.h:230
AMDSMI_ACCELERATOR_PARTITION_CPX
@ AMDSMI_ACCELERATOR_PARTITION_CPX
Definition: amdsmi.h:234
amdsmi_event_guard_t
amdsmi_event_guard_t
Event Guard.
Definition: amdsmi.h:1467
amdsmi_vf_config_flags_t
amdsmi_vf_config_flags_t
VF Config Flags.
Definition: amdsmi.h:1569
amdsmi_clk_type_t
amdsmi_clk_type_t
Clock types.
Definition: amdsmi.h:285
AMDSMI_CLK_TYPE_DCLK1
@ AMDSMI_CLK_TYPE_DCLK1
Display 2 clock, timing signals for display output.
Definition: amdsmi.h:299
AMDSMI_CLK_TYPE_MEM
@ AMDSMI_CLK_TYPE_MEM
Memory clock speed, system operating frequency.
Definition: amdsmi.h:294
AMDSMI_CLK_TYPE_SYS
@ AMDSMI_CLK_TYPE_SYS
System clock.
Definition: amdsmi.h:286
AMDSMI_CLK_TYPE_SOC
@ AMDSMI_CLK_TYPE_SOC
System On Chip clock, integrated circuit frequency.
Definition: amdsmi.h:293
AMDSMI_CLK_TYPE_GFX
@ AMDSMI_CLK_TYPE_GFX
Graphics clock.
Definition: amdsmi.h:288
AMDSMI_CLK_TYPE_DCLK0
@ AMDSMI_CLK_TYPE_DCLK0
Display 1 clock, timing signals for display output.
Definition: amdsmi.h:298
AMDSMI_CLK_TYPE_DCEF
@ AMDSMI_CLK_TYPE_DCEF
Definition: amdsmi.h:291
AMDSMI_CLK_TYPE_VCLK1
@ AMDSMI_CLK_TYPE_VCLK1
Video 1 clock, video processing units.
Definition: amdsmi.h:297
AMDSMI_CLK_TYPE_DF
@ AMDSMI_CLK_TYPE_DF
Definition: amdsmi.h:289
AMDSMI_CLK_TYPE_VCLK0
@ AMDSMI_CLK_TYPE_VCLK0
Video 0 clock, video processing units.
Definition: amdsmi.h:296
AMDSMI_CLK_TYPE_PCIE
@ AMDSMI_CLK_TYPE_PCIE
PCI Express clock, high bandwidth peripherals.
Definition: amdsmi.h:295
amdsmi_accelerator_partition_resource_type_t
amdsmi_accelerator_partition_resource_type_t
Accelerator Partition Resource Types.
Definition: amdsmi.h:271
AMDSMI_ACCELERATOR_DMA
@ AMDSMI_ACCELERATOR_DMA
Direct Memory Access, high speed data transfers.
Definition: amdsmi.h:275
AMDSMI_ACCELERATOR_XCC
@ AMDSMI_ACCELERATOR_XCC
Compute complex or stream processors.
Definition: amdsmi.h:272
AMDSMI_ACCELERATOR_DECODER
@ AMDSMI_ACCELERATOR_DECODER
Video decoding.
Definition: amdsmi.h:274
AMDSMI_ACCELERATOR_JPEG
@ AMDSMI_ACCELERATOR_JPEG
Encoding and Decoding jpeg engines.
Definition: amdsmi.h:276
AMDSMI_ACCELERATOR_ENCODER
@ AMDSMI_ACCELERATOR_ENCODER
Video encoding.
Definition: amdsmi.h:273
AMDSMI_MAX_ERR_RECORDS
#define AMDSMI_MAX_ERR_RECORDS
Maximum number of error records that can be stored.
Definition: amdsmi.h:186
amdsmi_card_form_factor_t
amdsmi_card_form_factor_t
Card Form Factor.
Definition: amdsmi.h:365
AMDSMI_CARD_FORM_FACTOR_OAM
@ AMDSMI_CARD_FORM_FACTOR_OAM
OAM form factor.
Definition: amdsmi.h:367
AMDSMI_CARD_FORM_FACTOR_UNKNOWN
@ AMDSMI_CARD_FORM_FACTOR_UNKNOWN
Unknown Form factor.
Definition: amdsmi.h:369
AMDSMI_CARD_FORM_FACTOR_PCIE
@ AMDSMI_CARD_FORM_FACTOR_PCIE
PCIE card form factor.
Definition: amdsmi.h:366
AMDSMI_CARD_FORM_FACTOR_CEM
@ AMDSMI_CARD_FORM_FACTOR_CEM
CEM form factor.
Definition: amdsmi.h:368
AMDSMI_MAX_NUM_XGMI_PHYSICAL_LINK
#define AMDSMI_MAX_NUM_XGMI_PHYSICAL_LINK
Common defines.
Definition: amdsmi.h:148
amdsmi_guard_type_t
amdsmi_guard_type_t
Guard Event.
Definition: amdsmi.h:1605
amdsmi_profile_capability_type_t
amdsmi_profile_capability_type_t
Profile Capability.
Definition: amdsmi.h:1687
AMDSMI_PROFILE_CAPABILITY_DECODE
@ AMDSMI_PROFILE_CAPABILITY_DECODE
decode engine
Definition: amdsmi.h:1690
AMDSMI_PROFILE_CAPABILITY_MEMORY
@ AMDSMI_PROFILE_CAPABILITY_MEMORY
memory
Definition: amdsmi.h:1688
AMDSMI_PROFILE_CAPABILITY_ENCODE
@ AMDSMI_PROFILE_CAPABILITY_ENCODE
encode engine
Definition: amdsmi.h:1689
AMDSMI_PROFILE_CAPABILITY_COMPUTE
@ AMDSMI_PROFILE_CAPABILITY_COMPUTE
compute engine
Definition: amdsmi.h:1691
amdsmi_init_flags_t
amdsmi_init_flags_t
Initialization flags.
Definition: amdsmi.h:44
AMDSMI_INIT_AMD_GPUS
@ AMDSMI_INIT_AMD_GPUS
Initialize AMD GPUS.
Definition: amdsmi.h:47
AMDSMI_INIT_ALL_PROCESSORS
@ AMDSMI_INIT_ALL_PROCESSORS
Initialize all processors.
Definition: amdsmi.h:45
AMDSMI_INIT_AMD_CPUS
@ AMDSMI_INIT_AMD_CPUS
Initialize AMD CPUS.
Definition: amdsmi.h:46
AMDSMI_INIT_NON_AMD_GPUS
@ AMDSMI_INIT_NON_AMD_GPUS
Initialize Non-AMD GPUS.
Definition: amdsmi.h:49
AMDSMI_INIT_NON_AMD_CPUS
@ AMDSMI_INIT_NON_AMD_CPUS
Initialize Non-AMD CPUS.
Definition: amdsmi.h:48
AMDSMI_INIT_AMD_APUS
@ AMDSMI_INIT_AMD_APUS
Definition: amdsmi.h:50
amdsmi_event_pp_t
amdsmi_event_pp_t
Event PP.
Definition: amdsmi.h:1370
amdsmi_event_vbios_t
amdsmi_event_vbios_t
Event VBios.
Definition: amdsmi.h:1440
amdsmi_event_set
void * amdsmi_event_set
Opague Handler point to underlying implementation.
Definition: amdsmi.h:1091
amdsmi_vram_type_t
amdsmi_vram_type_t
vRam Types. This enum is used to identify various VRam types.
Definition: amdsmi.h:244
AMDSMI_VRAM_TYPE_GDDR2
@ AMDSMI_VRAM_TYPE_GDDR2
Graphics Double Data Rate, Generation 2.
Definition: amdsmi.h:258
AMDSMI_VRAM_TYPE_HBM2E
@ AMDSMI_VRAM_TYPE_HBM2E
High Bandwidth Memory, Generation 2 Enhanced.
Definition: amdsmi.h:249
AMDSMI_VRAM_TYPE_GDDR6
@ AMDSMI_VRAM_TYPE_GDDR6
Graphics Double Data Rate, Generation 6.
Definition: amdsmi.h:262
AMDSMI_VRAM_TYPE_HBM
@ AMDSMI_VRAM_TYPE_HBM
High Bandwidth Memory.
Definition: amdsmi.h:247
AMDSMI_VRAM_TYPE_GDDR3
@ AMDSMI_VRAM_TYPE_GDDR3
Graphics Double Data Rate, Generation 3.
Definition: amdsmi.h:259
AMDSMI_VRAM_TYPE_GDDR1
@ AMDSMI_VRAM_TYPE_GDDR1
Graphics Double Data Rate, Generation 1.
Definition: amdsmi.h:257
AMDSMI_VRAM_TYPE_HBM3
@ AMDSMI_VRAM_TYPE_HBM3
High Bandwidth Memory, Generation 3.
Definition: amdsmi.h:250
AMDSMI_VRAM_TYPE_HBM3E
@ AMDSMI_VRAM_TYPE_HBM3E
High Bandwidth Memory, Generation 3 Enhanced.
Definition: amdsmi.h:251
AMDSMI_VRAM_TYPE_GDDR5
@ AMDSMI_VRAM_TYPE_GDDR5
Graphics Double Data Rate, Generation 5.
Definition: amdsmi.h:261
AMDSMI_VRAM_TYPE_DDR3
@ AMDSMI_VRAM_TYPE_DDR3
Double Data Rate, Generation 3.
Definition: amdsmi.h:254
AMDSMI_VRAM_TYPE_GDDR4
@ AMDSMI_VRAM_TYPE_GDDR4
Graphics Double Data Rate, Generation 4.
Definition: amdsmi.h:260
AMDSMI_VRAM_TYPE_DDR2
@ AMDSMI_VRAM_TYPE_DDR2
Double Data Rate, Generation 2.
Definition: amdsmi.h:253
AMDSMI_VRAM_TYPE_GDDR7
@ AMDSMI_VRAM_TYPE_GDDR7
Graphics Double Data Rate, Generation 7.
Definition: amdsmi.h:263
AMDSMI_VRAM_TYPE_HBM2
@ AMDSMI_VRAM_TYPE_HBM2
High Bandwidth Memory, Generation 2.
Definition: amdsmi.h:248
AMDSMI_VRAM_TYPE_DDR4
@ AMDSMI_VRAM_TYPE_DDR4
Double Data Rate, Generation 4.
Definition: amdsmi.h:255
AMDSMI_VRAM_TYPE_UNKNOWN
@ AMDSMI_VRAM_TYPE_UNKNOWN
Unknown memory type.
Definition: amdsmi.h:245
amdsmi_event_vf_max_t
amdsmi_event_vf_max_t
Event VF.
Definition: amdsmi.h:1421
amdsmi_metric_type_t
amdsmi_metric_type_t
Metric Type.
Definition: amdsmi.h:1878
AMDSMI_METRIC_TYPE_COUNTER
@ AMDSMI_METRIC_TYPE_COUNTER
counter metric
Definition: amdsmi.h:1879
AMDSMI_METRIC_TYPE_CHIPLET
@ AMDSMI_METRIC_TYPE_CHIPLET
chiplet metric
Definition: amdsmi.h:1880
AMDSMI_METRIC_TYPE_ACC
@ AMDSMI_METRIC_TYPE_ACC
accumulated metric
Definition: amdsmi.h:1882
AMDSMI_METRIC_TYPE_INST
@ AMDSMI_METRIC_TYPE_INST
instantaneous metric
Definition: amdsmi.h:1881
AMDSMI_MAX_ACCELERATOR_PARTITIONS
#define AMDSMI_MAX_ACCELERATOR_PARTITIONS
Maximum number of accelerator partitions.
Definition: amdsmi.h:162
amdsmi_cper_notify_type_t
amdsmi_cper_notify_type_t
Cper notify.
Definition: amdsmi.h:955
AMDSMI_CPER_NOTIFY_TYPE_DMAR
@ AMDSMI_CPER_NOTIFY_TYPE_DMAR
Direct Memory Access Remapping Error.
Definition: amdsmi.h:963
AMDSMI_CPER_NOTIFY_TYPE_NMI
@ AMDSMI_CPER_NOTIFY_TYPE_NMI
Non_Maskable Interrupt.
Definition: amdsmi.h:961
AMDSMI_CPER_NOTIFY_TYPE_SEI
@ AMDSMI_CPER_NOTIFY_TYPE_SEI
System Error Interface.
Definition: amdsmi.h:965
AMDSMI_CPER_NOTIFY_TYPE_CMC
@ AMDSMI_CPER_NOTIFY_TYPE_CMC
Corrected Memory Check.
Definition: amdsmi.h:956
AMDSMI_CPER_NOTIFY_TYPE_CPE
@ AMDSMI_CPER_NOTIFY_TYPE_CPE
Corrected Platform Error.
Definition: amdsmi.h:957
AMDSMI_CPER_NOTIFY_TYPE_CXL_COMPONENT
@ AMDSMI_CPER_NOTIFY_TYPE_CXL_COMPONENT
Compute Express Link Component Error.
Definition: amdsmi.h:967
AMDSMI_CPER_NOTIFY_TYPE_SEA
@ AMDSMI_CPER_NOTIFY_TYPE_SEA
System Error Architecture.
Definition: amdsmi.h:964
AMDSMI_CPER_NOTIFY_TYPE_PEI
@ AMDSMI_CPER_NOTIFY_TYPE_PEI
Platform Error Interface.
Definition: amdsmi.h:966
AMDSMI_CPER_NOTIFY_TYPE_MCE
@ AMDSMI_CPER_NOTIFY_TYPE_MCE
Machine Check Exception.
Definition: amdsmi.h:958
AMDSMI_CPER_NOTIFY_TYPE_BOOT
@ AMDSMI_CPER_NOTIFY_TYPE_BOOT
Boot Error.
Definition: amdsmi.h:962
AMDSMI_CPER_NOTIFY_TYPE_PCIE
@ AMDSMI_CPER_NOTIFY_TYPE_PCIE
PCI Express Error.
Definition: amdsmi.h:959
AMDSMI_CPER_NOTIFY_TYPE_INIT
@ AMDSMI_CPER_NOTIFY_TYPE_INIT
Initialization Error.
Definition: amdsmi.h:960
AMDSMI_MAX_CP_PROFILE_RESOURCES
#define AMDSMI_MAX_CP_PROFILE_RESOURCES
Maximum number of compute profile resources.
Definition: amdsmi.h:161
processor_type_t
processor_type_t
Processor types detectable by AMD SMI.
Definition: amdsmi.h:133
AMDSMI_PROCESSOR_TYPE_AMD_APU
@ AMDSMI_PROCESSOR_TYPE_AMD_APU
AMD Accelerated processor type (GPU and CPU)
Definition: amdsmi.h:140
AMDSMI_PROCESSOR_TYPE_UNKNOWN
@ AMDSMI_PROCESSOR_TYPE_UNKNOWN
Unknown processor type.
Definition: amdsmi.h:134
AMDSMI_PROCESSOR_TYPE_NON_AMD_CPU
@ AMDSMI_PROCESSOR_TYPE_NON_AMD_CPU
Non-AMD CPU processor type.
Definition: amdsmi.h:138
AMDSMI_PROCESSOR_TYPE_AMD_CPU
@ AMDSMI_PROCESSOR_TYPE_AMD_CPU
AMD CPU processor type.
Definition: amdsmi.h:136
AMDSMI_PROCESSOR_TYPE_AMD_CPU_CORE
@ AMDSMI_PROCESSOR_TYPE_AMD_CPU_CORE
AMD CPU-Core processor type.
Definition: amdsmi.h:139
AMDSMI_PROCESSOR_TYPE_AMD_GPU
@ AMDSMI_PROCESSOR_TYPE_AMD_GPU
AMD Graphics processor type.
Definition: amdsmi.h:135
AMDSMI_PROCESSOR_TYPE_NON_AMD_GPU
@ AMDSMI_PROCESSOR_TYPE_NON_AMD_GPU
Non-AMD Graphics processor type.
Definition: amdsmi.h:137
amdsmi_fw_block_t
amdsmi_fw_block_t
The values of this enum are used to identify the various firmware blocks.
Definition: amdsmi.h:435
AMDSMI_FW_ID_ASD
@ AMDSMI_FW_ID_ASD
Asynchronous Shader Dispatcher.
Definition: amdsmi.h:509
AMDSMI_FW_ID_RS64_ME_P0_DATA
@ AMDSMI_FW_ID_RS64_ME_P0_DATA
Hardware Block RS64 - Micro Engine Partition 0 Data.
Definition: amdsmi.h:491
AMDSMI_FW_ID_RLC_RESTORE_LIST_SRM_MEM
@ AMDSMI_FW_ID_RLC_RESTORE_LIST_SRM_MEM
Rasterizier and L2 Cache Restore List System RAM Memory.
Definition: amdsmi.h:462
AMDSMI_FW_ID_SDMA7
@ AMDSMI_FW_ID_SDMA7
System Direct Memory Access 7 (high speed data transfers)
Definition: amdsmi.h:454
AMDSMI_FW_ID_PSP_BL
@ AMDSMI_FW_ID_PSP_BL
Platform Security Processor Bootloader (initial firmware)
Definition: amdsmi.h:474
AMDSMI_FW_ID_RLC
@ AMDSMI_FW_ID_RLC
Rasterizer and L2 Cache (rasterization processs)
Definition: amdsmi.h:446
AMDSMI_FW_ID_RS64_PFP
@ AMDSMI_FW_ID_RS64_PFP
Hardware Block RS64 - Pixel Front End Processor.
Definition: amdsmi.h:493
AMDSMI_FW_ID_SDMA_TH1
@ AMDSMI_FW_ID_SDMA_TH1
System Direct Memory Access - Thread Handler 1.
Definition: amdsmi.h:482
AMDSMI_FW_ID_MMSCH
@ AMDSMI_FW_ID_MMSCH
Multi-Media Shader Hardware Scheduler.
Definition: amdsmi.h:465
AMDSMI_FW_ID_RLX6
@ AMDSMI_FW_ID_RLX6
Hardware Block RLX6.
Definition: amdsmi.h:488
AMDSMI_FW_ID_PSP_SOSDRV
@ AMDSMI_FW_ID_PSP_SOSDRV
Platform Security Processor Secure Operating System Driver.
Definition: amdsmi.h:467
AMDSMI_FW_ID_TA_RAS
@ AMDSMI_FW_ID_TA_RAS
Trusted Applications - Reliablity Availability and Serviceability.
Definition: amdsmi.h:510
AMDSMI_FW_ID_PSP_KEYDB
@ AMDSMI_FW_ID_PSP_KEYDB
Platform Security Processor Table of Contents.
Definition: amdsmi.h:469
AMDSMI_FW_ID_RLC_SRLS
@ AMDSMI_FW_ID_RLC_SRLS
Rasterizier and L2 Cache - Shared Resource Local Segment.
Definition: amdsmi.h:514
AMDSMI_FW_ID_VCE
@ AMDSMI_FW_ID_VCE
Video Coding Engine (Encoding video)
Definition: amdsmi.h:457
AMDSMI_FW_ID_DMCU_ISR
@ AMDSMI_FW_ID_DMCU_ISR
Digital Micro Controller Unit - Interrupt Service Routine (interrupt handlers)
Definition: amdsmi.h:460
AMDSMI_FW_ID_SDMA6
@ AMDSMI_FW_ID_SDMA6
System Direct Memory Access 6 (high speed data transfers)
Definition: amdsmi.h:453
AMDSMI_FW_ID_PSP_DBG
@ AMDSMI_FW_ID_PSP_DBG
Platform Security Processor - Debug.
Definition: amdsmi.h:503
AMDSMI_FW_ID_CP_CE
@ AMDSMI_FW_ID_CP_CE
Compute Processor - Command_Engine (fetch, decode, dispatch)
Definition: amdsmi.h:439
AMDSMI_FW_ID_P2S_TABLE
@ AMDSMI_FW_ID_P2S_TABLE
Processor-to-System Table Firmware.
Definition: amdsmi.h:519
AMDSMI_FW_ID_DRV_CAP
@ AMDSMI_FW_ID_DRV_CAP
Driver Capabilities (capabilities, features)
Definition: amdsmi.h:472
AMDSMI_FW_ID_RS64_ME_P1_DATA
@ AMDSMI_FW_ID_RS64_ME_P1_DATA
Hardware Block RS64 - Micro Engine Partition 1 Data.
Definition: amdsmi.h:492
AMDSMI_FW_ID_MES_THREAD1
@ AMDSMI_FW_ID_MES_THREAD1
Micro Engine Scheduler - Thread 1.
Definition: amdsmi.h:486
AMDSMI_FW_ID_PM
@ AMDSMI_FW_ID_PM
Power Management Firmware.
Definition: amdsmi.h:515
AMDSMI_FW_ID_SDMA0
@ AMDSMI_FW_ID_SDMA0
System Direct Memory Access 0 (high speed data transfers)
Definition: amdsmi.h:447
AMDSMI_FW_ID_ISP
@ AMDSMI_FW_ID_ISP
Image Signal Processor (processing raw image data from sensors)
Definition: amdsmi.h:458
AMDSMI_FW_ID_PSP_SOC
@ AMDSMI_FW_ID_PSP_SOC
Platform Security Processor - System On a Chip.
Definition: amdsmi.h:502
AMDSMI_FW_ID_CP_PM4
@ AMDSMI_FW_ID_CP_PM4
Compute Processor Packet Processor 4 (processing command packets)
Definition: amdsmi.h:475
AMDSMI_FW_ID_RLC_P
@ AMDSMI_FW_ID_RLC_P
Rasterizier and L2 Cache Partition.
Definition: amdsmi.h:476
AMDSMI_FW_ID_SDMA_TH0
@ AMDSMI_FW_ID_SDMA_TH0
System Direct Memory Access - Thread Handler 0.
Definition: amdsmi.h:481
AMDSMI_FW_ID_MC
@ AMDSMI_FW_ID_MC
Memory Contoller (RAM and VRAM)
Definition: amdsmi.h:473
AMDSMI_FW_ID_VCN
@ AMDSMI_FW_ID_VCN
Video Core Next (encoding and decoding)
Definition: amdsmi.h:455
AMDSMI_FW_ID_RLX6_DRAM_BOOT_CORE1
@ AMDSMI_FW_ID_RLX6_DRAM_BOOT_CORE1
Hardware Block RLX6 Core 1 - Dynamic RAM Boot.
Definition: amdsmi.h:506
AMDSMI_FW_ID_MES_STACK
@ AMDSMI_FW_ID_MES_STACK
Micro Engine Scheduler - Stack.
Definition: amdsmi.h:485
AMDSMI_FW_ID_XGMI
@ AMDSMI_FW_ID_XGMI
XGMI (Interconnect) Firmware.
Definition: amdsmi.h:512
AMDSMI_FW_ID_PSP_TOC
@ AMDSMI_FW_ID_PSP_TOC
Platform Security Processor Table of Contents.
Definition: amdsmi.h:468
AMDSMI_FW_ID_IMU_IRAM
@ AMDSMI_FW_ID_IMU_IRAM
Input/Output Memory Management Unit - Instruction RAM.
Definition: amdsmi.h:480
AMDSMI_FW_ID_SEC_POLICY_STAGE2
@ AMDSMI_FW_ID_SEC_POLICY_STAGE2
Security Policy Stage 2 (security features)
Definition: amdsmi.h:477
AMDSMI_FW_ID_RS64_MEC_P2_DATA
@ AMDSMI_FW_ID_RS64_MEC_P2_DATA
Hardware Block RS64 - Micro Engine Controller Partition 2 Data.
Definition: amdsmi.h:499
AMDSMI_FW_ID_PLDM_BUNDLE
@ AMDSMI_FW_ID_PLDM_BUNDLE
Platform Level Data Model Firmware Bundle.
Definition: amdsmi.h:520
AMDSMI_FW_ID_TA_XGMI
@ AMDSMI_FW_ID_TA_XGMI
Trusted Applications - Reliablity XGMI.
Definition: amdsmi.h:511
AMDSMI_FW_ID_RS64_ME
@ AMDSMI_FW_ID_RS64_ME
Hardware Block RS64 - Micro Engine.
Definition: amdsmi.h:490
AMDSMI_FW_ID_SDMA3
@ AMDSMI_FW_ID_SDMA3
System Direct Memory Access 3 (high speed data transfers)
Definition: amdsmi.h:450
AMDSMI_FW_ID_SDMA1
@ AMDSMI_FW_ID_SDMA1
System Direct Memory Access 1 (high speed data transfers)
Definition: amdsmi.h:448
AMDSMI_FW_ID_CP_ME
@ AMDSMI_FW_ID_CP_ME
Compute Processor - Micro Engine (specialize processing)
Definition: amdsmi.h:441
AMDSMI_FW_ID_RS64_MEC_P3_DATA
@ AMDSMI_FW_ID_RS64_MEC_P3_DATA
Hardware Block RS64 - Micro Engine Controller Partition 3 Data.
Definition: amdsmi.h:500
AMDSMI_FW_ID_CP_MEC_JT1
@ AMDSMI_FW_ID_CP_MEC_JT1
Compute Processor - Micro Engine Controler Job Table 1 (queues, scheduling)
Definition: amdsmi.h:442
AMDSMI_FW_ID_UVD
@ AMDSMI_FW_ID_UVD
Unified Video Decoder (decode specific video formats)
Definition: amdsmi.h:456
AMDSMI_FW_ID_RLC_V
@ AMDSMI_FW_ID_RLC_V
Rasterizier and L2 Cache Virtual memory.
Definition: amdsmi.h:464
AMDSMI_FW_ID_SMC
@ AMDSMI_FW_ID_SMC
System Management Controller Firmware.
Definition: amdsmi.h:516
AMDSMI_FW_ID_SDMA4
@ AMDSMI_FW_ID_SDMA4
System Direct Memory Access 4 (high speed data transfers)
Definition: amdsmi.h:451
AMDSMI_FW_ID_MES_KIQ
@ AMDSMI_FW_ID_MES_KIQ
Micro Engine Scheduler - Kernel Indirect Queue.
Definition: amdsmi.h:484
AMDSMI_FW_ID_DMCU
@ AMDSMI_FW_ID_DMCU
Display Micro-Controller Unit.
Definition: amdsmi.h:517
AMDSMI_FW_ID_RLC_SRLG
@ AMDSMI_FW_ID_RLC_SRLG
Rasterizier and L2 Cache - Shared Resource Local Group.
Definition: amdsmi.h:513
AMDSMI_FW_ID_RS64_PFP_P1_DATA
@ AMDSMI_FW_ID_RS64_PFP_P1_DATA
Hardware Block RS64 - Pixel Front End Processor Partition 1 Data.
Definition: amdsmi.h:495
AMDSMI_FW_ID_RLX6_DRAM_BOOT
@ AMDSMI_FW_ID_RLX6_DRAM_BOOT
Hardware Block RLX6 - Dynamic Ram Boot.
Definition: amdsmi.h:489
AMDSMI_FW_ID_IMU_DRAM
@ AMDSMI_FW_ID_IMU_DRAM
Input/Output Memory Management Unit - Dynamic RAM.
Definition: amdsmi.h:479
AMDSMI_FW_ID_CP_MEC1
@ AMDSMI_FW_ID_CP_MEC1
Compute Processor - Micro Engine Controler 1 (scheduling, managing resources)
Definition: amdsmi.h:444
AMDSMI_FW_ID_RLC_RESTORE_LIST_CNTL
@ AMDSMI_FW_ID_RLC_RESTORE_LIST_CNTL
Rasterizier and L2 Cache Restore List Control.
Definition: amdsmi.h:463
AMDSMI_FW_ID_RS64_MEC_P0_DATA
@ AMDSMI_FW_ID_RS64_MEC_P0_DATA
Hardware Block RS64 - Micro Engine Controller Partition 0 Data.
Definition: amdsmi.h:497
AMDSMI_FW_ID_RLX6_CORE1
@ AMDSMI_FW_ID_RLX6_CORE1
Hardware Block RLX6 - Core 1.
Definition: amdsmi.h:505
AMDSMI_FW_ID_RS64_MEC_P1_DATA
@ AMDSMI_FW_ID_RS64_MEC_P1_DATA
Hardware Block RS64 - Micro Engine Controller Partition 1 Data.
Definition: amdsmi.h:498
AMDSMI_FW_ID_RLC_RESTORE_LIST_GPM_MEM
@ AMDSMI_FW_ID_RLC_RESTORE_LIST_GPM_MEM
Rasterizier and L2 Cache Restore List Graphics Processor Memory.
Definition: amdsmi.h:461
AMDSMI_FW_ID_PSP_INTF
@ AMDSMI_FW_ID_PSP_INTF
Platform Security Processor - Interface.
Definition: amdsmi.h:504
AMDSMI_FW_ID_CP_MEC_JT2
@ AMDSMI_FW_ID_CP_MEC_JT2
Compute Processor - Micro Engine Controler Job Table 2 (queues, scheduling)
Definition: amdsmi.h:443
AMDSMI_FW_ID_RLC_SAVE_RESTORE_LIST
@ AMDSMI_FW_ID_RLC_SAVE_RESTORE_LIST
Rasterizier and L2 Cache - Save Restore List.
Definition: amdsmi.h:508
AMDSMI_FW_ID_CP_PFP
@ AMDSMI_FW_ID_CP_PFP
Compute Processor - Pixel Front End Processor (pixelating process)
Definition: amdsmi.h:440
AMDSMI_FW_ID_PSP_RAS
@ AMDSMI_FW_ID_PSP_RAS
Platform Security Processor - Reliability, Availability, and Serviceability Firmware.
Definition: amdsmi.h:518
AMDSMI_FW_ID_MES_THREAD1_STACK
@ AMDSMI_FW_ID_MES_THREAD1_STACK
Micro Engine Scheduler - Thread 1 Stack.
Definition: amdsmi.h:487
AMDSMI_FW_ID_SMU
@ AMDSMI_FW_ID_SMU
Definition: amdsmi.h:436
AMDSMI_FW_ID_PPTABLE
@ AMDSMI_FW_ID_PPTABLE
Power Policy Table (power management policies)
Definition: amdsmi.h:501
AMDSMI_FW_ID_PSP_SPL
@ AMDSMI_FW_ID_PSP_SPL
Platform Security Processor Secure Program Loader.
Definition: amdsmi.h:471
AMDSMI_FW_ID_REG_ACCESS_WHITELIST
@ AMDSMI_FW_ID_REG_ACCESS_WHITELIST
Register Access Whitelist (Prevent unathorizied access)
Definition: amdsmi.h:478
AMDSMI_FW_ID_PSP_SYSDRV
@ AMDSMI_FW_ID_PSP_SYSDRV
Platform Security Processor System Driver.
Definition: amdsmi.h:466
AMDSMI_FW_ID_RS64_PFP_P0_DATA
@ AMDSMI_FW_ID_RS64_PFP_P0_DATA
Hardware Block RS64 - Pixel Front End Processor Partition 0 Data.
Definition: amdsmi.h:494
AMDSMI_FW_ID_SDMA5
@ AMDSMI_FW_ID_SDMA5
System Direct Memory Access 5 (high speed data transfers)
Definition: amdsmi.h:452
AMDSMI_FW_ID_SDMA2
@ AMDSMI_FW_ID_SDMA2
System Direct Memory Access 2 (high speed data transfers)
Definition: amdsmi.h:449
AMDSMI_FW_ID_CP_MES
@ AMDSMI_FW_ID_CP_MES
Compute Processor - Micro Engine Scheduler.
Definition: amdsmi.h:483
AMDSMI_FW_ID_DMCU_ERAM
@ AMDSMI_FW_ID_DMCU_ERAM
Digital Micro Controller Unit - Embedded RAM (memory used by DMU)
Definition: amdsmi.h:459
AMDSMI_FW_ID_RLCV_LX7
@ AMDSMI_FW_ID_RLCV_LX7
Hardware Block RLCV - Subsystem LX7.
Definition: amdsmi.h:507
AMDSMI_FW_ID_RS64_MEC
@ AMDSMI_FW_ID_RS64_MEC
Hardware Block RS64 - Micro Engine Controller.
Definition: amdsmi.h:496
AMDSMI_FW_ID_DFC
@ AMDSMI_FW_ID_DFC
Data Fabric Controler (bandwidth and coherency)
Definition: amdsmi.h:470
AMDSMI_FW_ID_CP_MEC2
@ AMDSMI_FW_ID_CP_MEC2
Compute Processor - Micro Engine Controler 2 (scheduling, managing resources)
Definition: amdsmi.h:445
amdsmi_driver_t
amdsmi_driver_t
Driver.
Definition: amdsmi.h:1621
AMDSMI_MAX_TA_WHITE_LIST_ELEMENTS
#define AMDSMI_MAX_TA_WHITE_LIST_ELEMENTS
Maximum number of TA (Trusted Application) white list elements.
Definition: amdsmi.h:185
amdsmi_virtualization_mode_t
amdsmi_virtualization_mode_t
Variant placeholder.
Definition: amdsmi.h:532
AMDSMI_VIRTUALIZATION_MODE_BAREMETAL
@ AMDSMI_VIRTUALIZATION_MODE_BAREMETAL
Baremetal Virtualization Mode.
Definition: amdsmi.h:534
AMDSMI_VIRTUALIZATION_MODE_UNKNOWN
@ AMDSMI_VIRTUALIZATION_MODE_UNKNOWN
Unknown Virtualization Mode.
Definition: amdsmi.h:533
AMDSMI_VIRTUALIZATION_MODE_HOST
@ AMDSMI_VIRTUALIZATION_MODE_HOST
Host Virtualization Mode.
Definition: amdsmi.h:535
AMDSMI_VIRTUALIZATION_MODE_GUEST
@ AMDSMI_VIRTUALIZATION_MODE_GUEST
Guest Virtualization Mode.
Definition: amdsmi.h:536
AMDSMI_VIRTUALIZATION_MODE_PASSTHROUGH
@ AMDSMI_VIRTUALIZATION_MODE_PASSTHROUGH
Passthrough Virtualization Mode.
Definition: amdsmi.h:537
AMDSMI_MAX_STRING_LENGTH
#define AMDSMI_MAX_STRING_LENGTH
Maximum length for string buffers.
Definition: amdsmi.h:159
amdsmi_guest_fw_engine_id_t
amdsmi_guest_fw_engine_id_t
The values of this enum are used to identify the various firmware blocks.
Definition: amdsmi.h:1539
amdsmi_metric_unit_t
amdsmi_metric_unit_t
Metric Unit.
Definition: amdsmi.h:1855
amdsmi_link_status_t
amdsmi_link_status_t
Link Status.
Definition: amdsmi.h:555
amdsmi_ecc_correction_schema_support_t
amdsmi_ecc_correction_schema_support_t
The values of this enum are used to identify supported ecc correction schema.
Definition: amdsmi.h:1527
amdsmi_event_driver_t
amdsmi_event_driver_t
Event Driver.
Definition: amdsmi.h:1140
AMDSMI_MAX_BLACK_LIST_ELEMENTS
#define AMDSMI_MAX_BLACK_LIST_ELEMENTS
Maximum number of black list elements for device access control.
Definition: amdsmi.h:183
amdsmi_memory_partition_type_t
amdsmi_memory_partition_type_t
Memory Partitions.
Definition: amdsmi.h:202
AMDSMI_MEMORY_PARTITION_NPS8
@ AMDSMI_MEMORY_PARTITION_NPS8
Definition: amdsmi.h:212
AMDSMI_MEMORY_PARTITION_NPS1
@ AMDSMI_MEMORY_PARTITION_NPS1
Definition: amdsmi.h:204
AMDSMI_MEMORY_PARTITION_NPS2
@ AMDSMI_MEMORY_PARTITION_NPS2
Definition: amdsmi.h:206
AMDSMI_MEMORY_PARTITION_NPS4
@ AMDSMI_MEMORY_PARTITION_NPS4
Definition: amdsmi.h:209
amdsmi_event_iov_t
amdsmi_event_iov_t
Event IOV.
Definition: amdsmi.h:1276
amdsmi_guard_state_t
amdsmi_guard_state_t
Guard State.
Definition: amdsmi.h:1635
amdsmi_sched_block_t
amdsmi_sched_block_t
Schedule Block.
Definition: amdsmi.h:1646
amdsmi_processor_handle
void * amdsmi_processor_handle
opaque handler point to underlying implementation
Definition: amdsmi.h:59
amdsmi_event_gpu_t
amdsmi_event_gpu_t
Below are the error subcodes of each category.
Definition: amdsmi.h:1122
amdsmi_cache_property_type_t
amdsmi_cache_property_type_t
cache properties
Definition: amdsmi.h:390
AMDSMI_CACHE_PROPERTY_ENABLED
@ AMDSMI_CACHE_PROPERTY_ENABLED
Cache enabled.
Definition: amdsmi.h:391
AMDSMI_CACHE_PROPERTY_INST_CACHE
@ AMDSMI_CACHE_PROPERTY_INST_CACHE
Instruction cache.
Definition: amdsmi.h:393
AMDSMI_CACHE_PROPERTY_DATA_CACHE
@ AMDSMI_CACHE_PROPERTY_DATA_CACHE
Data cache.
Definition: amdsmi.h:392
AMDSMI_CACHE_PROPERTY_SIMD_CACHE
@ AMDSMI_CACHE_PROPERTY_SIMD_CACHE
Single Instruction, Multiple Data Cache.
Definition: amdsmi.h:395
AMDSMI_CACHE_PROPERTY_CPU_CACHE
@ AMDSMI_CACHE_PROPERTY_CPU_CACHE
CPU cache.
Definition: amdsmi.h:394
amdsmi_event_mmsch_t
amdsmi_event_mmsch_t
Event MM Schedule.
Definition: amdsmi.h:1502
AMDSMI_MAX_DEVICES
#define AMDSMI_MAX_DEVICES
Maximum number of devices supported.
Definition: amdsmi.h:158
amdsmi_status_t
amdsmi_status_t
Error codes returned by amdsmi functions.
Definition: amdsmi.h:70
AMDSMI_STATUS_NOT_INIT
@ AMDSMI_STATUS_NOT_INIT
Processor not initialized.
Definition: amdsmi.h:96
AMDSMI_STATUS_NON_AMD_CPU
@ AMDSMI_STATUS_NON_AMD_CPU
System has different cpu than AMD.
Definition: amdsmi.h:106
AMDSMI_STATUS_DIRECTORY_NOT_FOUND
@ AMDSMI_STATUS_DIRECTORY_NOT_FOUND
Error when a directory is not found, maps to ENOTDIR.
Definition: amdsmi.h:92
AMDSMI_STATUS_INVAL
@ AMDSMI_STATUS_INVAL
Invalid parameters.
Definition: amdsmi.h:73
AMDSMI_STATUS_BUSY
@ AMDSMI_STATUS_BUSY
Processor busy.
Definition: amdsmi.h:94
AMDSMI_STATUS_UNKNOWN_ERROR
@ AMDSMI_STATUS_UNKNOWN_ERROR
An unknown error occurred.
Definition: amdsmi.h:121
AMDSMI_STATUS_DRIVER_NOT_LOADED
@ AMDSMI_STATUS_DRIVER_NOT_LOADED
Processor driver not loaded.
Definition: amdsmi.h:98
AMDSMI_STATUS_FILE_ERROR
@ AMDSMI_STATUS_FILE_ERROR
Problem accessing a file.
Definition: amdsmi.h:86
AMDSMI_STATUS_DRM_ERROR
@ AMDSMI_STATUS_DRM_ERROR
Error when call libdrm.
Definition: amdsmi.h:78
AMDSMI_STATUS_CORRUPTED_EEPROM
@ AMDSMI_STATUS_CORRUPTED_EEPROM
EEPROM is corrupted.
Definition: amdsmi.h:118
AMDSMI_STATUS_ARG_PTR_NULL
@ AMDSMI_STATUS_ARG_PTR_NULL
Parsed argument is invalid.
Definition: amdsmi.h:115
AMDSMI_STATUS_IO
@ AMDSMI_STATUS_IO
I/O Error.
Definition: amdsmi.h:84
AMDSMI_STATUS_NO_HSMP_DRV
@ AMDSMI_STATUS_NO_HSMP_DRV
HSMP driver not found.
Definition: amdsmi.h:109
AMDSMI_STATUS_HSMP_TIMEOUT
@ AMDSMI_STATUS_HSMP_TIMEOUT
HSMP message timed out.
Definition: amdsmi.h:112
AMDSMI_STATUS_NO_DATA
@ AMDSMI_STATUS_NO_DATA
No data was found for a given input.
Definition: amdsmi.h:101
AMDSMI_STATUS_RETRY
@ AMDSMI_STATUS_RETRY
Retry operation.
Definition: amdsmi.h:81
AMDSMI_STATUS_UNEXPECTED_SIZE
@ AMDSMI_STATUS_UNEXPECTED_SIZE
An unexpected amount of data was read.
Definition: amdsmi.h:103
AMDSMI_STATUS_SETTING_UNAVAILABLE
@ AMDSMI_STATUS_SETTING_UNAVAILABLE
Setting is not available.
Definition: amdsmi.h:117
AMDSMI_STATUS_FILE_NOT_FOUND
@ AMDSMI_STATUS_FILE_NOT_FOUND
file or directory not found
Definition: amdsmi.h:114
AMDSMI_STATUS_INTERNAL_EXCEPTION
@ AMDSMI_STATUS_INTERNAL_EXCEPTION
An internal exception was caught.
Definition: amdsmi.h:88
AMDSMI_STATUS_NO_HSMP_SUP
@ AMDSMI_STATUS_NO_HSMP_SUP
HSMP not supported.
Definition: amdsmi.h:110
AMDSMI_STATUS_MAP_ERROR
@ AMDSMI_STATUS_MAP_ERROR
The internal library error did not map to a status code.
Definition: amdsmi.h:120
AMDSMI_STATUS_FAIL_LOAD_SYMBOL
@ AMDSMI_STATUS_FAIL_LOAD_SYMBOL
Fail to load symbol.
Definition: amdsmi.h:77
AMDSMI_STATUS_INSUFFICIENT_SIZE
@ AMDSMI_STATUS_INSUFFICIENT_SIZE
Not enough resources were available for the operation.
Definition: amdsmi.h:102
AMDSMI_STATUS_INIT_ERROR
@ AMDSMI_STATUS_INIT_ERROR
An error occurred when initializing internal data structures.
Definition: amdsmi.h:90
AMDSMI_STATUS_OUT_OF_RESOURCES
@ AMDSMI_STATUS_OUT_OF_RESOURCES
Not enough memory.
Definition: amdsmi.h:87
AMDSMI_STATUS_NO_SLOT
@ AMDSMI_STATUS_NO_SLOT
No more free slot.
Definition: amdsmi.h:97
AMDSMI_STATUS_NO_MSR_DRV
@ AMDSMI_STATUS_NO_MSR_DRV
MSR driver not found.
Definition: amdsmi.h:108
AMDSMI_STATUS_INTERRUPT
@ AMDSMI_STATUS_INTERRUPT
An interrupt occurred during execution of function.
Definition: amdsmi.h:83
AMDSMI_STATUS_SUCCESS
@ AMDSMI_STATUS_SUCCESS
Call succeeded.
Definition: amdsmi.h:71
AMDSMI_STATUS_NO_ENERGY_DRV
@ AMDSMI_STATUS_NO_ENERGY_DRV
Energy driver not found.
Definition: amdsmi.h:107
AMDSMI_STATUS_ADDRESS_FAULT
@ AMDSMI_STATUS_ADDRESS_FAULT
Bad address.
Definition: amdsmi.h:85
AMDSMI_STATUS_MORE_DATA
@ AMDSMI_STATUS_MORE_DATA
There is more data than the buffer size the user passed.
Definition: amdsmi.h:100
AMDSMI_STATUS_NOT_YET_IMPLEMENTED
@ AMDSMI_STATUS_NOT_YET_IMPLEMENTED
Not implemented yet.
Definition: amdsmi.h:75
AMDSMI_STATUS_NO_DRV
@ AMDSMI_STATUS_NO_DRV
No Energy and HSMP driver present.
Definition: amdsmi.h:113
AMDSMI_STATUS_NO_PERM
@ AMDSMI_STATUS_NO_PERM
Permission Denied.
Definition: amdsmi.h:82
AMDSMI_STATUS_NOT_FOUND
@ AMDSMI_STATUS_NOT_FOUND
Processor Not found.
Definition: amdsmi.h:95
AMDSMI_STATUS_FAIL_LOAD_MODULE
@ AMDSMI_STATUS_FAIL_LOAD_MODULE
Fail to load lib.
Definition: amdsmi.h:76
AMDSMI_STATUS_AMDGPU_RESTART_ERR
@ AMDSMI_STATUS_AMDGPU_RESTART_ERR
AMDGPU restart failed.
Definition: amdsmi.h:116
AMDSMI_STATUS_NOT_SUPPORTED
@ AMDSMI_STATUS_NOT_SUPPORTED
Command not supported.
Definition: amdsmi.h:74
AMDSMI_STATUS_UNEXPECTED_DATA
@ AMDSMI_STATUS_UNEXPECTED_DATA
The data read or provided to function is not what was expected.
Definition: amdsmi.h:104
AMDSMI_STATUS_API_FAILED
@ AMDSMI_STATUS_API_FAILED
API call failed.
Definition: amdsmi.h:79
AMDSMI_STATUS_TIMEOUT
@ AMDSMI_STATUS_TIMEOUT
Timeout in API call.
Definition: amdsmi.h:80
AMDSMI_STATUS_NO_HSMP_MSG_SUP
@ AMDSMI_STATUS_NO_HSMP_MSG_SUP
HSMP message/feature not supported.
Definition: amdsmi.h:111
AMDSMI_STATUS_INPUT_OUT_OF_BOUNDS
@ AMDSMI_STATUS_INPUT_OUT_OF_BOUNDS
The provided input is out of allowable or safe range.
Definition: amdsmi.h:89
AMDSMI_STATUS_REFCOUNT_OVERFLOW
@ AMDSMI_STATUS_REFCOUNT_OVERFLOW
An internal reference counter exceeded INT32_MAX.
Definition: amdsmi.h:91
AMDSMI_MAX_NUM_PM_POLICIES
#define AMDSMI_MAX_NUM_PM_POLICIES
Maximum number of power management policies.
Definition: amdsmi.h:149
amdsmi_guest_fw_load_status_t
amdsmi_guest_fw_load_status_t
Guest firmware load status.
Definition: amdsmi.h:1660
amdsmi_xgmi_fb_sharing_mode_t
amdsmi_xgmi_fb_sharing_mode_t
XGMI FB Sharing Mode.
Definition: amdsmi.h:1673
amdsmi_affinity_scope_t
amdsmi_affinity_scope_t
Scope for Numa affinity or Socket affinity.
Definition: amdsmi.h:545
AMDSMI_AFFINITY_SCOPE_NODE
@ AMDSMI_AFFINITY_SCOPE_NODE
Memory affinity as numa node.
Definition: amdsmi.h:546
AMDSMI_AFFINITY_SCOPE_SOCKET
@ AMDSMI_AFFINITY_SCOPE_SOCKET
socket affinity
Definition: amdsmi.h:547
amdsmi_temperature_metric_t
amdsmi_temperature_metric_t
Temperature Metrics. This enum is used to identify various temperature metrics. Corresponding values ...
Definition: amdsmi.h:329
AMDSMI_TEMP_CRITICAL_HYST
@ AMDSMI_TEMP_CRITICAL_HYST
Definition: amdsmi.h:340
AMDSMI_TEMP_CRITICAL
@ AMDSMI_TEMP_CRITICAL
Definition: amdsmi.h:338
AMDSMI_TEMP_OFFSET
@ AMDSMI_TEMP_OFFSET
Definition: amdsmi.h:352
AMDSMI_TEMP_EMERGENCY
@ AMDSMI_TEMP_EMERGENCY
Definition: amdsmi.h:342
AMDSMI_TEMP_LOWEST
@ AMDSMI_TEMP_LOWEST
Historical min temperature.
Definition: amdsmi.h:354
AMDSMI_TEMP_CRIT_MIN
@ AMDSMI_TEMP_CRIT_MIN
Definition: amdsmi.h:348
AMDSMI_TEMP_SHUTDOWN
@ AMDSMI_TEMP_SHUTDOWN
Shutdown temperature.
Definition: amdsmi.h:356
AMDSMI_TEMP_EMERGENCY_HYST
@ AMDSMI_TEMP_EMERGENCY_HYST
Definition: amdsmi.h:346
AMDSMI_TEMP_CURRENT
@ AMDSMI_TEMP_CURRENT
Current temperature.
Definition: amdsmi.h:330
AMDSMI_TEMP_MIN
@ AMDSMI_TEMP_MIN
Min temperature.
Definition: amdsmi.h:333
AMDSMI_TEMP_HIGHEST
@ AMDSMI_TEMP_HIGHEST
Historical max temperature.
Definition: amdsmi.h:355
AMDSMI_TEMP_CRIT_MIN_HYST
@ AMDSMI_TEMP_CRIT_MIN_HYST
Definition: amdsmi.h:350
AMDSMI_TEMP_MIN_HYST
@ AMDSMI_TEMP_MIN_HYST
Definition: amdsmi.h:336
AMDSMI_TEMP_MAX_HYST
@ AMDSMI_TEMP_MAX_HYST
Definition: amdsmi.h:334
AMDSMI_TEMP_MAX
@ AMDSMI_TEMP_MAX
Max temperature.
Definition: amdsmi.h:332
amdsmi_event_category_t
amdsmi_event_category_t
Event Category.
Definition: amdsmi.h:1098
amdsmi_cper_sev_t
amdsmi_cper_sev_t
Cper sev.
Definition: amdsmi.h:942
AMDSMI_CPER_SEV_NUM
@ AMDSMI_CPER_SEV_NUM
CPER severity Number.
Definition: amdsmi.h:946
AMDSMI_CPER_SEV_NON_FATAL_CORRECTED
@ AMDSMI_CPER_SEV_NON_FATAL_CORRECTED
CPER Non-Fatal Corrected severity.
Definition: amdsmi.h:945
AMDSMI_CPER_SEV_NON_FATAL_UNCORRECTED
@ AMDSMI_CPER_SEV_NON_FATAL_UNCORRECTED
CPER Non-Fatal Uncorrected severity.
Definition: amdsmi.h:943
AMDSMI_CPER_SEV_FATAL
@ AMDSMI_CPER_SEV_FATAL
CPER Fatal severity.
Definition: amdsmi.h:944
AMDSMI_CPER_SEV_UNUSED
@ AMDSMI_CPER_SEV_UNUSED
CPER Unused severity.
Definition: amdsmi.h:947
amdsmi_gpu_block_t
amdsmi_gpu_block_t
This enum is used to identify different GPU blocks.
Definition: amdsmi.h:403
AMDSMI_GPU_BLOCK_XGMI_WAFL
@ AMDSMI_GPU_BLOCK_XGMI_WAFL
XGMI block.
Definition: amdsmi.h:413
AMDSMI_GPU_BLOCK_GFX
@ AMDSMI_GPU_BLOCK_GFX
GFX block.
Definition: amdsmi.h:408
AMDSMI_GPU_BLOCK_IH
@ AMDSMI_GPU_BLOCK_IH
IH block.
Definition: amdsmi.h:423
AMDSMI_GPU_BLOCK_VCN
@ AMDSMI_GPU_BLOCK_VCN
VCN block.
Definition: amdsmi.h:421
AMDSMI_GPU_BLOCK_INVALID
@ AMDSMI_GPU_BLOCK_INVALID
Invalid block.
Definition: amdsmi.h:404
AMDSMI_GPU_BLOCK_MP0
@ AMDSMI_GPU_BLOCK_MP0
MP0 block.
Definition: amdsmi.h:417
AMDSMI_GPU_BLOCK_HDP
@ AMDSMI_GPU_BLOCK_HDP
HDP block.
Definition: amdsmi.h:412
AMDSMI_GPU_BLOCK_MPIO
@ AMDSMI_GPU_BLOCK_MPIO
MPIO block.
Definition: amdsmi.h:424
AMDSMI_GPU_BLOCK_ATHUB
@ AMDSMI_GPU_BLOCK_ATHUB
ATHUB block.
Definition: amdsmi.h:410
AMDSMI_GPU_BLOCK_MP1
@ AMDSMI_GPU_BLOCK_MP1
MP1 block.
Definition: amdsmi.h:418
AMDSMI_GPU_BLOCK_PCIE_BIF
@ AMDSMI_GPU_BLOCK_PCIE_BIF
PCIE_BIF block.
Definition: amdsmi.h:411
AMDSMI_GPU_BLOCK_SDMA
@ AMDSMI_GPU_BLOCK_SDMA
SDMA block.
Definition: amdsmi.h:407
AMDSMI_GPU_BLOCK_JPEG
@ AMDSMI_GPU_BLOCK_JPEG
JPEG block.
Definition: amdsmi.h:422
AMDSMI_GPU_BLOCK_UMC
@ AMDSMI_GPU_BLOCK_UMC
UMC block.
Definition: amdsmi.h:406
AMDSMI_GPU_BLOCK_FUSE
@ AMDSMI_GPU_BLOCK_FUSE
Fuse block.
Definition: amdsmi.h:419
AMDSMI_GPU_BLOCK_DF
@ AMDSMI_GPU_BLOCK_DF
DF block.
Definition: amdsmi.h:414
AMDSMI_GPU_BLOCK_MMHUB
@ AMDSMI_GPU_BLOCK_MMHUB
MMHUB block.
Definition: amdsmi.h:409
AMDSMI_GPU_BLOCK_SMN
@ AMDSMI_GPU_BLOCK_SMN
SMN block.
Definition: amdsmi.h:415
AMDSMI_GPU_BLOCK_SEM
@ AMDSMI_GPU_BLOCK_SEM
SEM block.
Definition: amdsmi.h:416
AMDSMI_GPU_BLOCK_MCA
@ AMDSMI_GPU_BLOCK_MCA
MCA block.
Definition: amdsmi.h:420
amdsmi_metric_name_t
amdsmi_metric_name_t
Metric Name.
Definition: amdsmi.h:1721
amdsmi_vf_sched_state_t
amdsmi_vf_sched_state_t
VF Schedule State.
Definition: amdsmi.h:1591
amdsmi_event_sched_t
amdsmi_event_sched_t
Event Schedule.
Definition: amdsmi.h:1383
amdsmi_driver_model_type_t
amdsmi_driver_model_type_t
The values of this enum are used to identify driver model type.
Definition: amdsmi.h:1918
amdsmi_temperature_type_t
amdsmi_temperature_type_t
This enumeration is used to indicate from which part of the processor a temperature reading should be...
Definition: amdsmi.h:309
AMDSMI_TEMPERATURE_TYPE_HBM_2
@ AMDSMI_TEMPERATURE_TYPE_HBM_2
High Bandwidth 2 temperature per stack.
Definition: amdsmi.h:317
AMDSMI_TEMPERATURE_TYPE_HOTSPOT
@ AMDSMI_TEMPERATURE_TYPE_HOTSPOT
Hottest temperature reported for entire die.
Definition: amdsmi.h:312
AMDSMI_TEMPERATURE_TYPE_HBM_0
@ AMDSMI_TEMPERATURE_TYPE_HBM_0
High Bandwidth 0 temperature per stack.
Definition: amdsmi.h:315
AMDSMI_TEMPERATURE_TYPE_JUNCTION
@ AMDSMI_TEMPERATURE_TYPE_JUNCTION
Synonymous with HOTSPOT.
Definition: amdsmi.h:313
AMDSMI_TEMPERATURE_TYPE_HBM_3
@ AMDSMI_TEMPERATURE_TYPE_HBM_3
High Bandwidth 3 temperature per stack.
Definition: amdsmi.h:318
AMDSMI_TEMPERATURE_TYPE_VRAM
@ AMDSMI_TEMPERATURE_TYPE_VRAM
VRAM temperature on graphics card.
Definition: amdsmi.h:314
AMDSMI_TEMPERATURE_TYPE_EDGE
@ AMDSMI_TEMPERATURE_TYPE_EDGE
Edge temperature.
Definition: amdsmi.h:310
AMDSMI_TEMPERATURE_TYPE_PLX
@ AMDSMI_TEMPERATURE_TYPE_PLX
PCIe switch temperature.
Definition: amdsmi.h:319
AMDSMI_TEMPERATURE_TYPE_HBM_1
@ AMDSMI_TEMPERATURE_TYPE_HBM_1
High Bandwidth 1 temperature per stack.
Definition: amdsmi.h:316
AMDSMI_MAX_UUID_ELEMENTS
#define AMDSMI_MAX_UUID_ELEMENTS
Maximum number of UUID elements supported.
Definition: amdsmi.h:184
AMDSMI_MAX_CACHE_TYPES
#define AMDSMI_MAX_CACHE_TYPES
Maximum number of cache types.
Definition: amdsmi.h:160
AMDSMI_DFC_FW_NUMBER_OF_ENTRIES
#define AMDSMI_DFC_FW_NUMBER_OF_ENTRIES
Number of DFC firmware entries supported.
Definition: amdsmi.h:181
AMDSMI_MAX_NUM_NUMA_NODES
#define AMDSMI_MAX_NUM_NUMA_NODES
Maximum number of NUMA nodes.
Definition: amdsmi.h:164
amdsmi_set_gpu_accelerator_partition_profile
amdsmi_status_t amdsmi_set_gpu_accelerator_partition_profile(amdsmi_processor_handle processor_handle, uint32_t profile_index)
Set accelerator partition setting based on profile_index from amdsmi_get_gpu_accelerator_partition_pr...
amdsmi_get_gpu_accelerator_partition_profile_config
amdsmi_status_t amdsmi_get_gpu_accelerator_partition_profile_config(amdsmi_processor_handle processor_handle, amdsmi_accelerator_partition_profile_config_t *profile_config)
Returns gpu accelerator partition caps as currently configured in the system.
amdsmi_get_gpu_accelerator_partition_profile_config_global
amdsmi_status_t amdsmi_get_gpu_accelerator_partition_profile_config_global(amdsmi_processor_handle processor_handle, amdsmi_accelerator_partition_profile_config_global_t *config)
Returns all GPU accelerator partition capabilities which can be configured on the system.
amdsmi_get_gpu_accelerator_partition_profile
amdsmi_status_t amdsmi_get_gpu_accelerator_partition_profile(amdsmi_processor_handle processor_handle, amdsmi_accelerator_partition_profile_t *profile, uint32_t *partition_id)
Returns current gpu accelerator partition cap.
amdsmi_get_fb_layout
amdsmi_status_t amdsmi_get_fb_layout(amdsmi_processor_handle processor_handle, amdsmi_pf_fb_info_t *info)
Returns the framebuffer info for the ASIC.
amdsmi_get_power_cap_info
amdsmi_status_t amdsmi_get_power_cap_info(amdsmi_processor_handle processor_handle, uint32_t sensor_ind, amdsmi_power_cap_info_t *info)
Returns the power caps as currently configured in the system.
amdsmi_get_pcie_info
amdsmi_status_t amdsmi_get_pcie_info(amdsmi_processor_handle processor_handle, amdsmi_pcie_info_t *info)
Returns the PCIe info for the GPU.
amdsmi_get_gpu_vram_info
amdsmi_status_t amdsmi_get_gpu_vram_info(amdsmi_processor_handle processor_handle, amdsmi_vram_info_t *info)
Returns vram info.
amdsmi_get_gpu_board_info
amdsmi_status_t amdsmi_get_gpu_board_info(amdsmi_processor_handle processor_handle, amdsmi_board_info_t *info)
Returns the board part number and board information for the requested device.
amdsmi_get_gpu_asic_info
amdsmi_status_t amdsmi_get_gpu_asic_info(amdsmi_processor_handle processor_handle, amdsmi_asic_info_t *info)
Returns the ASIC information for the device.
amdsmi_get_xgmi_plpd
amdsmi_status_t amdsmi_get_xgmi_plpd(amdsmi_processor_handle processor_handle, amdsmi_dpm_policy_t *xgmi_plpd)
Get the xgmi per-link power down policy parameter for the processor.
amdsmi_set_xgmi_plpd
amdsmi_status_t amdsmi_set_xgmi_plpd(amdsmi_processor_handle processor_handle, uint32_t policy_id)
Set the xgmi per-link power down policy parameter for the processor.
amdsmi_get_soc_pstate
amdsmi_status_t amdsmi_get_soc_pstate(amdsmi_processor_handle processor_handle, amdsmi_dpm_policy_t *policy)
Get the soc pstate policy for the processor.
amdsmi_set_soc_pstate
amdsmi_status_t amdsmi_set_soc_pstate(amdsmi_processor_handle processor_handle, uint32_t policy_id)
Set the soc pstate policy for the processor.
amdsmi_reset_gpu
amdsmi_status_t amdsmi_reset_gpu(amdsmi_processor_handle processor_handle)
Reset the gpu associated with the device with provided processor handle. It is not supported on virtu...
amdsmi_status_code_to_string
amdsmi_status_t amdsmi_status_code_to_string(amdsmi_status_t status, const char **status_string)
Get a description of a provided AMDSMI error status.
amdsmi_event_destroy
amdsmi_status_t amdsmi_event_destroy(amdsmi_event_set set)
Destroys and frees an event set.
amdsmi_event_read
amdsmi_status_t amdsmi_event_read(amdsmi_event_set set, int64_t timeout_usec, amdsmi_event_entry_t *event)
The call blocks till timeout is expired to copy one event specified by the event set into the user pr...
amdsmi_event_create
amdsmi_status_t amdsmi_event_create(amdsmi_processor_handle *processor_list, uint32_t num_devices, uint64_t event_types, amdsmi_event_set *set)
Allocate a new event set notifier to monitor different types of issues with the GPU running virtualiz...
amdsmi_get_gpu_vbios_info
amdsmi_status_t amdsmi_get_gpu_vbios_info(amdsmi_processor_handle processor_handle, amdsmi_vbios_info_t *info)
Returns the static information for the vBIOS on the device.
amdsmi_get_fw_info
amdsmi_status_t amdsmi_get_fw_info(amdsmi_processor_handle processor_handle, amdsmi_fw_info_t *info)
Returns the firmware versions running on the device.
amdsmi_get_dfc_fw_table
amdsmi_status_t amdsmi_get_dfc_fw_table(amdsmi_processor_handle processor_handle, amdsmi_dfc_fw_t *info)
Returns the DFC fw table.
amdsmi_get_fw_error_records
amdsmi_status_t amdsmi_get_fw_error_records(amdsmi_processor_handle processor_handle, amdsmi_fw_error_record_t *records)
Gets firmware error records.
amdsmi_get_power_info
amdsmi_status_t amdsmi_get_power_info(amdsmi_processor_handle processor_handle, amdsmi_power_info_t *info)
Returns the current power and voltage of the GPU.
amdsmi_get_gpu_metrics
amdsmi_status_t amdsmi_get_gpu_metrics(amdsmi_processor_handle processor_handle, uint32_t *metrics_size, amdsmi_metric_t *metrics)
Return metrics information.
amdsmi_get_temp_metric
amdsmi_status_t amdsmi_get_temp_metric(amdsmi_processor_handle processor_handle, amdsmi_temperature_type_t sensor_type, amdsmi_temperature_metric_t metric, int64_t *temperature)
Get the temperature metric value for the specified metric, from the specified temperature sensor on t...
amdsmi_get_gpu_activity
amdsmi_status_t amdsmi_get_gpu_activity(amdsmi_processor_handle processor_handle, amdsmi_engine_usage_t *info)
Returns the current usage of the GPU engines (GFX, MM and MEM). Each usage is reported as a percentag...
amdsmi_get_clock_info
amdsmi_status_t amdsmi_get_clock_info(amdsmi_processor_handle processor_handle, amdsmi_clk_type_t clk_type, amdsmi_clk_info_t *info)
Returns the measurements of the clocks in the GPU for the GFX and multimedia engines and Memory....
amdsmi_is_gpu_power_management_enabled
amdsmi_status_t amdsmi_is_gpu_power_management_enabled(amdsmi_processor_handle processor_handle, bool *enabled)
Returns is power management enabled.
amdsmi_get_xgmi_fb_sharing_caps
amdsmi_status_t amdsmi_get_xgmi_fb_sharing_caps(amdsmi_processor_handle processor_handle, amdsmi_xgmi_fb_sharing_caps_t *caps)
Return XGMI capabilities.
amdsmi_set_xgmi_fb_sharing_mode_v2
amdsmi_status_t amdsmi_set_xgmi_fb_sharing_mode_v2(amdsmi_processor_handle *processor_list, uint32_t num_processors, amdsmi_xgmi_fb_sharing_mode_t mode)
Set XGMI framebuffer custom sharing mode.
amdsmi_get_xgmi_fb_sharing_mode_info
amdsmi_status_t amdsmi_get_xgmi_fb_sharing_mode_info(amdsmi_processor_handle processor_handle_src, amdsmi_processor_handle processor_handle_dst, amdsmi_xgmi_fb_sharing_mode_t mode, uint8_t *fb_sharing)
Return XGMI framebuffer sharing information between two GPUs.
amdsmi_topo_get_numa_node_number
amdsmi_status_t amdsmi_topo_get_numa_node_number(amdsmi_processor_handle processor_handle, uint32_t *numa_node)
Retrieve the NUMA CPU node number for a device.
amdsmi_get_link_topology
amdsmi_status_t amdsmi_get_link_topology(amdsmi_processor_handle processor_handle_src, amdsmi_processor_handle processor_handle_dst, amdsmi_link_topology_t *topology_info)
Return link topology information between two connected processors.
amdsmi_get_link_metrics
amdsmi_status_t amdsmi_get_link_metrics(amdsmi_processor_handle processor_handle, amdsmi_link_metrics_t *link_metrics)
Return link metric information.
amdsmi_topo_get_p2p_status
amdsmi_status_t amdsmi_topo_get_p2p_status(amdsmi_processor_handle processor_handle_src, amdsmi_processor_handle processor_handle_dst, amdsmi_link_type_t *type, amdsmi_p2p_capability_t *cap)
Retrieve connection type and P2P capabilities between 2 GPUs.
amdsmi_set_xgmi_fb_sharing_mode
amdsmi_status_t amdsmi_set_xgmi_fb_sharing_mode(amdsmi_processor_handle processor_handle, amdsmi_xgmi_fb_sharing_mode_t mode)
Set XGMI framebuffer sharing mode.
amdsmi_get_link_topology_nearest
amdsmi_status_t amdsmi_get_link_topology_nearest(amdsmi_processor_handle processor_handle, amdsmi_link_type_t link_type, amdsmi_topology_nearest_t *topology_nearest_info)
Retrieve the set of GPUs that are nearest to a given device at a specific interconnectivity level.
amdsmi_get_guest_data
amdsmi_status_t amdsmi_get_guest_data(amdsmi_vf_handle_t vf_handle, amdsmi_guest_data_t *info)
Returns guest OS information of the queried VF. The fw_info field from the amdsmi_guest_data structur...
amdsmi_get_vf_fw_info
amdsmi_status_t amdsmi_get_vf_fw_info(amdsmi_vf_handle_t vf_handle, amdsmi_fw_info_t *info)
Returns the firmware versions running on a VF. In case the VM is not started on the VF,...
amdsmi_shut_down
amdsmi_status_t amdsmi_shut_down(void)
Shutdown the AMD SMI library.
amdsmi_init
amdsmi_status_t amdsmi_init(uint64_t init_flags)
Initialize the AMD SMI library.
amdsmi_get_gpu_memory_partition_config
amdsmi_status_t amdsmi_get_gpu_memory_partition_config(amdsmi_processor_handle processor_handle, amdsmi_memory_partition_config_t *config)
Returns current gpu memory partition capabilities.
amdsmi_set_gpu_memory_partition_mode
amdsmi_status_t amdsmi_set_gpu_memory_partition_mode(amdsmi_processor_handle processor_handle, amdsmi_memory_partition_type_t mode)
Sets memory partition mode.
amdsmi_get_gpu_cache_info
amdsmi_status_t amdsmi_get_gpu_cache_info(amdsmi_processor_handle processor_handle, amdsmi_gpu_cache_info_t *info)
Returns gpu cache info.
amdsmi_set_power_cap
amdsmi_status_t amdsmi_set_power_cap(amdsmi_processor_handle processor_handle, uint32_t sensor_ind, uint64_t cap)
Set the maximum gpu power cap value. It is not supported on virtual machine guest.
amdsmi_get_processor_handles
amdsmi_status_t amdsmi_get_processor_handles(amdsmi_socket_handle socket_handle, uint32_t *processor_count, amdsmi_processor_handle *processor_handles)
Get the list of the processor handles associated to a socket.
amdsmi_get_index_from_processor_handle
amdsmi_status_t amdsmi_get_index_from_processor_handle(amdsmi_processor_handle processor_handle, uint32_t *processor_index)
Returns the index of the given processor handle.
amdsmi_get_gpu_device_uuid
amdsmi_status_t amdsmi_get_gpu_device_uuid(amdsmi_processor_handle processor_handle, unsigned int *uuid_length, char *uuid)
Returns the UUID of the device.
amdsmi_get_processor_type
amdsmi_status_t amdsmi_get_processor_type(amdsmi_processor_handle processor_handle, processor_type_t *processor_type)
Get the processor type of the processor_handle.
amdsmi_get_socket_info
amdsmi_status_t amdsmi_get_socket_info(amdsmi_socket_handle socket_handle, size_t len, char *name)
Get information about the given socket.
amdsmi_get_gpu_virtualization_mode
amdsmi_status_t amdsmi_get_gpu_virtualization_mode(amdsmi_processor_handle processor_handle, amdsmi_virtualization_mode_t *mode)
Returns the virtualization mode for the target device.
amdsmi_get_processor_handle_from_uuid
amdsmi_status_t amdsmi_get_processor_handle_from_uuid(const char *uuid, amdsmi_processor_handle *processor_handle)
Returns the processor handle from the given UUID.
amdsmi_get_socket_handles
amdsmi_status_t amdsmi_get_socket_handles(uint32_t *socket_count, amdsmi_socket_handle *socket_handles)
Get the list of socket handles in the system.
amdsmi_get_vf_bdf
amdsmi_status_t amdsmi_get_vf_bdf(amdsmi_vf_handle_t vf_handle, amdsmi_bdf_t *bdf)
Returns BDF of the given device (VF).
amdsmi_get_vf_handle_from_bdf
amdsmi_status_t amdsmi_get_vf_handle_from_bdf(amdsmi_bdf_t bdf, amdsmi_vf_handle_t *vf_handle)
Returns VF handle from the given BDF.
amdsmi_get_processor_handle_from_bdf
amdsmi_status_t amdsmi_get_processor_handle_from_bdf(amdsmi_bdf_t bdf, amdsmi_processor_handle *processor_handle)
Get processor handle with the matching bdf.
amdsmi_get_vf_handle_from_vf_index
amdsmi_status_t amdsmi_get_vf_handle_from_vf_index(amdsmi_processor_handle processor_handle, uint32_t fcn_idx, amdsmi_vf_handle_t *vf_handle)
Returns the handle of a virtual function given its index.
amdsmi_get_vf_uuid
amdsmi_status_t amdsmi_get_vf_uuid(amdsmi_vf_handle_t processor_handle, unsigned int *uuid_length, char *uuid)
Returns the UUID of the VF.
amdsmi_get_gpu_device_bdf
amdsmi_status_t amdsmi_get_gpu_device_bdf(amdsmi_processor_handle processor_handle, amdsmi_bdf_t *bdf)
Returns BDF of the given device.
amdsmi_get_vf_handle_from_uuid
amdsmi_status_t amdsmi_get_vf_handle_from_uuid(const char *uuid, amdsmi_vf_handle_t *vf_handle)
Returns the handle of a virtual function from the given UUID.
amdsmi_get_cpu_affinity_with_scope
amdsmi_status_t amdsmi_get_cpu_affinity_with_scope(amdsmi_processor_handle processor_handle, uint32_t cpu_set_size, uint64_t *cpu_set, amdsmi_affinity_scope_t scope)
Retrieves an array of uint64_t (sized to cpu_set_size) of bitmasks with the affinity within numa node...
amdsmi_get_processor_handle_from_index
amdsmi_status_t amdsmi_get_processor_handle_from_index(uint32_t processor_index, amdsmi_processor_handle *processor_handle)
Returns the processor handle from the given processor index.
amdsmi_get_gpu_total_ecc_count
amdsmi_status_t amdsmi_get_gpu_total_ecc_count(amdsmi_processor_handle processor_handle, amdsmi_error_count_t *ec)
Returns the total number of ECC errors (correctable, uncorrectable and deferred) in the given GPU....
amdsmi_get_gpu_ecc_count
amdsmi_status_t amdsmi_get_gpu_ecc_count(amdsmi_processor_handle processor_handle, amdsmi_gpu_block_t block, amdsmi_error_count_t *ec)
Retrieve the error counts for a GPU block. It is not supported on virtual machine guest.
amdsmi_get_gpu_ecc_enabled
amdsmi_status_t amdsmi_get_gpu_ecc_enabled(amdsmi_processor_handle processor_handle, uint64_t *enabled_blocks)
Retrieve the enabled ECC bit-mask. It is not supported on virtual machine guest.
amdsmi_get_afids_from_cper
amdsmi_status_t amdsmi_get_afids_from_cper(char *cper_buffer, uint32_t buf_size, uint64_t *afids, uint32_t *num_afids)
Get the AFIDs from CPER buffer.
amdsmi_get_bad_page_threshold
amdsmi_status_t amdsmi_get_bad_page_threshold(amdsmi_processor_handle processor_handle, uint32_t *threshold)
Get the bad page threshold for a device.
amdsmi_get_gpu_cper_entries
amdsmi_status_t amdsmi_get_gpu_cper_entries(amdsmi_processor_handle processor_handle, uint32_t severity_mask, char *cper_data, uint64_t *buf_size, amdsmi_cper_hdr_t **cper_hdrs, uint64_t *entry_count, uint64_t *cursor)
Retrieve CPER entries cached in the driver.
amdsmi_get_gpu_ras_feature_info
amdsmi_status_t amdsmi_get_gpu_ras_feature_info(amdsmi_processor_handle processor_handle, amdsmi_ras_feature_t *ras_feature)
Returns RAS features info.
amdsmi_get_gpu_bad_page_info
amdsmi_status_t amdsmi_get_gpu_bad_page_info(amdsmi_processor_handle processor_handle, uint32_t *bad_page_size, amdsmi_eeprom_table_record_t *bad_pages)
Returns the bad page info.
amdsmi_get_gpu_driver_info
amdsmi_status_t amdsmi_get_gpu_driver_info(amdsmi_processor_handle processor_handle, amdsmi_driver_info_t *info)
Returns the driver version information.
amdsmi_get_gpu_driver_model
amdsmi_status_t amdsmi_get_gpu_driver_model(amdsmi_processor_handle processor_handle, amdsmi_driver_model_type_t *model)
Returns the driver model information.
amdsmi_get_vf_info
amdsmi_status_t amdsmi_get_vf_info(amdsmi_vf_handle_t vf_handle, amdsmi_vf_info_t *config)
Returns the configuration structure for a VF.
amdsmi_get_vf_data
amdsmi_status_t amdsmi_get_vf_data(amdsmi_vf_handle_t vf_handle, amdsmi_vf_data_t *info)
Returns the data structure for a VF.
amdsmi_get_vf_partition_info
amdsmi_status_t amdsmi_get_vf_partition_info(amdsmi_processor_handle processor_handle, unsigned int vf_buffer_num, amdsmi_partition_info_t *info)
Returns the current framebuffer partitioning structure as currently configured by the driver.
amdsmi_get_num_vf
amdsmi_status_t amdsmi_get_num_vf(amdsmi_processor_handle processor_handle, uint32_t *num_vf_enabled, uint32_t *num_vf_supported)
Returns the number of VFs enabled by gpuv in the ASIC.
amdsmi_get_partition_profile_info
amdsmi_status_t amdsmi_get_partition_profile_info(amdsmi_processor_handle processor_handle, amdsmi_profile_info_t *profile_info)
Return the list of supported profiles on the given GPU device.
amdsmi_clear_vf_fb
amdsmi_status_t amdsmi_clear_vf_fb(amdsmi_vf_handle_t vf_handle)
Clear the framebuffer of a VF. If trying to clear the framebuffer of an active function,...
amdsmi_set_num_vf
amdsmi_status_t amdsmi_set_num_vf(amdsmi_processor_handle processor_handle, uint32_t num_vf)
Enable a given number of VF.
amdsmi_get_lib_version
amdsmi_status_t amdsmi_get_lib_version(amdsmi_version_t *version)
Get the build version information for the currently running build of AMDSMI.
amdsmi_accelerator_partition_profile_config_global_t
Definition: amdsmi.h:2287
amdsmi_accelerator_partition_profile_config_global_t::num_profiles
uint32_t num_profiles
The length of profiles array.
Definition: amdsmi.h:2288
amdsmi_accelerator_partition_profile_config_global_t::default_profile_index
uint32_t default_profile_index
The index of the default profile in the profiles array.
Definition: amdsmi.h:2291
amdsmi_accelerator_partition_profile_config_t
Accelerator Partition Profile Configurations.
Definition: amdsmi.h:832
amdsmi_accelerator_partition_profile_config_t::default_profile_index
uint32_t default_profile_index
The index of the default profile in the profiles array.
Definition: amdsmi.h:836
amdsmi_accelerator_partition_profile_config_t::num_profiles
uint32_t num_profiles
The length of profiles array.
Definition: amdsmi.h:833
amdsmi_accelerator_partition_profile_global_t
Definition: amdsmi.h:2281
amdsmi_accelerator_partition_profile_global_t::vf_mode
uint32_t vf_mode
Bitmask of VF modes (see amdsmi_vf_mode_t)
Definition: amdsmi.h:2283
amdsmi_accelerator_partition_profile_t
Accelerator Partition Resource Profile.
Definition: amdsmi.h:803
amdsmi_accelerator_partition_profile_t::profile_index
uint32_t profile_index
Index in the profiles array in amdsmi_accelerator_partition_profile_t.
Definition: amdsmi.h:807
amdsmi_accelerator_partition_profile_t::num_partitions
uint32_t num_partitions
On MI300X: SPX=>1, DPX=>2, QPX=>4, CPX=>8; length of resources.
Definition: amdsmi.h:805
amdsmi_accelerator_partition_profile_t::memory_caps
amdsmi_nps_caps_t memory_caps
Possible memory partition capabilities.
Definition: amdsmi.h:806
amdsmi_accelerator_partition_profile_t::profile_type
amdsmi_accelerator_partition_type_t profile_type
SPX, DPX, QPX, CPX and so on.
Definition: amdsmi.h:804
amdsmi_accelerator_partition_profile_t::num_resources
uint32_t num_resources
length of index_of_resources_profile
Definition: amdsmi.h:808
amdsmi_accelerator_partition_resource_profile_t
Accelerator Partition Resources. This struct is used to identify various partition resource profiles.
Definition: amdsmi.h:819
amdsmi_accelerator_partition_resource_profile_t::partition_resource
uint32_t partition_resource
Resources a partition can use, which may be shared.
Definition: amdsmi.h:822
amdsmi_accelerator_partition_resource_profile_t::num_partitions_share_resource
uint32_t num_partitions_share_resource
If it is greater than 1, then resource is shared.
Definition: amdsmi.h:823
amdsmi_asic_info_t
ASIC Information.
Definition: amdsmi.h:665
amdsmi_asic_info_t::target_graphics_version
uint64_t target_graphics_version
0xFFFFFFFFFFFFFFFF if not supported
Definition: amdsmi.h:675
amdsmi_asic_info_t::vendor_id
uint32_t vendor_id
Use 32 bit to be compatible with other platform.
Definition: amdsmi.h:667
amdsmi_asic_info_t::device_id
uint64_t device_id
The device ID of a GPU.
Definition: amdsmi.h:670
amdsmi_asic_info_t::oam_id
uint32_t oam_id
0xFFFFFFFF if not supported
Definition: amdsmi.h:673
amdsmi_asic_info_t::num_of_compute_units
uint32_t num_of_compute_units
0xFFFFFFFF if not supported
Definition: amdsmi.h:674
amdsmi_asic_info_t::subvendor_id
uint32_t subvendor_id
The subsystem vendor ID.
Definition: amdsmi.h:669
amdsmi_asic_info_t::rev_id
uint32_t rev_id
The revision ID of a GPU.
Definition: amdsmi.h:671
amdsmi_bdf_t::bdf_
Definition: amdsmi.h:568
amdsmi_board_info_t
Board Information.
Definition: amdsmi.h:846
amdsmi_clk_info_t
Clock Information.
Definition: amdsmi.h:743
amdsmi_clk_info_t::clk
uint32_t clk
In MHz.
Definition: amdsmi.h:744
amdsmi_clk_info_t::clk_locked
uint8_t clk_locked
True/False.
Definition: amdsmi.h:747
amdsmi_clk_info_t::clk_deep_sleep
uint8_t clk_deep_sleep
True/False.
Definition: amdsmi.h:748
amdsmi_clk_info_t::min_clk
uint32_t min_clk
In MHz.
Definition: amdsmi.h:745
amdsmi_clk_info_t::max_clk
uint32_t max_clk
In MHz.
Definition: amdsmi.h:746
amdsmi_cper_guid_t
Cper.
Definition: amdsmi.h:977
amdsmi_cper_hdr_t
Definition: amdsmi.h:1002
amdsmi_cper_hdr_t::notify_type
amdsmi_cper_guid_t notify_type
CMC, MCE, can use amdsmi_cper_notifiy_type_t to decode.
Definition: amdsmi.h:1014
amdsmi_cper_hdr_t::persistence_info
uint64_t persistence_info
Reserved.
Definition: amdsmi.h:1017
amdsmi_cper_hdr_t::signature_end
uint32_t signature_end
0xFFFFFFFF
Definition: amdsmi.h:1005
amdsmi_cper_hdr_t::flags
uint32_t flags
Reserved.
Definition: amdsmi.h:1016
amdsmi_cper_hdr_t::partition_id
amdsmi_cper_guid_t partition_id
Reserved.
Definition: amdsmi.h:1012
amdsmi_cper_hdr_t::record_length
uint32_t record_length
Total size of CPER Entry.
Definition: amdsmi.h:1009
amdsmi_cper_timestamp_t
Definition: amdsmi.h:981
amdsmi_cper_valid_bits_t::valid_bits_
Definition: amdsmi.h:993
amdsmi_dfc_fw_data_t
DFC Firmware Data.
Definition: amdsmi.h:2142
amdsmi_dfc_fw_data_t::customer_ordinal
uint32_t customer_ordinal
only used in driver version on NV32+
Definition: amdsmi.h:2145
amdsmi_dfc_fw_header_t
DFC Firmware Header.
Definition: amdsmi.h:2110
amdsmi_dfc_fw_t
DFC Firmware.
Definition: amdsmi.h:2159
amdsmi_dfc_fw_ta_uuid_t
DFC Firmware TA UUID.
Definition: amdsmi.h:2133
amdsmi_dfc_fw_white_list_t
DFC Firmware White List.
Definition: amdsmi.h:2123
amdsmi_dpm_policy_entry_t
The dpm policy.
Definition: amdsmi.h:906
amdsmi_dpm_policy_t
DPM Policy.
Definition: amdsmi.h:918
amdsmi_dpm_policy_t::num_supported
uint32_t num_supported
The number of supported policies.
Definition: amdsmi.h:919
amdsmi_dpm_policy_t::current
uint32_t current
The current policy index.
Definition: amdsmi.h:920
amdsmi_driver_info_t
Driver Information.
Definition: amdsmi.h:701
amdsmi_eeprom_table_record_t
Structure representing an EEPROM table record for tracking memory errors.
Definition: amdsmi.h:2173
amdsmi_eeprom_table_record_t::retired_page
uint64_t retired_page
Bad page frame address.
Definition: amdsmi.h:2174
amdsmi_engine_usage_t
Engine Usage amdsmi_engine_usage_t: This structure holds common GPU activity values seen in both BM o...
Definition: amdsmi.h:731
amdsmi_engine_usage_t::gfx_activity
uint32_t gfx_activity
In %.
Definition: amdsmi.h:732
amdsmi_engine_usage_t::umc_activity
uint32_t umc_activity
In %.
Definition: amdsmi.h:733
amdsmi_engine_usage_t::mm_activity
uint32_t mm_activity
In %.
Definition: amdsmi.h:734
amdsmi_error_count_t
This structure holds error counts.
Definition: amdsmi.h:757
amdsmi_error_count_t::uncorrectable_count
uint64_t uncorrectable_count
Accumulated uncorrectable errors.
Definition: amdsmi.h:759
amdsmi_error_count_t::correctable_count
uint64_t correctable_count
Accumulated correctable errors.
Definition: amdsmi.h:758
amdsmi_error_count_t::deferred_count
uint64_t deferred_count
Accumulated deferred errors.
Definition: amdsmi.h:760
amdsmi_event_entry_t
Event Entry.
Definition: amdsmi.h:1939
amdsmi_event_entry_t::timestamp
uint64_t timestamp
UTC microseconds.
Definition: amdsmi.h:1942
amdsmi_fw_error_record_t
Firmware Error Record.
Definition: amdsmi.h:2204
amdsmi_fw_info_t
Firmware Information.
Definition: amdsmi.h:891
amdsmi_fw_load_error_record_t
Firmware Load Error Record.
Definition: amdsmi.h:2191
amdsmi_fw_load_error_record_t::timestamp
uint64_t timestamp
UTC microseconds.
Definition: amdsmi.h:2192
amdsmi_fw_load_error_record_t::status
uint16_t status
amdsmi_guest_fw_load_status
Definition: amdsmi.h:2195
amdsmi_gpu_cache_info_t::cache_
Definition: amdsmi.h:875
amdsmi_gpu_cache_info_t::cache_::num_cache_instance
uint32_t num_cache_instance
total number of instance of this cache type
Definition: amdsmi.h:880
amdsmi_gpu_cache_info_t::cache_::cache_size
uint32_t cache_size
In KB.
Definition: amdsmi.h:877
amdsmi_gpu_cache_info_t::cache_::max_num_cu_shared
uint32_t max_num_cu_shared
Indicates how many Compute Units share this cache instance.
Definition: amdsmi.h:879
amdsmi_gpu_cache_info_t::cache_::cache_properties
uint32_t cache_properties
amdsmi_cache_property_type_t which is a bitmask
Definition: amdsmi.h:876
amdsmi_gpu_cache_info_t
GPU Cache Information.
Definition: amdsmi.h:873
amdsmi_guard_info_t
Guard Information.
Definition: amdsmi.h:2003
amdsmi_guest_data_t
Guest Data.
Definition: amdsmi.h:2099
amdsmi_guest_data_t::fb_usage
uint32_t fb_usage
guest framebuffer usage in MB
Definition: amdsmi.h:2101
amdsmi_handshake_t
Handshake.
Definition: amdsmi.h:1957
amdsmi_link_metrics_t::_links
Definition: amdsmi.h:619
amdsmi_link_metrics_t::_links::write
uint64_t write
total data transfered for each link in KB
Definition: amdsmi.h:625
amdsmi_link_metrics_t::_links::link_status
amdsmi_link_status_t link_status
HW status of the link.
Definition: amdsmi.h:626
amdsmi_link_metrics_t::_links::read
uint64_t read
total data received for each link in KB
Definition: amdsmi.h:624
amdsmi_link_metrics_t::_links::bit_rate
uint32_t bit_rate
current link speed in Gb/s
Definition: amdsmi.h:621
amdsmi_link_metrics_t::_links::link_type
amdsmi_link_type_t link_type
type of the link
Definition: amdsmi.h:623
amdsmi_link_metrics_t::_links::bdf
amdsmi_bdf_t bdf
bdf of the destination gpu
Definition: amdsmi.h:620
amdsmi_link_metrics_t::_links::max_bandwidth
uint32_t max_bandwidth
max bandwidth of the link in Gb/s
Definition: amdsmi.h:622
amdsmi_link_metrics_t
Link Metrics.
Definition: amdsmi.h:617
amdsmi_link_metrics_t::num_links
uint32_t num_links
number of links
Definition: amdsmi.h:618
amdsmi_link_topology_t
Link Topology.
Definition: amdsmi.h:2215
amdsmi_link_topology_t::weight
uint64_t weight
link weight
Definition: amdsmi.h:2216
amdsmi_link_topology_t::link_type
amdsmi_link_type_t link_type
type of the link
Definition: amdsmi.h:2218
amdsmi_link_topology_t::num_hops
uint8_t num_hops
number of hops
Definition: amdsmi.h:2219
amdsmi_link_topology_t::link_status
amdsmi_link_status_t link_status
HW status of the link.
Definition: amdsmi.h:2217
amdsmi_link_topology_t::fb_sharing
uint8_t fb_sharing
framebuffer sharing flag
Definition: amdsmi.h:2220
amdsmi_memory_partition_config_t::numa_range_
Definition: amdsmi.h:790
amdsmi_memory_partition_config_t
Memory Partition Configuration. This structure is used to identify various memory partition configura...
Definition: amdsmi.h:786
amdsmi_metric_t
Metric.
Definition: amdsmi.h:2257
amdsmi_metric_t::res_group
amdsmi_metric_res_group_t res_group
Resource group this metric belongs to.
Definition: amdsmi.h:2264
amdsmi_metric_t::res_subgroup
amdsmi_metric_res_subgroup_t res_subgroup
Resource subgroup this metric belongs to.
Definition: amdsmi.h:2265
amdsmi_metric_t::flags
uint32_t flags
used to determine type of the metric (amdsmi_metric_type_t)
Definition: amdsmi.h:2261
amdsmi_metric_t::res_instance
uint32_t res_instance
Resource instance this metric belongs to.
Definition: amdsmi.h:2266
amdsmi_metric_t::vf_mask
uint32_t vf_mask
Mask of all active VFs + PF that this metric applies to.
Definition: amdsmi.h:2262
amdsmi_nps_caps_t::nps_flags_
Definition: amdsmi.h:770
amdsmi_nps_caps_t::nps_flags_::nps8_cap
uint32_t nps8_cap
bool 1 = true; 0 = false
Definition: amdsmi.h:774
amdsmi_nps_caps_t::nps_flags_::nps4_cap
uint32_t nps4_cap
bool 1 = true; 0 = false
Definition: amdsmi.h:773
amdsmi_nps_caps_t::nps_flags_::nps2_cap
uint32_t nps2_cap
bool 1 = true; 0 = false
Definition: amdsmi.h:772
amdsmi_nps_caps_t::nps_flags_::nps1_cap
uint32_t nps1_cap
bool 1 = true; 0 = false
Definition: amdsmi.h:771
amdsmi_p2p_capability_t
IO Link P2P Capability.
Definition: amdsmi.h:860
amdsmi_p2p_capability_t::is_iolink_atomics_64bit
uint8_t is_iolink_atomics_64bit
1 = true, 0 = false, UINT8_MAX = Not defined
Definition: amdsmi.h:863
amdsmi_p2p_capability_t::is_iolink_atomics_32bit
uint8_t is_iolink_atomics_32bit
1 = true, 0 = false, UINT8_MAX = Not defined
Definition: amdsmi.h:862
amdsmi_p2p_capability_t::is_iolink_bi_directional
uint8_t is_iolink_bi_directional
1 = true, 0 = false, UINT8_MAX = Not defined
Definition: amdsmi.h:865
amdsmi_p2p_capability_t::is_iolink_coherent
uint8_t is_iolink_coherent
1 = true, 0 = false, UINT8_MAX = Not defined
Definition: amdsmi.h:861
amdsmi_p2p_capability_t::is_iolink_dma
uint8_t is_iolink_dma
1 = true, 0 = false, UINT8_MAX = Not defined
Definition: amdsmi.h:864
amdsmi_partition_info_t
Partition Information.
Definition: amdsmi.h:1992
amdsmi_pcie_info_t::pcie_metric_
Definition: amdsmi.h:597
amdsmi_pcie_info_t::pcie_metric_::pcie_nak_received_count
uint64_t pcie_nak_received_count
total number of NAKs issued on the PCIe link by the receiver
Definition: amdsmi.h:605
amdsmi_pcie_info_t::pcie_metric_::pcie_replay_count
uint64_t pcie_replay_count
total number of the replays issued on the PCIe link
Definition: amdsmi.h:601
amdsmi_pcie_info_t::pcie_metric_::pcie_width
uint16_t pcie_width
current PCIe width
Definition: amdsmi.h:598
amdsmi_pcie_info_t::pcie_metric_::pcie_speed
uint32_t pcie_speed
current PCIe speed in MT/s
Definition: amdsmi.h:599
amdsmi_pcie_info_t::pcie_metric_::pcie_bandwidth
uint32_t pcie_bandwidth
current PCIe bandwidth in Mb/s
Definition: amdsmi.h:600
amdsmi_pcie_info_t::pcie_metric_::pcie_l0_to_recovery_count
uint64_t pcie_l0_to_recovery_count
total number of times the PCIe link transitioned from L0 to the recovery state
Definition: amdsmi.h:602
amdsmi_pcie_info_t::pcie_metric_::pcie_nak_sent_count
uint64_t pcie_nak_sent_count
total number of NAKs issued on the PCIe link by the device
Definition: amdsmi.h:604
amdsmi_pcie_info_t::pcie_metric_::pcie_replay_roll_over_count
uint64_t pcie_replay_roll_over_count
total number of replay rollovers issued on the PCIe link
Definition: amdsmi.h:603
amdsmi_pcie_info_t::pcie_metric_::pcie_lc_perf_other_end_recovery_count
uint32_t pcie_lc_perf_other_end_recovery_count
PCIe other end recovery counter.
Definition: amdsmi.h:606
amdsmi_pcie_info_t::pcie_static_
Definition: amdsmi.h:589
amdsmi_pcie_info_t::pcie_static_::max_pcie_width
uint16_t max_pcie_width
maximum number of PCIe lanes
Definition: amdsmi.h:590
amdsmi_pcie_info_t::pcie_static_::max_pcie_interface_version
uint32_t max_pcie_interface_version
maximum PCIe link generation
Definition: amdsmi.h:594
amdsmi_pcie_info_t::pcie_static_::slot_type
amdsmi_card_form_factor_t slot_type
card form factor
Definition: amdsmi.h:593
amdsmi_pcie_info_t::pcie_static_::max_pcie_speed
uint32_t max_pcie_speed
maximum PCIe speed in GT/s
Definition: amdsmi.h:591
amdsmi_pcie_info_t::pcie_static_::pcie_interface_version
uint32_t pcie_interface_version
PCIe interface version.
Definition: amdsmi.h:592
amdsmi_pcie_info_t
pcie information
Definition: amdsmi.h:588
amdsmi_pf_fb_info_t
PF FB Information.
Definition: amdsmi.h:1966
amdsmi_pf_fb_info_t::pf_fb_reserved
uint32_t pf_fb_reserved
Total fb consumed by PF.
Definition: amdsmi.h:1968
amdsmi_pf_fb_info_t::min_vf_fb_usable
uint32_t min_vf_fb_usable
Minimum usable fb size in MB.
Definition: amdsmi.h:1972
amdsmi_pf_fb_info_t::fb_alignment
uint32_t fb_alignment
FB alignment.
Definition: amdsmi.h:1970
amdsmi_pf_fb_info_t::total_fb_size
uint32_t total_fb_size
Total GPU fb size in MB.
Definition: amdsmi.h:1967
amdsmi_pf_fb_info_t::max_vf_fb_usable
uint32_t max_vf_fb_usable
Maximum usable fb size in MB.
Definition: amdsmi.h:1971
amdsmi_pf_fb_info_t::pf_fb_offset
uint32_t pf_fb_offset
PF FB offset.
Definition: amdsmi.h:1969
amdsmi_power_cap_info_t
Power Cap Information.
Definition: amdsmi.h:637
amdsmi_power_cap_info_t::power_cap
uint64_t power_cap
current power cap Units uW {@linux_bm} or W {@host}
Definition: amdsmi.h:638
amdsmi_power_cap_info_t::dpm_cap
uint64_t dpm_cap
dpm power cap Units MHz {@linux_bm} or Hz {@host}
Definition: amdsmi.h:640
amdsmi_power_cap_info_t::max_power_cap
uint64_t max_power_cap
maximum power cap Units uW {@linux_bm} or W {@host}
Definition: amdsmi.h:642
amdsmi_power_cap_info_t::default_power_cap
uint64_t default_power_cap
default power cap Units uW {@linux_bm} or W {@host}
Definition: amdsmi.h:639
amdsmi_power_cap_info_t::min_power_cap
uint64_t min_power_cap
minimum power cap Units uW {@linux_bm} or W {@host}
Definition: amdsmi.h:641
amdsmi_power_info_t
Power Information.
Definition: amdsmi.h:685
amdsmi_power_info_t::soc_voltage
uint64_t soc_voltage
SOC voltage measurement in mV {@linux_bm} or V {@host}.
Definition: amdsmi.h:690
amdsmi_power_info_t::socket_power
uint64_t socket_power
Socket power in W {@linux_bm}, uW {@host}.
Definition: amdsmi.h:686
amdsmi_power_info_t::power_limit
uint32_t power_limit
The power limit in W {@linux_bm}, Linux only.
Definition: amdsmi.h:692
amdsmi_power_info_t::mem_voltage
uint64_t mem_voltage
MEM voltage measurement in mV {@linux_bm} or V {@host}.
Definition: amdsmi.h:691
amdsmi_power_info_t::current_socket_power
uint32_t current_socket_power
Current socket power in W {@linux_bm}, Linux only, Mi 300+ Series cards.
Definition: amdsmi.h:687
amdsmi_power_info_t::average_socket_power
uint32_t average_socket_power
Average socket power in W {@linux_bm}, Linux only, Navi + Mi 200 and earlier Series cards.
Definition: amdsmi.h:688
amdsmi_power_info_t::gfx_voltage
uint64_t gfx_voltage
GFX voltage measurement in mV {@linux_bm} or V {@host}.
Definition: amdsmi.h:689
amdsmi_profile_caps_info_t
Profile Caps Information.
Definition: amdsmi.h:2070
amdsmi_profile_info_t
Profile Information.
Definition: amdsmi.h:2084
amdsmi_ras_feature_t
This structure holds ras feature.
Definition: amdsmi.h:929
amdsmi_ras_feature_t::ras_eeprom_version
uint32_t ras_eeprom_version
Definition: amdsmi.h:930
amdsmi_ras_feature_t::ecc_correction_schema_flag
uint32_t ecc_correction_schema_flag
Definition: amdsmi.h:932
amdsmi_sched_info_t
Schedule Information.
Definition: amdsmi.h:2035
amdsmi_sched_info_t::boot_up_time
uint64_t boot_up_time
in microseconds
Definition: amdsmi.h:2037
amdsmi_topology_nearest_t
Topology Nearest.
Definition: amdsmi.h:2229
amdsmi_vbios_info_t
VBios Information.
Definition: amdsmi.h:651
amdsmi_version_t
This structure holds version information.
Definition: amdsmi.h:2275
amdsmi_version_t::minor
uint32_t minor
Minor version.
Definition: amdsmi.h:2277
amdsmi_version_t::major
uint32_t major
Major version.
Definition: amdsmi.h:2276
amdsmi_version_t::release
uint32_t release
Patch, build or stepping version.
Definition: amdsmi.h:2278
amdsmi_vf_data_t
VF Data.
Definition: amdsmi.h:2059
amdsmi_vf_fb_info_t
VF FB Information.
Definition: amdsmi.h:1981
amdsmi_vf_fb_info_t::fb_size
uint32_t fb_size
Size in MB Must be divisible by 16 and not less than 256.
Definition: amdsmi.h:1983
amdsmi_vf_fb_info_t::fb_offset
uint32_t fb_offset
Offset in MB from start of the framebuffer.
Definition: amdsmi.h:1982
amdsmi_vf_handle_t
VF Handle.
Definition: amdsmi.h:1930
amdsmi_vf_info_t
VF Information.
Definition: amdsmi.h:2024
amdsmi_vf_info_t::gfx_timeslice
uint32_t gfx_timeslice
Graphics timeslice in us, maximum value is 1000 ms.
Definition: amdsmi.h:2026
amdsmi_vram_info_t
VRam Information.
Definition: amdsmi.h:713
amdsmi_vram_info_t::vram_bit_width
uint32_t vram_bit_width
In bits.
Definition: amdsmi.h:717
amdsmi_vram_info_t::vram_size
uint64_t vram_size
vram size in MB
Definition: amdsmi.h:716
amdsmi_vram_info_t::vram_max_bandwidth
uint64_t vram_max_bandwidth
The VRAM max bandwidth at current memory clock (GB/s)
Definition: amdsmi.h:718
amdsmi_xgmi_fb_sharing_caps_t::cap_
Definition: amdsmi.h:2241
amdsmi_bdf_t
bdf types
Definition: amdsmi.h:567
amdsmi_cper_valid_bits_t
Definition: amdsmi.h:992
amdsmi_nps_caps_t
This union holds memory partition bitmask.
Definition: amdsmi.h:769
amdsmi_xgmi_fb_sharing_caps_t
XGMI FB Sharing Caps.
Definition: amdsmi.h:2240