amdsmi.h Source File

amdsmi.h Source File#

AMD SMI: amdsmi.h Source File
amdsmi.h
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1 /*
2  * Copyright (c) 2022-2024 Advanced Micro Devices, Inc. All rights reserved.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a copy
5  * of this software and associated documentation files (the "Software"), to deal
6  * in the Software without restriction, including without limitation the rights
7  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
8  * copies of the Software, and to permit persons to whom the Software is
9  * furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
17  * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
19  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
20  * THE SOFTWARE.
21  */
22 
29 #ifndef __AMDSMI_H__
30 #define __AMDSMI_H__
31 
32 #ifndef __KERNEL__
33 #include <stdint.h>
34 #include <stdbool.h>
35 #include <stddef.h>
36 #endif
37 
43 typedef enum {
44  AMDSMI_INIT_ALL_PROCESSORS = 0xFFFFFFFF,
45  AMDSMI_INIT_AMD_CPUS = (1 << 0),
46  AMDSMI_INIT_AMD_GPUS = (1 << 1),
47  AMDSMI_INIT_NON_AMD_CPUS = (1 << 2),
48  AMDSMI_INIT_NON_AMD_GPUS = (1 << 3),
49  AMDSMI_INIT_AMD_APUS = (AMDSMI_INIT_AMD_CPUS | AMDSMI_INIT_AMD_GPUS) // Default option
50 } amdsmi_init_flags_t;
51 
55 #define AMDSMI_MAX_DEVICES 32
56 #define AMDSMI_MAX_VF_COUNT 32
57 #define AMDSMI_PF_INDEX (AMDSMI_MAX_VF_COUNT - 1)
58 #define AMDSMI_MAX_STRING_LENGTH 256
59 #define AMDSMI_MAX_DRIVER_INFO_RSVD 64
60 #define AMDSMI_MAX_MM_IP_COUNT 8
61 #define AMDSMI_MAX_CACHE_TYPES 10
62 #define AMDSMI_MAX_NUM_PM_POLICIES 32
63 #define AMDSMI_MAX_NAME 32
64 
66 #define AMDSMI_MAX_DRIVER_NUM 2
67 
69 #define AMDSMI_MAX_DATE_LENGTH 32
70 
71 #define AMDSMI_GPU_UUID_SIZE 38
72 
73 #define AMDSMI_DFC_FW_NUMBER_OF_ENTRIES 9
74 
75 #define AMDSMI_MAX_WHITE_LIST_ELEMENTS 16
76 #define AMDSMI_MAX_BLACK_LIST_ELEMENTS 64
77 #define AMDSMI_MAX_UUID_ELEMENTS 16
78 #define AMDSMI_MAX_TA_WHITE_LIST_ELEMENTS 8
79 
80 #define AMDSMI_MAX_ERR_RECORDS 10
81 
83 #define AMDSMI_EVENT_MSG_SIZE 256
84 
85 #define AMDSMI_MAX_PROFILE_COUNT 16
86 
90 #define AMDSMI_TIME_FORMAT "%02d:%02d:%02d.%03d"
91 #define AMDSMI_DATE_FORMAT "%04d-%02d-%02d:%02d:%02d:%02d.%03d"
92 
98 #define AMDSMI_MASK_ALL (~0ULL)
99 
101 #define AMDSMI_MASK_DEFAULT ((1ULL << 62) - 1)
102 
104 #define AMDSMI_MASK_INIT (0ULL)
105 
107 #define AMDSMI_MASK_HIGH_AND_MED_SEVERITY (~((1ULL << 61) - 1))
108 
112 #define AMDSMI_MASK_HIGH_ERROR_SEVERITY_ONLY(mask) (mask & ((1ULL << 60) - 1))
113 #define AMDSMI_MASK_INCLUDE_MED_ERROR_SEVERITY(mask) (mask | (1ULL << 60))
114 #define AMDSMI_MASK_INCLUDE_LOW_ERROR_SEVERITY(mask) (mask | (1ULL << 61))
115 #define AMDSMI_MASK_INCLUDE_WARN_SEVERITY(mask) (mask | (1ULL << 62))
116 #define AMDSMI_MASK_INCLUDE_INFO_SEVERITY(mask) (mask | (1ULL << 63))
117 
121 #define AMDSMI_MASK_HIGH_SEVERITY_ONLY(mask) (mask & ((1ULL << 62) - 1))
122 #define AMDSMI_MASK_INCLUDE_MED_SEVERITY(mask) AMDSMI_MASK_INCLUDE_WARN_SEVERITY(mask)
123 #define AMDSMI_MASK_INCLUDE_LOW_SEVERITY(mask) AMDSMI_MASK_INCLUDE_INFO_SEVERITY(mask)
124 
125 #define AMDSMI_MASK_INCLUDE_CATEGORY(mask, cate) (mask | (1ULL << cate))
126 #define AMDSMI_MASK_EXCLUDE_CATEGORY(mask, cate) (mask & (~(1ULL << cate)))
127 
128 #define AMDSMI_MAX_NUM_XGMI_PHYSICAL_LINK 64
129 #define AMDSMI_MAX_FB_SHARING_GROUPS 64
130 #define AMDSMI_MAX_NUM_CONNECTED_NODES 64
131 
132 #define AMDSMI_MAX_NUM_METRICS_V1 255
133 #define AMDSMI_MAX_NUM_METRICS AMDSMI_MAX_NUM_METRICS_V1
134 
135 #define AMDSMI_MAX_BAD_PAGE_RECORD_V1 512
136 #define AMDSMI_MAX_BAD_PAGE_RECORD_V2 16384
137 #define AMDSMI_MAX_BAD_PAGE_RECORD AMDSMI_MAX_BAD_PAGE_RECORD_V2
138 
139 #define AMDSMI_MAX_CP_PROFILE_RESOURCES 32
140 #define AMDSMI_MAX_ACCELERATOR_PARTITIONS 8
141 #define AMDSMI_MAX_ACCELERATOR_PROFILE 32
142 #define AMDSMI_MAX_NUM_NUMA_NODES 32
143 
144 #define MAX_NUMBER_OF_AFIDS_PER_RECORD 12
145 
147 typedef void *amdsmi_socket_handle;
148 typedef void *amdsmi_event_set;
149 typedef void *amdsmi_processor_handle;
150 
154 typedef enum {
155  AMDSMI_STATUS_SUCCESS = 0,
156  // Library usage errors
157  AMDSMI_STATUS_INVAL = 1,
158  AMDSMI_STATUS_NOT_SUPPORTED = 2,
159  AMDSMI_STATUS_NOT_YET_IMPLEMENTED = 3,
160  AMDSMI_STATUS_FAIL_LOAD_MODULE = 4,
161  AMDSMI_STATUS_FAIL_LOAD_SYMBOL = 5,
162  AMDSMI_STATUS_DRM_ERROR = 6,
163  AMDSMI_STATUS_API_FAILED = 7,
164  AMDSMI_STATUS_TIMEOUT = 8,
165  AMDSMI_STATUS_RETRY = 9,
166  AMDSMI_STATUS_NO_PERM = 10,
167  AMDSMI_STATUS_INTERRUPT = 11,
168  AMDSMI_STATUS_IO = 12,
169  AMDSMI_STATUS_ADDRESS_FAULT = 13,
170  AMDSMI_STATUS_FILE_ERROR = 14,
171  AMDSMI_STATUS_OUT_OF_RESOURCES = 15,
172  AMDSMI_STATUS_INTERNAL_EXCEPTION = 16,
173  AMDSMI_STATUS_INPUT_OUT_OF_BOUNDS = 17,
174  AMDSMI_STATUS_INIT_ERROR = 18,
175  AMDSMI_STATUS_REFCOUNT_OVERFLOW = 19,
176  AMDSMI_STATUS_MORE_DATA = 20,
177  // Processor related errors
178  AMDSMI_STATUS_BUSY = 30,
179  AMDSMI_STATUS_NOT_FOUND = 31,
180  AMDSMI_STATUS_NOT_INIT = 32,
181  AMDSMI_STATUS_NO_SLOT = 33,
182  AMDSMI_STATUS_DRIVER_NOT_LOADED = 34,
183  // Data and size errors
184  AMDSMI_STATUS_NO_DATA = 40,
185  AMDSMI_STATUS_INSUFFICIENT_SIZE = 41,
186  AMDSMI_STATUS_UNEXPECTED_SIZE = 42,
187  AMDSMI_STATUS_UNEXPECTED_DATA = 43,
188  //esmi errors
189  AMDSMI_STATUS_NON_AMD_CPU = 44,
190  AMDSMI_STATUS_NO_ENERGY_DRV = 45,
191  AMDSMI_STATUS_NO_MSR_DRV = 46,
192  AMDSMI_STATUS_NO_HSMP_DRV = 47,
193  AMDSMI_STATUS_NO_HSMP_SUP = 48,
194  AMDSMI_STATUS_NO_HSMP_MSG_SUP = 49,
195  AMDSMI_STATUS_HSMP_TIMEOUT = 50,
196  AMDSMI_STATUS_NO_DRV = 51,
197  AMDSMI_STATUS_FILE_NOT_FOUND = 52,
198  AMDSMI_STATUS_ARG_PTR_NULL = 53,
199  AMDSMI_STATUS_AMDGPU_RESTART_ERR = 54,
200  AMDSMI_STATUS_SETTING_UNAVAILABLE = 55,
201 
202  // General errors
203  AMDSMI_STATUS_MAP_ERROR = 0xFFFFFFFE,
204  AMDSMI_STATUS_UNKNOWN_ERROR = 0xFFFFFFFF,
205 } amdsmi_status_t;
206 
210 typedef enum {
211  AMDSMI_CACHE_PROPERTY_ENABLED = 0x00000001,
212  AMDSMI_CACHE_PROPERTY_DATA_CACHE = 0x00000002,
213  AMDSMI_CACHE_PROPERTY_INST_CACHE = 0x00000004,
214  AMDSMI_CACHE_PROPERTY_CPU_CACHE = 0x00000008,
215  AMDSMI_CACHE_PROPERTY_SIMD_CACHE = 0x00000010,
216 } amdsmi_cache_property_type_t;
217 
218 typedef enum {
219  AMDSMI_FW_ID_SMU = 1,
220  AMDSMI_FW_ID_FIRST = AMDSMI_FW_ID_SMU,
221  AMDSMI_FW_ID_CP_CE,
222  AMDSMI_FW_ID_CP_PFP,
223  AMDSMI_FW_ID_CP_ME,
224  AMDSMI_FW_ID_CP_MEC_JT1,
225  AMDSMI_FW_ID_CP_MEC_JT2,
226  AMDSMI_FW_ID_CP_MEC1,
227  AMDSMI_FW_ID_CP_MEC2,
228  AMDSMI_FW_ID_RLC,
229  AMDSMI_FW_ID_SDMA0,
230  AMDSMI_FW_ID_SDMA1,
231  AMDSMI_FW_ID_SDMA2,
232  AMDSMI_FW_ID_SDMA3,
233  AMDSMI_FW_ID_SDMA4,
234  AMDSMI_FW_ID_SDMA5,
235  AMDSMI_FW_ID_SDMA6,
236  AMDSMI_FW_ID_SDMA7,
237  AMDSMI_FW_ID_VCN,
238  AMDSMI_FW_ID_UVD,
239  AMDSMI_FW_ID_VCE,
240  AMDSMI_FW_ID_ISP,
241  AMDSMI_FW_ID_DMCU_ERAM,
242  AMDSMI_FW_ID_DMCU_ISR,
243  AMDSMI_FW_ID_RLC_RESTORE_LIST_GPM_MEM,
244  AMDSMI_FW_ID_RLC_RESTORE_LIST_SRM_MEM,
245  AMDSMI_FW_ID_RLC_RESTORE_LIST_CNTL,
246  AMDSMI_FW_ID_RLC_V,
247  AMDSMI_FW_ID_MMSCH,
248  AMDSMI_FW_ID_PSP_SYSDRV,
249  AMDSMI_FW_ID_PSP_SOSDRV,
250  AMDSMI_FW_ID_PSP_TOC,
251  AMDSMI_FW_ID_PSP_KEYDB,
252  AMDSMI_FW_ID_DFC,
253  AMDSMI_FW_ID_PSP_SPL,
254  AMDSMI_FW_ID_DRV_CAP,
255  AMDSMI_FW_ID_MC,
256  AMDSMI_FW_ID_PSP_BL,
257  AMDSMI_FW_ID_CP_PM4,
258  AMDSMI_FW_ID_RLC_P,
259  AMDSMI_FW_ID_SEC_POLICY_STAGE2,
260  AMDSMI_FW_ID_REG_ACCESS_WHITELIST,
261  AMDSMI_FW_ID_IMU_DRAM,
262  AMDSMI_FW_ID_IMU_IRAM,
263  AMDSMI_FW_ID_SDMA_TH0,
264  AMDSMI_FW_ID_SDMA_TH1,
265  AMDSMI_FW_ID_CP_MES,
266  AMDSMI_FW_ID_MES_STACK,
267  AMDSMI_FW_ID_MES_THREAD1,
268  AMDSMI_FW_ID_MES_THREAD1_STACK,
269  AMDSMI_FW_ID_RLX6,
270  AMDSMI_FW_ID_RLX6_DRAM_BOOT,
271  AMDSMI_FW_ID_RS64_ME,
272  AMDSMI_FW_ID_RS64_ME_P0_DATA,
273  AMDSMI_FW_ID_RS64_ME_P1_DATA,
274  AMDSMI_FW_ID_RS64_PFP,
275  AMDSMI_FW_ID_RS64_PFP_P0_DATA,
276  AMDSMI_FW_ID_RS64_PFP_P1_DATA,
277  AMDSMI_FW_ID_RS64_MEC,
278  AMDSMI_FW_ID_RS64_MEC_P0_DATA,
279  AMDSMI_FW_ID_RS64_MEC_P1_DATA,
280  AMDSMI_FW_ID_RS64_MEC_P2_DATA,
281  AMDSMI_FW_ID_RS64_MEC_P3_DATA,
282  AMDSMI_FW_ID_PPTABLE,
283  AMDSMI_FW_ID_PSP_SOC,
284  AMDSMI_FW_ID_PSP_DBG,
285  AMDSMI_FW_ID_PSP_INTF,
286  AMDSMI_FW_ID_RLX6_CORE1,
287  AMDSMI_FW_ID_RLX6_DRAM_BOOT_CORE1,
288  AMDSMI_FW_ID_RLCV_LX7,
289  AMDSMI_FW_ID_RLC_SAVE_RESTORE_LIST,
290  AMDSMI_FW_ID_ASD,
291  AMDSMI_FW_ID_TA_RAS,
292  AMDSMI_FW_ID_XGMI,
293  AMDSMI_FW_ID_RLC_SRLG,
294  AMDSMI_FW_ID_RLC_SRLS,
295  AMDSMI_FW_ID_SMC,
296  AMDSMI_FW_ID_DMCU,
297  AMDSMI_FW_ID_PSP_RAS,
298  AMDSMI_FW_ID_P2S_TABLE,
299  AMDSMI_FW_ID__MAX
300 } amdsmi_fw_block_t;
301 
305 typedef enum {
306  AMDSMI_MM_UVD,
307  AMDSMI_MM_VCE,
308  AMDSMI_MM_VCN,
309  AMDSMI_MM__MAX
310 } amdsmi_mm_ip_t;
311 
315 typedef enum {
316  AMDSMI_CLK_TYPE_SYS = 0x0,
317  AMDSMI_CLK_TYPE_FIRST = AMDSMI_CLK_TYPE_SYS,
318  AMDSMI_CLK_TYPE_GFX = AMDSMI_CLK_TYPE_SYS,
319  AMDSMI_CLK_TYPE_DF,
321  AMDSMI_CLK_TYPE_DCEF,
322  AMDSMI_CLK_TYPE_SOC,
323  AMDSMI_CLK_TYPE_MEM,
324  AMDSMI_CLK_TYPE_PCIE,
325  AMDSMI_CLK_TYPE_VCLK0,
326  AMDSMI_CLK_TYPE_VCLK1,
327  AMDSMI_CLK_TYPE_DCLK0,
328  AMDSMI_CLK_TYPE_DCLK1,
329  AMDSMI_CLK_TYPE__MAX = AMDSMI_CLK_TYPE_DCLK1
330 } amdsmi_clk_type_t;
335 typedef enum {
336  AMDSMI_TEMPERATURE_TYPE_EDGE,
337  AMDSMI_TEMPERATURE_TYPE_FIRST = AMDSMI_TEMPERATURE_TYPE_EDGE,
338  AMDSMI_TEMPERATURE_TYPE_HOTSPOT,
339  AMDSMI_TEMPERATURE_TYPE_JUNCTION = AMDSMI_TEMPERATURE_TYPE_HOTSPOT,
340  AMDSMI_TEMPERATURE_TYPE_VRAM,
341  AMDSMI_TEMPERATURE_TYPE_HBM_0,
342  AMDSMI_TEMPERATURE_TYPE_HBM_1,
343  AMDSMI_TEMPERATURE_TYPE_HBM_2,
344  AMDSMI_TEMPERATURE_TYPE_HBM_3,
345  AMDSMI_TEMPERATURE_TYPE_PLX,
346  AMDSMI_TEMPERATURE_TYPE__MAX = AMDSMI_TEMPERATURE_TYPE_PLX
347 } amdsmi_temperature_type_t;
352 typedef enum {
353  AMDSMI_TEMP_CURRENT = 0x0,
354  AMDSMI_TEMP_FIRST = AMDSMI_TEMP_CURRENT,
355  AMDSMI_TEMP_MAX,
356  AMDSMI_TEMP_MIN,
357  AMDSMI_TEMP_MAX_HYST,
360  AMDSMI_TEMP_MIN_HYST,
363  AMDSMI_TEMP_CRITICAL,
365  AMDSMI_TEMP_CRITICAL_HYST,
368  AMDSMI_TEMP_EMERGENCY,
372  AMDSMI_TEMP_EMERGENCY_HYST,
375  AMDSMI_TEMP_CRIT_MIN,
378  AMDSMI_TEMP_CRIT_MIN_HYST,
381  AMDSMI_TEMP_OFFSET,
383  AMDSMI_TEMP_LOWEST,
384  AMDSMI_TEMP_HIGHEST,
385  AMDSMI_TEMP_SHUTDOWN,
386  AMDSMI_TEMP_LAST = AMDSMI_TEMP_SHUTDOWN
387 } amdsmi_temperature_metric_t;
388 
389 
390 typedef enum {
391  AMDSMI_PROCESSOR_TYPE_UNKNOWN = 0,
392  AMDSMI_PROCESSOR_TYPE_AMD_GPU,
393  AMDSMI_PROCESSOR_TYPE_AMD_CPU,
394  AMDSMI_PROCESSOR_TYPE_NON_AMD_GPU,
395  AMDSMI_PROCESSOR_TYPE_NON_AMD_CPU,
396  AMDSMI_PROCESSOR_TYPE_AMD_CPU_CORE,
397  AMDSMI_PROCESSOR_TYPE_AMD_APU
398 } processor_type_t;
399 
400 typedef enum {
401  AMDSMI_EVENT_CATEGORY_NON_USED = 0,
402  AMDSMI_EVENT_CATEGORY_DRIVER = 1,
403  AMDSMI_EVENT_CATEGORY_RESET = 2,
404  AMDSMI_EVENT_CATEGORY_SCHED = 3,
405  AMDSMI_EVENT_CATEGORY_VBIOS = 4,
406  AMDSMI_EVENT_CATEGORY_ECC = 5,
407  AMDSMI_EVENT_CATEGORY_PP = 6,
408  AMDSMI_EVENT_CATEGORY_IOV = 7,
409  AMDSMI_EVENT_CATEGORY_VF = 8,
410  AMDSMI_EVENT_CATEGORY_FW = 9,
411  AMDSMI_EVENT_CATEGORY_GPU = 10,
412  AMDSMI_EVENT_CATEGORY_GUARD = 11,
413  AMDSMI_EVENT_CATEGORY_GPUMON = 12,
414  AMDSMI_EVENT_CATEGORY_MMSCH = 13,
415  AMDSMI_EVENT_CATEGORY_XGMI = 14,
416  AMDSMI_EVENT_CATEGORY__MAX
417 } amdsmi_event_category_t;
418 
422 typedef enum {
423  AMDSMI_EVENT_GPU_DEVICE_LOST = 0,
424  AMDSMI_EVENT_GPU_NOT_SUPPORTED,
425  AMDSMI_EVENT_GPU_RMA,
426  AMDSMI_EVENT_GPU_NOT_INITIALIZED,
427  AMDSMI_EVENT_GPU_MMSCH_ABNORMAL_STATE,
428  AMDSMI_EVENT_GPU_RLCV_ABNORMAL_STATE,
429  AMDSMI_EVENT_GPU_SDMA_ENGINE_BUSY,
430  AMDSMI_EVENT_GPU_RLC_ENGINE_BUSY,
431  AMDSMI_EVENT_GPU_GC_ENGINE_BUSY,
432  AMDSMI_EVENT_GPU__MAX
433 } amdsmi_event_gpu_t;
434 
435 typedef enum {
436  AMDSMI_EVENT_DRIVER_SPIN_LOCK_BUSY = 0,
437  AMDSMI_EVENT_DRIVER_ALLOC_SYSTEM_MEM_FAIL,
438  AMDSMI_EVENT_DRIVER_CREATE_GFX_WORKQUEUE_FAIL,
439  AMDSMI_EVENT_DRIVER_CREATE_MM_WORKQUEUE_FAIL,
440  AMDSMI_EVENT_DRIVER_BUFFER_OVERFLOW,
441 
442  AMDSMI_EVENT_DRIVER_DEV_INIT_FAIL,
443  AMDSMI_EVENT_DRIVER_CREATE_THREAD_FAIL,
444  AMDSMI_EVENT_DRIVER_NO_ACCESS_PCI_REGION,
445  AMDSMI_EVENT_DRIVER_MMIO_FAIL,
446  AMDSMI_EVENT_DRIVER_INTERRUPT_INIT_FAIL,
447 
448  AMDSMI_EVENT_DRIVER_INVALID_VALUE,
449  AMDSMI_EVENT_DRIVER_CREATE_MUTEX_FAIL,
450  AMDSMI_EVENT_DRIVER_CREATE_TIMER_FAIL,
451  AMDSMI_EVENT_DRIVER_CREATE_EVENT_FAIL,
452  AMDSMI_EVENT_DRIVER_CREATE_SPIN_LOCK_FAIL,
453 
454  AMDSMI_EVENT_DRIVER_ALLOC_FB_MEM_FAIL,
455  AMDSMI_EVENT_DRIVER_ALLOC_DMA_MEM_FAIL,
456  AMDSMI_EVENT_DRIVER_NO_FB_MANAGER,
457  AMDSMI_EVENT_DRIVER_HW_INIT_FAIL,
458  AMDSMI_EVENT_DRIVER_SW_INIT_FAIL,
459 
460  AMDSMI_EVENT_DRIVER_INIT_CONFIG_ERROR,
461  AMDSMI_EVENT_DRIVER_ERROR_LOGGING_FAILED,
462  AMDSMI_EVENT_DRIVER_CREATE_RWLOCK_FAIL,
463  AMDSMI_EVENT_DRIVER_CREATE_RWSEMA_FAIL,
464  AMDSMI_EVENT_DRIVER_GET_READ_LOCK_FAIL,
465 
466  AMDSMI_EVENT_DRIVER_GET_WRITE_LOCK_FAIL,
467  AMDSMI_EVENT_DRIVER_GET_READ_SEMA_FAIL,
468  AMDSMI_EVENT_DRIVER_GET_WRITE_SEMA_FAIL,
469 
470  AMDSMI_EVENT_DRIVER_DIAG_DATA_INIT_FAIL,
471  AMDSMI_EVENT_DRIVER_DIAG_DATA_MEM_REQ_FAIL,
472  AMDSMI_EVENT_DRIVER_DIAG_DATA_VADDR_REQ_FAIL,
473  AMDSMI_EVENT_DRIVER_DIAG_DATA_BUS_ADDR_REQ_FAIL,
474 
475  AMDSMI_EVENT_DRIVER_HRTIMER_START_FAIL,
476  AMDSMI_EVENT_DRIVER_CREATE_DRIVER_FILE_FAIL,
477  AMDSMI_EVENT_DRIVER_CREATE_DEVICE_FILE_FAIL,
478  AMDSMI_EVENT_DRIVER_CREATE_DEBUGFS_FILE_FAIL,
479  AMDSMI_EVENT_DRIVER_CREATE_DEBUGFS_DIR_FAIL,
480 
481  AMDSMI_EVENT_DRIVER_PCI_ENABLE_DEVICE_FAIL,
482  AMDSMI_EVENT_DRIVER_FB_MAP_FAIL,
483  AMDSMI_EVENT_DRIVER_DOORBELL_MAP_FAIL,
484  AMDSMI_EVENT_DRIVER_PCI_REGISTER_DRIVER_FAIL,
485 
486  AMDSMI_EVENT_DRIVER_ALLOC_IOVA_ALIGN_FAIL,
487 
488  AMDSMI_EVENT_DRIVER_ROM_MAP_FAIL,
489  AMDSMI_EVENT_DRIVER_FULL_ACCESS_TIMEOUT,
490 
491  AMDSMI_EVENT_DRIVER__MAX
492 } amdsmi_event_driver_t;
493 
494 typedef enum {
495  AMDSMI_EVENT_FW_CMD_ALLOC_BUF_FAIL = 0,
496  AMDSMI_EVENT_FW_CMD_BUF_PREP_FAIL,
497  AMDSMI_EVENT_FW_RING_INIT_FAIL,
498  AMDSMI_EVENT_FW_FW_APPLY_SECURITY_POLICY_FAIL,
499  AMDSMI_EVENT_FW_START_RING_FAIL,
500 
501  AMDSMI_EVENT_FW_FW_LOAD_FAIL,
502  AMDSMI_EVENT_FW_EXIT_FAIL,
503  AMDSMI_EVENT_FW_INIT_FAIL,
504  AMDSMI_EVENT_FW_CMD_SUBMIT_FAIL,
505  AMDSMI_EVENT_FW_CMD_FENCE_WAIT_FAIL,
506 
507  AMDSMI_EVENT_FW_TMR_LOAD_FAIL,
508  AMDSMI_EVENT_FW_TOC_LOAD_FAIL,
509  AMDSMI_EVENT_FW_RAS_LOAD_FAIL,
510  AMDSMI_EVENT_FW_RAS_UNLOAD_FAIL,
511  AMDSMI_EVENT_FW_RAS_TA_INVOKE_FAIL,
512  AMDSMI_EVENT_FW_RAS_TA_ERR_INJECT_FAIL,
513 
514  AMDSMI_EVENT_FW_ASD_LOAD_FAIL,
515  AMDSMI_EVENT_FW_ASD_UNLOAD_FAIL,
516  AMDSMI_EVENT_FW_AUTOLOAD_FAIL,
517  AMDSMI_EVENT_FW_VFGATE_FAIL,
518 
519  AMDSMI_EVENT_FW_XGMI_LOAD_FAIL,
520  AMDSMI_EVENT_FW_XGMI_UNLOAD_FAIL,
521  AMDSMI_EVENT_FW_XGMI_TA_INVOKE_FAIL,
522 
523  AMDSMI_EVENT_FW_TMR_INIT_FAIL,
524  AMDSMI_EVENT_FW_NOT_SUPPORTED_FEATURE,
525  AMDSMI_EVENT_FW_GET_PSP_TRACELOG_FAIL,
526 
527  AMDSMI_EVENT_FW_SET_SNAPSHOT_ADDR_FAIL,
528  AMDSMI_EVENT_FW_SNAPSHOT_TRIGGER_FAIL,
529 
530  AMDSMI_EVENT_FW_MIGRATION_GET_PSP_INFO_FAIL,
531  AMDSMI_EVENT_FW_MIGRATION_EXPORT_FAIL,
532  AMDSMI_EVENT_FW_MIGRATION_IMPORT_FAIL,
533 
534  AMDSMI_EVENT_FW_BL_FAIL,
535  AMDSMI_EVENT_FW_RAS_BOOT_FAIL,
536  AMDSMI_EVENT_FW_MAILBOX_ERROR,
537 
538  AMDSMI_EVENT_FW__MAX
539 } amdsmi_event_fw_t;
540 
541 #define AMDSMI_EVENT_FW_FW_INIT_FAIL AMDSMI_EVENT_FW_RING_INIT_FAIL
542 
543 typedef enum {
544  AMDSMI_EVENT_RESET_GPU = 0,
545  AMDSMI_EVENT_RESET_GPU_FAILED,
546  AMDSMI_EVENT_RESET_FLR,
547  AMDSMI_EVENT_RESET_FLR_FAILED,
548  AMDSMI_EVENT_RESET__MAX
549 } amdsmi_event_reset_t;
550 
551 typedef enum {
552  AMDSMI_EVENT_IOV_NO_GPU_IOV_CAP = 0,
553  AMDSMI_EVENT_IOV_ASIC_NO_SRIOV_SUPPORT,
554  AMDSMI_EVENT_IOV_ENABLE_SRIOV_FAIL,
555  AMDSMI_EVENT_IOV_CMD_TIMEOUT,
556  AMDSMI_EVENT_IOV_CMD_ERROR,
557 
558  AMDSMI_EVENT_IOV_INIT_IV_RING_FAIL,
559  AMDSMI_EVENT_IOV_SRIOV_STRIDE_ERROR,
560  AMDSMI_EVENT_IOV_WS_SAVE_TIMEOUT,
561  AMDSMI_EVENT_IOV_WS_IDLE_TIMEOUT,
562  AMDSMI_EVENT_IOV_WS_RUN_TIMEOUT,
563  AMDSMI_EVENT_IOV_WS_LOAD_TIMEOUT,
564  AMDSMI_EVENT_IOV_WS_SHUTDOWN_TIMEOUT,
565  AMDSMI_EVENT_IOV_WS_ALREADY_SHUTDOWN,
566  AMDSMI_EVENT_IOV_WS_INFINITE_LOOP,
567  AMDSMI_EVENT_IOV_WS_REENTRANT_ERROR,
568  AMDSMI_EVENT_IOV__MAX
569 } amdsmi_event_iov_t;
570 
571 typedef enum {
572  AMDSMI_EVENT_ECC_UCE = 0,
573  AMDSMI_EVENT_ECC_CE,
574  AMDSMI_EVENT_ECC_IN_PF_FB,
575  AMDSMI_EVENT_ECC_IN_CRI_REG,
576  AMDSMI_EVENT_ECC_IN_VF_CRI,
577  AMDSMI_EVENT_ECC_REACH_THD,
578  AMDSMI_EVENT_ECC_VF_CE,
579  AMDSMI_EVENT_ECC_VF_UE,
580  AMDSMI_EVENT_ECC_IN_SAME_ROW,
581  AMDSMI_EVENT_ECC_UMC_UE,
582  AMDSMI_EVENT_ECC_GFX_CE,
583  AMDSMI_EVENT_ECC_GFX_UE,
584  AMDSMI_EVENT_ECC_SDMA_CE,
585  AMDSMI_EVENT_ECC_SDMA_UE,
586  AMDSMI_EVENT_ECC_GFX_CE_TOTAL,
587  AMDSMI_EVENT_ECC_GFX_UE_TOTAL,
588  AMDSMI_EVENT_ECC_SDMA_CE_TOTAL,
589  AMDSMI_EVENT_ECC_SDMA_UE_TOTAL,
590  AMDSMI_EVENT_ECC_UMC_CE_TOTAL,
591  AMDSMI_EVENT_ECC_UMC_UE_TOTAL,
592  AMDSMI_EVENT_ECC_MMHUB_CE,
593  AMDSMI_EVENT_ECC_MMHUB_UE,
594  AMDSMI_EVENT_ECC_MMHUB_CE_TOTAL,
595  AMDSMI_EVENT_ECC_MMHUB_UE_TOTAL,
596  AMDSMI_EVENT_ECC_XGMI_WAFL_CE,
597  AMDSMI_EVENT_ECC_XGMI_WAFL_UE,
598  AMDSMI_EVENT_ECC_XGMI_WAFL_CE_TOTAL,
599  AMDSMI_EVENT_ECC_XGMI_WAFL_UE_TOTAL,
600  AMDSMI_EVENT_ECC_FATAL_ERROR,
601  AMDSMI_EVENT_ECC_POISON_CONSUMPTION,
602  AMDSMI_EVENT_ECC_ACA_DUMP,
603  AMDSMI_EVENT_ECC_WRONG_SOCKET_ID,
604  AMDSMI_EVENT_ECC_ACA_UNKNOWN_BLOCK_INSTANCE,
605  AMDSMI_EVENT_ECC_UNKNOWN_CHIPLET_CE,
606  AMDSMI_EVENT_ECC_UNKNOWN_CHIPLET_UE,
607  AMDSMI_EVENT_ECC_UMC_CHIPLET_CE,
608  AMDSMI_EVENT_ECC_UMC_CHIPLET_UE,
609  AMDSMI_EVENT_ECC_GFX_CHIPLET_CE,
610  AMDSMI_EVENT_ECC_GFX_CHIPLET_UE,
611  AMDSMI_EVENT_ECC_SDMA_CHIPLET_CE,
612  AMDSMI_EVENT_ECC_SDMA_CHIPLET_UE,
613  AMDSMI_EVENT_ECC_MMHUB_CHIPLET_CE,
614  AMDSMI_EVENT_ECC_MMHUB_CHIPLET_UE,
615  AMDSMI_EVENT_ECC_XGMI_WAFL_CHIPLET_CE,
616  AMDSMI_EVENT_ECC_XGMI_WAFL_CHIPLET_UE,
617  AMDSMI_EVENT_ECC_EEPROM_ENTRIES_FOUND,
618  AMDSMI_EVENT_ECC_UMC_DE,
619  AMDSMI_EVENT_ECC_UMC_DE_TOTAL,
620  AMDSMI_EVENT_ECC_UNKNOWN,
621  AMDSMI_EVENT_ECC_EEPROM_REACH_THD,
622  AMDSMI_EVENT_ECC_UMC_CHIPLET_DE,
623  AMDSMI_EVENT_ECC_UNKNOWN_CHIPLET_DE,
624  AMDSMI_EVENT_ECC_EEPROM_CHK_MISMATCH,
625  AMDSMI_EVENT_ECC_EEPROM_RESET,
626  AMDSMI_EVENT_ECC_EEPROM_RESET_FAILED,
627  AMDSMI_EVENT_ECC_EEPROM_APPEND,
628  AMDSMI_EVENT_ECC_THD_CHANGED,
629  AMDSMI_EVENT_ECC_DUP_ENTRIES,
630  AMDSMI_EVENT_ECC_EEPROM_WRONG_HDR,
631  AMDSMI_EVENT_ECC_EEPROM_WRONG_VER,
632 
633  AMDSMI_EVENT_ECC__MAX
634 } amdsmi_event_ecc_t;
635 
636 typedef enum {
637  AMDSMI_EVENT_PP_SET_DPM_POLICY_FAIL = 0,
638  AMDSMI_EVENT_PP_ACTIVATE_DPM_POLICY_FAIL,
639  AMDSMI_EVENT_PP_I2C_SLAVE_NOT_PRESENT,
640  AMDSMI_EVENT_PP_THROTTLER_EVENT,
641  AMDSMI_EVENT_PP__MAX
642 } amdsmi_event_pp_t;
643 
644 typedef enum {
645  AMDSMI_EVENT_SCHED_WORLD_SWITCH_FAIL = 0,
646  AMDSMI_EVENT_SCHED_DISABLE_AUTO_HW_SWITCH_FAIL,
647  AMDSMI_EVENT_SCHED_ENABLE_AUTO_HW_SWITCH_FAIL,
648  AMDSMI_EVENT_SCHED_GFX_SAVE_REG_FAIL,
649  AMDSMI_EVENT_SCHED_GFX_IDLE_REG_FAIL,
650 
651  AMDSMI_EVENT_SCHED_GFX_RUN_REG_FAIL,
652  AMDSMI_EVENT_SCHED_GFX_LOAD_REG_FAIL,
653  AMDSMI_EVENT_SCHED_GFX_INIT_REG_FAIL,
654  AMDSMI_EVENT_SCHED_MM_SAVE_REG_FAIL,
655  AMDSMI_EVENT_SCHED_MM_IDLE_REG_FAIL,
656 
657  AMDSMI_EVENT_SCHED_MM_RUN_REG_FAIL,
658  AMDSMI_EVENT_SCHED_MM_LOAD_REG_FAIL,
659  AMDSMI_EVENT_SCHED_MM_INIT_REG_FAIL,
660  AMDSMI_EVENT_SCHED_INIT_GPU_FAIL,
661  AMDSMI_EVENT_SCHED_RUN_GPU_FAIL,
662 
663  AMDSMI_EVENT_SCHED_SAVE_GPU_STATE_FAIL,
664  AMDSMI_EVENT_SCHED_LOAD_GPU_STATE_FAIL,
665  AMDSMI_EVENT_SCHED_IDLE_GPU_FAIL,
666  AMDSMI_EVENT_SCHED_FINI_GPU_FAIL,
667  AMDSMI_EVENT_SCHED_DEAD_VF,
668 
669  AMDSMI_EVENT_SCHED_EVENT_QUEUE_FULL,
670  AMDSMI_EVENT_SCHED_SHUTDOWN_VF_FAIL,
671  AMDSMI_EVENT_SCHED_RESET_VF_NUM_FAIL,
672  AMDSMI_EVENT_SCHED_IGNORE_EVENT,
673  AMDSMI_EVENT_SCHED_PF_SWITCH_FAIL,
674  AMDSMI_EVENT_SCHED__MAX
675 } amdsmi_event_sched_t;
676 
677 typedef enum {
678  AMDSMI_EVENT_VF_ATOMBIOS_INIT_FAIL = 0,
679  AMDSMI_EVENT_VF_NO_VBIOS,
680  AMDSMI_EVENT_VF_GPU_POST_ERROR,
681  AMDSMI_EVENT_VF_ATOMBIOS_GET_CLOCK_FAIL,
682  AMDSMI_EVENT_VF_FENCE_INIT_FAIL,
683  AMDSMI_EVENT_VF_AMDGPU_INIT_FAIL,
684  AMDSMI_EVENT_VF_IB_INIT_FAIL,
685  AMDSMI_EVENT_VF_AMDGPU_LATE_INIT_FAIL,
686  AMDSMI_EVENT_VF_ASIC_RESUME_FAIL,
687  AMDSMI_EVENT_VF_GPU_RESET_FAIL,
688  AMDSMI_EVENT_VF__MAX
689 } amdsmi_event_vf_max_t;
690 
691 typedef enum {
692  AMDSMI_EVENT_VBIOS_INVALID = 0,
693  AMDSMI_EVENT_VBIOS_IMAGE_MISSING,
694  AMDSMI_EVENT_VBIOS_CHECKSUM_ERR,
695  AMDSMI_EVENT_VBIOS_POST_FAIL,
696  AMDSMI_EVENT_VBIOS_READ_FAIL,
697 
698  AMDSMI_EVENT_VBIOS_READ_IMG_HEADER_FAIL,
699  AMDSMI_EVENT_VBIOS_READ_IMG_SIZE_FAIL,
700  AMDSMI_EVENT_VBIOS_GET_FW_INFO_FAIL,
701  AMDSMI_EVENT_VBIOS_GET_TBL_REVISION_FAIL,
702  AMDSMI_EVENT_VBIOS_PARSER_TBL_FAIL,
703 
704  AMDSMI_EVENT_VBIOS_IP_DISCOVERY_FAIL,
705  AMDSMI_EVENT_VBIOS_TIMEOUT,
706  AMDSMI_EVENT_VBIOS_HASH_INVALID,
707  AMDSMI_EVENT_VBIOS_HASH_UPDATED,
708  AMDSMI_EVENT_VBIOS_IP_DISCOVERY_BINARY_CHECKSUM_FAIL,
709  AMDSMI_EVENT_VBIOS_IP_DISCOVERY_TABLE_CHECKSUM_FAIL,
710  AMDSMI_EVENT_VBIOS__MAX
711 } amdsmi_event_vbios_t;
712 
713 typedef enum {
714  AMDSMI_EVENT_GUARD_RESET_FAIL = 0,
715  AMDSMI_EVENT_GUARD_EVENT_OVERFLOW,
716  AMDSMI_EVENT_GUARD__MAX
717 } amdsmi_event_guard_t;
718 
719 typedef enum {
720  AMDSMI_EVENT_GPUMON_INVALID_OPTION = 0,
721  AMDSMI_EVENT_GPUMON_INVALID_VF_INDEX,
722  AMDSMI_EVENT_GPUMON_INVALID_FB_SIZE,
723  AMDSMI_EVENT_GPUMON_NO_SUITABLE_SPACE,
724  AMDSMI_EVENT_GPUMON_NO_AVAILABLE_SLOT,
725 
726  AMDSMI_EVENT_GPUMON_OVERSIZE_ALLOCATION,
727  AMDSMI_EVENT_GPUMON_OVERLAPPING_FB,
728  AMDSMI_EVENT_GPUMON_INVALID_GFX_TIMESLICE,
729  AMDSMI_EVENT_GPUMON_INVALID_MM_TIMESLICE,
730  AMDSMI_EVENT_GPUMON_INVALID_GFX_PART,
731 
732  AMDSMI_EVENT_GPUMON_VF_BUSY,
733  AMDSMI_EVENT_GPUMON_INVALID_VF_NUM,
734  AMDSMI_EVENT_GPUMON_NOT_SUPPORTED,
735  AMDSMI_EVENT_GPUMON__MAX
736 } amdsmi_event_gpumon_t;
737 
738 typedef enum {
739  AMDSMI_EVENT_MMSCH_IGNORED_JOB = 0,
740  AMDSMI_EVENT_MMSCH_UNSUPPORTED_VCN_FW,
741  AMDSMI_EVENT_MMSCH__MAX
742 } amdsmi_event_mmsch_t;
743 
744 typedef enum {
745  AMDSMI_EVENT_XGMI_TOPOLOGY_UPDATE_FAILED = 0,
746  AMDSMI_EVENT_XGMI_TOPOLOGY_HW_INIT_UPDATE,
747  AMDSMI_EVENT_XGMI_TOPOLOGY_UPDATE_DONE,
748  AMDSMI_EVENT_XGMI_FB_SHARING_SETTING_ERROR,
749  AMDSMI_EVENT_XGMI_FB_SHARING_SETTING_RESET,
750  AMDSMI_EVENT_XGMI__MAX
751 } amdsmi_event_xgmi_t;
752 
756 typedef enum {
757  AMDSMI_RAS_ECC_SUPPORT_PARITY = (1 << 0),
758  AMDSMI_RAS_ECC_SUPPORT_CORRECTABLE = (1 << 1),
759  AMDSMI_RAS_ECC_SUPPORT_UNCORRECTABLE = (1 << 2),
760  AMDSMI_RAS_ECC_SUPPORT_POISON = (1 << 3)
761 } amdsmi_ecc_correction_schema_support_t;
762 
767 typedef enum {
768  AMDSMI_GUEST_FW_ID_VCE = 0,
769  AMDSMI_GUEST_FW_ID_UVD,
770  AMDSMI_GUEST_FW_ID_MC,
771  AMDSMI_GUEST_FW_ID_ME,
772  AMDSMI_GUEST_FW_ID_PFP,
773  AMDSMI_GUEST_FW_ID_CE,
774  AMDSMI_GUEST_FW_ID_RLC,
775  AMDSMI_GUEST_FW_ID_RLC_SRLC,
776  AMDSMI_GUEST_FW_ID_RLC_SRLG,
777  AMDSMI_GUEST_FW_ID_RLC_SRLS,
778  AMDSMI_GUEST_FW_ID_MEC,
779  AMDSMI_GUEST_FW_ID_MEC2,
780  AMDSMI_GUEST_FW_ID_SOS,
781  AMDSMI_GUEST_FW_ID_ASD,
782  AMDSMI_GUEST_FW_ID_TA_RAS,
783  AMDSMI_GUEST_FW_ID_TA_XGMI,
784  AMDSMI_GUEST_FW_ID_SMC,
785  AMDSMI_GUEST_FW_ID_SDMA,
786  AMDSMI_GUEST_FW_ID_SDMA2,
787  AMDSMI_GUEST_FW_ID_VCN,
788  AMDSMI_GUEST_FW_ID_DMCU,
789  AMDSMI_GUEST_FW_ID__MAX
790 } amdsmi_guest_fw_engine_id_t;
791 
792 typedef enum {
793  AMDSMI_VF_CONFIG_FB_SIZE_SET = 0,
794  AMDSMI_VF_CONFIG_FB_OFFSET_SET,
795  AMDSMI_VF_CONFIG_GFX_TIMESLICE_US_SET,
796  AMDSMI_VF_CONFIG_ENG_COMPUTE_BW_SET,
797  AMDSMI_VF_CONFIG_GUARD_THRESHOLD_FLR_SET,
798  AMDSMI_VF_CONFIG_GUARD_THRESHOLD_EXCL_MOD_SET,
799  AMDSMI_VF_CONFIG_GUARD_THRESHOLD_EXCL_TIMEOUT_SET,
800  AMDSMI_VF_CONFIG_GUARD_THRESHOLD_ALL_INT_SET,
801  AMDSMI_VF_CONFIG_ENG_ENCODE_BW_UVD_SET,
802  AMDSMI_VF_CONFIG_ENG_ENCODE_BW_VCE_SET,
803  AMDSMI_VF_CONFIG_ENG_ENCODE_BW_UVD1_SET,
804  AMDSMI_VF_CONFIG_ENG_ENCODE_BW_VCN_SET,
805  AMDSMI_VF_CONFIG_ENG_ENCODE_BW_VCN1_SET,
806  AMDSMI_VF_CONFIG__MAX
807 } amdsmi_vf_config_flags_t;
808 
809 typedef enum {
810  AMDSMI_VF_STATE_UNAVAILABLE,
811  AMDSMI_VF_STATE_AVAILABLE,
812  AMDSMI_VF_STATE_ACTIVE,
813  AMDSMI_VF_STATE_SUSPENDED,
814  AMDSMI_VF_STATE_FULLACCESS,
815  AMDSMI_VF_STATE_DEFAULT_AVAILABLE
816 } amdsmi_vf_sched_state_t;
817 
818 typedef enum {
819  AMDSMI_GUARD_EVENT_FLR,
820  AMDSMI_GUARD_EVENT_EXCLUSIVE_MOD,
821  AMDSMI_GUARD_EVENT_EXCLUSIVE_TIMEOUT,
822  AMDSMI_GUARD_EVENT_ALL_INT,
823  AMDSMI_GUARD_EVENT__MAX
824 } amdsmi_guard_type_t;
825 
826 typedef enum {
827  AMDSMI_DRIVER_LIBGV,
828  AMDSMI_DRIVER_KMD,
829  AMDSMI_DRIVER_AMDGPUV,
830  AMDSMI_DRIVER_AMDGPU,
831  AMDSMI_DRIVER_VMWGPUV,
832  AMDSMI_DRIVER__MAX
833 } amdsmi_driver_t;
834 
835 typedef enum {
836  AMDSMI_GUARD_STATE_NORMAL = 0,
837  AMDSMI_GUARD_STATE_FULL = 1,
838  AMDSMI_GUARD_STATE_OVERFLOW = 2,
839 } amdsmi_guard_state_t;
840 
841 typedef enum {
842  AMDSMI_SCHED_BLOCK_GFX = 0x0,
843  AMDSMI_SCHED_BLOCK_UVD = 0x1,
844  AMDSMI_SCHED_BLOCK_VCE = 0x2,
845  AMDSMI_SCHED_BLOCK_UVD1 = 0x3,
846  AMDSMI_SCHED_BLOCK_VCN = 0x4,
847  AMDSMI_SCHED_BLOCK_VCN1 = 0x5,
848 } amdsmi_sched_block_t;
849 
850 typedef enum {
851  GUEST_FW_LOAD_STATUS_OK = 0,
852  GUEST_FW_LOAD_STATUS_OBSOLETE_FW = 1,
853  GUEST_FW_LOAD_STATUS_BAD_SIG = 2,
854  GUEST_FW_LOAD_STATUS_FW_LOAD_FAIL = 3,
855  GUEST_FW_LOAD_STATUS_ERR_GENERIC = 4
856 } amdsmi_guest_fw_load_status_t;
857 
858 
859 typedef enum {
860  AMDSMI_LINK_STATUS_ENABLED = 0,
861  AMDSMI_LINK_STATUS_DISABLED = 1,
862  AMDSMI_LINK_STATUS_ERROR = 2
863 } amdsmi_link_status_t;
864 
865 typedef enum {
866  AMDSMI_LINK_TYPE_INTERNAL,
867  AMDSMI_LINK_TYPE_XGMI,
868  AMDSMI_LINK_TYPE_PCIE,
869  AMDSMI_LINK_TYPE_NOT_APPLICABLE,
870  AMDSMI_LINK_TYPE_UNKNOWN
871 } amdsmi_link_type_t;
872 
873 typedef enum {
874  AMDSMI_XGMI_FB_SHARING_MODE_CUSTOM = 0,
875  AMDSMI_XGMI_FB_SHARING_MODE_1 = 1,
876  AMDSMI_XGMI_FB_SHARING_MODE_2 = 2,
877  AMDSMI_XGMI_FB_SHARING_MODE_4 = 4,
878  AMDSMI_XGMI_FB_SHARING_MODE_8 = 8,
879  AMDSMI_XGMI_FB_SHARING_MODE_UNKNOWN = 0xFFFFFFFF
880 } amdsmi_xgmi_fb_sharing_mode_t;
881 
882 typedef enum {
883  AMDSMI_PROFILE_CAPABILITY_MEMORY = 0,
884  AMDSMI_PROFILE_CAPABILITY_ENCODE = 1,
885  AMDSMI_PROFILE_CAPABILITY_DECODE = 2,
886  AMDSMI_PROFILE_CAPABILITY_COMPUTE = 3,
887  AMDSMI_PROFILE_CAPABILITY__MAX,
888 } amdsmi_profile_capability_type_t;
889 
890 typedef enum {
891  AMDSMI_VRAM_TYPE_UNKNOWN = 0,
892  // HBM
893  AMDSMI_VRAM_TYPE_HBM = 1,
894  AMDSMI_VRAM_TYPE_HBM2 = 2,
895  AMDSMI_VRAM_TYPE_HBM2E = 3,
896  AMDSMI_VRAM_TYPE_HBM3 = 4,
897  // DDR
898  AMDSMI_VRAM_TYPE_DDR2 = 10,
899  AMDSMI_VRAM_TYPE_DDR3 = 11,
900  AMDSMI_VRAM_TYPE_DDR4 = 12,
901  // GDDR
902  AMDSMI_VRAM_TYPE_GDDR1 = 17,
903  AMDSMI_VRAM_TYPE_GDDR2 = 18,
904  AMDSMI_VRAM_TYPE_GDDR3 = 19,
905  AMDSMI_VRAM_TYPE_GDDR4 = 20,
906  AMDSMI_VRAM_TYPE_GDDR5 = 21,
907  AMDSMI_VRAM_TYPE_GDDR6 = 22,
908  AMDSMI_VRAM_TYPE_GDDR7 = 23,
909 } amdsmi_vram_type_t;
910 
911 typedef enum {
912  AMDSMI_VRAM_VENDOR_SAMSUNG,
913  AMDSMI_VRAM_VENDOR_INFINEON,
914  AMDSMI_VRAM_VENDOR_ELPIDA,
915  AMDSMI_VRAM_VENDOR_ETRON,
916  AMDSMI_VRAM_VENDOR_NANYA,
917  AMDSMI_VRAM_VENDOR_HYNIX,
918  AMDSMI_VRAM_VENDOR_MOSEL,
919  AMDSMI_VRAM_VENDOR_WINBOND,
920  AMDSMI_VRAM_VENDOR_ESMT,
921  AMDSMI_VRAM_VENDOR_MICRON,
922  AMDSMI_VRAM_VENDOR_UNKNOWN
923 } amdsmi_vram_vendor_t;
924 
925 typedef enum {
926  AMDSMI_GPU_BLOCK_INVALID = 0,
928  AMDSMI_GPU_BLOCK_FIRST = (1 << 0),
929 
930  AMDSMI_GPU_BLOCK_UMC = AMDSMI_GPU_BLOCK_FIRST,
931  AMDSMI_GPU_BLOCK_SDMA = (1 << 1),
932  AMDSMI_GPU_BLOCK_GFX = (1 << 2),
933  AMDSMI_GPU_BLOCK_MMHUB = (1 << 3),
934  AMDSMI_GPU_BLOCK_ATHUB = (1 << 4),
935  AMDSMI_GPU_BLOCK_PCIE_BIF = (1 << 5),
936  AMDSMI_GPU_BLOCK_HDP = (1 << 6),
937  AMDSMI_GPU_BLOCK_XGMI_WAFL = (1 << 7),
938  AMDSMI_GPU_BLOCK_DF = (1 << 8),
939  AMDSMI_GPU_BLOCK_SMN = (1 << 9),
940  AMDSMI_GPU_BLOCK_SEM = (1 << 10),
941  AMDSMI_GPU_BLOCK_MP0 = (1 << 11),
942  AMDSMI_GPU_BLOCK_MP1 = (1 << 12),
943  AMDSMI_GPU_BLOCK_FUSE = (1 << 13),
944  AMDSMI_GPU_BLOCK_MCA = (1 << 14),
945  AMDSMI_GPU_BLOCK_VCN = (1 << 15),
946  AMDSMI_GPU_BLOCK_JPEG = (1 << 16),
947  AMDSMI_GPU_BLOCK_IH = (1 << 17),
948  AMDSMI_GPU_BLOCK_MPIO = (1 << 18),
949  AMDSMI_GPU_BLOCK_LAST = AMDSMI_GPU_BLOCK_MPIO,
950 } amdsmi_gpu_block_t;
951 
952 typedef enum {
953  AMDSMI_CARD_FORM_FACTOR_PCIE,
954  AMDSMI_CARD_FORM_FACTOR_OAM,
955  AMDSMI_CARD_FORM_FACTOR_CEM,
956  AMDSMI_CARD_FORM_FACTOR_UNKNOWN
957 } amdsmi_card_form_factor_t;
958 
959 
960 typedef enum {
961  AMDSMI_METRIC_CATEGORY_ACC_COUNTER,
962  AMDSMI_METRIC_CATEGORY_FREQUENCY,
963  AMDSMI_METRIC_CATEGORY_ACTIVITY,
964  AMDSMI_METRIC_CATEGORY_TEMPERATURE,
965  AMDSMI_METRIC_CATEGORY_POWER,
966  AMDSMI_METRIC_CATEGORY_ENERGY,
967  AMDSMI_METRIC_CATEGORY_THROTTLE,
968  AMDSMI_METRIC_CATEGORY_PCIE,
969  AMDSMI_METRIC_CATEGORY_UNKNOWN
970 } amdsmi_metric_category_t;
971 
972 typedef enum {
973  AMDSMI_METRIC_NAME_METRIC_ACC_COUNTER,
974  AMDSMI_METRIC_NAME_FW_TIMESTAMP,
975  AMDSMI_METRIC_NAME_CLK_GFX,
976  AMDSMI_METRIC_NAME_CLK_SOC,
977  AMDSMI_METRIC_NAME_CLK_MEM,
978  AMDSMI_METRIC_NAME_CLK_VCLK,
979  AMDSMI_METRIC_NAME_CLK_DCLK,
980 
981  AMDSMI_METRIC_NAME_USAGE_GFX,
982  AMDSMI_METRIC_NAME_USAGE_MEM,
983  AMDSMI_METRIC_NAME_USAGE_MM,
984  AMDSMI_METRIC_NAME_USAGE_VCN,
985  AMDSMI_METRIC_NAME_USAGE_JPEG,
986 
987  AMDSMI_METRIC_NAME_VOLT_GFX,
988  AMDSMI_METRIC_NAME_VOLT_SOC,
989  AMDSMI_METRIC_NAME_VOLT_MEM,
990 
991  AMDSMI_METRIC_NAME_TEMP_HOTSPOT_CURR,
992  AMDSMI_METRIC_NAME_TEMP_HOTSPOT_LIMIT,
993  AMDSMI_METRIC_NAME_TEMP_MEM_CURR,
994  AMDSMI_METRIC_NAME_TEMP_MEM_LIMIT,
995  AMDSMI_METRIC_NAME_TEMP_VR_CURR,
996  AMDSMI_METRIC_NAME_TEMP_SHUTDOWN,
997 
998  AMDSMI_METRIC_NAME_POWER_CURR,
999  AMDSMI_METRIC_NAME_POWER_LIMIT,
1000 
1001  AMDSMI_METRIC_NAME_ENERGY_SOCKET,
1002  AMDSMI_METRIC_NAME_ENERGY_CCD,
1003  AMDSMI_METRIC_NAME_ENERGY_XCD,
1004  AMDSMI_METRIC_NAME_ENERGY_AID,
1005  AMDSMI_METRIC_NAME_ENERGY_MEM,
1006 
1007  AMDSMI_METRIC_NAME_THROTTLE_SOCKET_ACTIVE,
1008  AMDSMI_METRIC_NAME_THROTTLE_VR_ACTIVE,
1009  AMDSMI_METRIC_NAME_THROTTLE_MEM_ACTIVE,
1010 
1011  AMDSMI_METRIC_NAME_PCIE_BANDWIDTH,
1012  AMDSMI_METRIC_NAME_PCIE_L0_TO_RECOVERY_COUNT,
1013  AMDSMI_METRIC_NAME_PCIE_REPLAY_COUNT,
1014  AMDSMI_METRIC_NAME_PCIE_REPLAY_ROLLOVER_COUNT,
1015  AMDSMI_METRIC_NAME_PCIE_NAK_SENT_COUNT,
1016  AMDSMI_METRIC_NAME_PCIE_NAK_RECEIVED_COUNT,
1017 
1018  AMDSMI_METRIC_NAME_CLK_GFX_MAX_LIMIT,
1019  AMDSMI_METRIC_NAME_CLK_SOC_MAX_LIMIT,
1020  AMDSMI_METRIC_NAME_CLK_MEM_MAX_LIMIT,
1021  AMDSMI_METRIC_NAME_CLK_VCLK_MAX_LIMIT,
1022  AMDSMI_METRIC_NAME_CLK_DCLK_MAX_LIMIT,
1023 
1024  AMDSMI_METRIC_NAME_CLK_GFX_MIN_LIMIT,
1025  AMDSMI_METRIC_NAME_CLK_SOC_MIN_LIMIT,
1026  AMDSMI_METRIC_NAME_CLK_MEM_MIN_LIMIT,
1027  AMDSMI_METRIC_NAME_CLK_VCLK_MIN_LIMIT,
1028  AMDSMI_METRIC_NAME_CLK_DCLK_MIN_LIMIT,
1029 
1030  AMDSMI_METRIC_NAME_CLK_GFX_LOCKED,
1031 
1032  AMDSMI_METRIC_NAME_CLK_GFX_DS_DISABLED,
1033  AMDSMI_METRIC_NAME_CLK_MEM_DS_DISABLED,
1034  AMDSMI_METRIC_NAME_CLK_SOC_DS_DISABLED,
1035  AMDSMI_METRIC_NAME_CLK_VCLK_DS_DISABLED,
1036  AMDSMI_METRIC_NAME_CLK_DCLK_DS_DISABLED,
1037 
1038  AMDSMI_METRIC_NAME_PCIE_LINK_SPEED,
1039  AMDSMI_METRIC_NAME_PCIE_LINK_WIDTH,
1040 
1041  AMDSMI_METRIC_NAME_DRAM_BANDWIDTH,
1042  AMDSMI_METRIC_NAME_MAX_DRAM_BANDWIDTH,
1043 
1044  AMDSMI_METRIC_NAME_UNKNOWN
1045 } amdsmi_metric_name_t;
1046 
1047 typedef enum {
1048  AMDSMI_METRIC_UNIT_COUNTER,
1049  AMDSMI_METRIC_UNIT_UINT,
1050  AMDSMI_METRIC_UNIT_BOOL,
1051  AMDSMI_METRIC_UNIT_MHZ,
1052  AMDSMI_METRIC_UNIT_PERCENT,
1053  AMDSMI_METRIC_UNIT_MILLIVOLT,
1054  AMDSMI_METRIC_UNIT_CELSIUS,
1055  AMDSMI_METRIC_UNIT_WATT,
1056  AMDSMI_METRIC_UNIT_JOULE,
1057  AMDSMI_METRIC_UNIT_GBPS,
1058  AMDSMI_METRIC_UNIT_MBITPS,
1059  AMDSMI_METRIC_UNIT_PCIE_GEN,
1060  AMDSMI_METRIC_UNIT_PCIE_LANES,
1061  AMDSMI_METRIC_UNIT_UNKNOWN
1062 } amdsmi_metric_unit_t;
1063 
1064 typedef enum {
1065  AMDSMI_METRIC_TYPE_COUNTER = (1 << 0),
1066  AMDSMI_METRIC_TYPE_CHIPLET = (1 << 1),
1067  AMDSMI_METRIC_TYPE_INST = (1 << 2),
1068  AMDSMI_METRIC_TYPE_ACC = (1 << 3)
1069 } amdsmi_metric_type_t;
1070 
1075 typedef enum {
1076  AMDSMI_MEMORY_PARTITION_UNKNOWN = 0,
1077  AMDSMI_MEMORY_PARTITION_NPS1 = 1,
1079  AMDSMI_MEMORY_PARTITION_NPS2 = 2,
1082  AMDSMI_MEMORY_PARTITION_NPS4 = 4,
1085  AMDSMI_MEMORY_PARTITION_NPS8 = 8,
1090 } amdsmi_memory_partition_type_t;
1091 
1092 typedef enum {
1093  AMDSMI_ACCELERATOR_PARTITION_INVALID = 0,
1094  AMDSMI_ACCELERATOR_PARTITION_SPX,
1096  AMDSMI_ACCELERATOR_PARTITION_DPX,
1098  AMDSMI_ACCELERATOR_PARTITION_TPX,
1100  AMDSMI_ACCELERATOR_PARTITION_QPX,
1102  AMDSMI_ACCELERATOR_PARTITION_CPX,
1104  AMDSMI_ACCELERATOR_PARTITION_MAX
1105 } amdsmi_accelerator_partition_type_t;
1106 
1107 typedef enum {
1108  AMDSMI_ACCELERATOR_XCC,
1109  AMDSMI_ACCELERATOR_ENCODER,
1110  AMDSMI_ACCELERATOR_DECODER,
1111  AMDSMI_ACCELERATOR_DMA,
1112  AMDSMI_ACCELERATOR_JPEG,
1113  AMDSMI_ACCELERATOR_MAX
1114 } amdsmi_accelerator_partition_resource_type_t;
1115 
1116 typedef enum {
1117  AMDSMI_DRIVER_MODEL_TYPE_WDDM = 0,
1118  AMDSMI_DRIVER_MODEL_TYPE_WDM = 1,
1119  AMDSMI_DRIVER_MODEL_TYPE_MCDM = 2,
1120  AMDSMI_DRIVER_MODEL_TYPE__MAX = 3,
1121 } amdsmi_driver_model_type_t;
1122 
1123 typedef enum {
1124  AMDSMI_VIRTUALIZATION_MODE_UNKNOWN = 0,
1125  AMDSMI_VIRTUALIZATION_MODE_NONE,
1126  AMDSMI_VIRTUALIZATION_MODE_HOST,
1127 
1128  AMDSMI_VIRTUALIZATION_MODE_GUEST,
1129  AMDSMI_VIRTUALIZATION_MODE_PASSTHROUGH
1130 } amdsmi_virtualization_mode_t;
1131 
1136 typedef union {
1137  struct bdf_ {
1138  uint64_t function_number : 3;
1139  uint64_t device_number : 5;
1140  uint64_t bus_number : 8;
1141  uint64_t domain_number : 48;
1142  } bdf;
1143  uint64_t as_uint;
1144 } amdsmi_bdf_t;
1145 
1146 typedef struct {
1147  struct pcie_static_ {
1148  uint16_t max_pcie_width;
1149  uint32_t max_pcie_speed;
1150  uint32_t pcie_interface_version;
1151  amdsmi_card_form_factor_t slot_type;
1152  uint32_t max_pcie_interface_version;
1153  uint64_t reserved[9];
1154  } pcie_static;
1155  struct pcie_metric_ {
1156  uint16_t pcie_width;
1157  uint32_t pcie_speed;
1158  uint32_t pcie_bandwidth;
1159  uint64_t pcie_replay_count;
1160  uint64_t pcie_l0_to_recovery_count;
1161  uint64_t pcie_replay_roll_over_count;
1162  uint64_t pcie_nak_sent_count;
1163  uint64_t pcie_nak_received_count;
1164  uint32_t pcie_lc_perf_other_end_recovery_count;
1165  uint64_t reserved[12];
1166  } pcie_metric;
1167  uint64_t reserved[32];
1168 } amdsmi_pcie_info_t;
1169 
1170 
1171 typedef struct {
1172  uint64_t power_cap;
1173  uint64_t default_power_cap;
1174  uint64_t dpm_cap;
1175  uint64_t min_power_cap;
1176  uint64_t max_power_cap;
1177  uint64_t reserved[3];
1178 } amdsmi_power_cap_info_t;
1179 
1180 typedef struct {
1181  char name[AMDSMI_MAX_STRING_LENGTH];
1182  char build_date[AMDSMI_MAX_DATE_LENGTH];
1183  char part_number[AMDSMI_MAX_STRING_LENGTH];
1184  char version[AMDSMI_MAX_STRING_LENGTH];
1185  uint64_t reserved[68];
1186 } amdsmi_vbios_info_t;
1187 
1188 typedef struct {
1189  uint32_t num_cache_types;
1190  struct cache_ {
1191  uint32_t cache_properties;
1192  uint32_t cache_size; /* In KB */
1193  uint32_t cache_level;
1194  uint32_t max_num_cu_shared; /* Indicates how many Compute Units share this cache instance */
1195  uint32_t num_cache_instance; /* total number of instance of this cache type */
1196  uint32_t reserved[3];
1197  } cache[AMDSMI_MAX_CACHE_TYPES];
1198  uint32_t reserved[15];
1199 } amdsmi_gpu_cache_info_t;
1200 
1201 typedef struct {
1202  uint8_t num_fw_info;
1203  struct {
1204  amdsmi_fw_block_t fw_id;
1205  uint64_t fw_version;
1206  uint64_t reserved[2];
1207  } fw_info_list[AMDSMI_FW_ID__MAX];
1208  uint64_t reserved[7];
1209 } amdsmi_fw_info_t;
1210 
1211 typedef struct {
1212  char market_name[AMDSMI_MAX_STRING_LENGTH];
1213  char vendor_name[AMDSMI_MAX_STRING_LENGTH];
1214  char asic_serial[AMDSMI_MAX_STRING_LENGTH];
1215  uint64_t reserved[64];
1216  uint32_t vendor_id;
1217  uint32_t subvendor_id;
1218  uint64_t device_id;
1219  uint32_t rev_id;
1220  uint32_t oam_id;
1221  uint32_t num_of_compute_units; //< 0xFFFFFFFF if not supported
1222  uint64_t target_graphics_version; //< 0xFFFFFFFFFFFFFFFF if not supported
1223  uint32_t subsystem_id;
1224  uint64_t reserved_2[10];
1225 } amdsmi_asic_info_t;
1226 
1227 typedef struct {
1228  char driver_version[AMDSMI_MAX_STRING_LENGTH];
1229  char driver_date[AMDSMI_MAX_DATE_LENGTH];
1230  char driver_name[AMDSMI_MAX_STRING_LENGTH];
1231  uint64_t reserved[68];
1232 } amdsmi_driver_info_t;
1233 
1234 typedef struct {
1235  uint64_t socket_power;
1236  uint64_t gfx_voltage;
1237  uint64_t soc_voltage;
1238  uint64_t mem_voltage;
1239  uint64_t reserved[4];
1240 } amdsmi_power_info_t;
1241 
1242 typedef struct {
1243  uint32_t gfx_activity;
1244  uint32_t umc_activity;
1245  uint32_t mm_activity;
1246  uint64_t reserved[6];
1247 } amdsmi_engine_usage_t;
1248 
1249 typedef struct {
1250  uint32_t clk;
1251  uint32_t min_clk;
1252  uint32_t max_clk;
1253  uint8_t clk_locked;
1254  uint8_t clk_deep_sleep;
1255  uint64_t reserved[2];
1256 } amdsmi_clk_info_t;
1257 
1258 typedef struct {
1259  uint64_t correctable_count;
1260  uint64_t uncorrectable_count;
1261  uint64_t deferred_count;
1262  uint64_t reserved[5];
1263 } amdsmi_error_count_t;
1264 
1265 typedef struct {
1266  uint32_t ras_eeprom_version;
1267  uint32_t supported_ecc_correction_schema;
1268  uint64_t reserved[3];
1269 } amdsmi_ras_feature_t;
1270 
1271 typedef struct {
1272  uint64_t handle;
1273 } amdsmi_vf_handle_t;
1274 
1275 typedef struct {
1276  amdsmi_vf_handle_t fcn_id;
1277  uint64_t dev_id;
1278  uint64_t timestamp;
1279  uint64_t data;
1280  uint32_t category;
1281  uint32_t subcode;
1282  uint32_t level;
1283  char date[AMDSMI_MAX_DATE_LENGTH];
1284  char message[AMDSMI_EVENT_MSG_SIZE];
1285  uint64_t reserved[6];
1286 } amdsmi_event_entry_t;
1287 
1288 typedef struct {
1289  char model_number[AMDSMI_MAX_STRING_LENGTH];
1290  char product_serial[AMDSMI_MAX_STRING_LENGTH];
1291  char fru_id[AMDSMI_MAX_STRING_LENGTH];
1292  char product_name[AMDSMI_MAX_STRING_LENGTH];
1293  char manufacturer_name[AMDSMI_MAX_STRING_LENGTH];
1294  uint64_t reserved[64];
1295 } amdsmi_board_info_t;
1296 
1297 typedef struct {
1298  uint32_t total_fb_size;
1299  uint32_t pf_fb_reserved;
1300  uint32_t pf_fb_offset;
1301  uint32_t fb_alignment;
1302  uint32_t max_vf_fb_usable;
1303  uint32_t min_vf_fb_usable;
1304  uint64_t reserved[5];
1305 } amdsmi_pf_fb_info_t;
1306 
1307 typedef struct {
1308  uint32_t fb_offset;
1309  uint32_t fb_size;
1310  uint64_t reserved[3];
1311 } amdsmi_vf_fb_info_t;
1312 
1313 typedef struct {
1314  amdsmi_vf_handle_t id;
1315  amdsmi_vf_fb_info_t fb;
1316  uint64_t reserved[3];
1317 } amdsmi_partition_info_t;
1318 
1319 typedef struct {
1320  uint8_t enabled;
1321  struct {
1322  amdsmi_guard_state_t state;
1323  /* amount of monitor event after enabled */
1324  uint32_t amount;
1325  /* threshold of events in the interval(seconds) */
1326  uint64_t interval;
1327  uint32_t threshold;
1328  /* current number of events in the interval*/
1329  uint32_t active;
1330  uint32_t reserved[4];
1331  } guard[AMDSMI_GUARD_EVENT__MAX];
1332  uint32_t reserved[6];
1333 } amdsmi_guard_info_t;
1334 
1335 typedef struct {
1336  amdsmi_vf_fb_info_t fb;
1337  uint32_t gfx_timeslice;
1338  uint64_t reserved[27];
1339 } amdsmi_vf_info_t;
1340 
1341 typedef struct {
1342  uint64_t flr_count;
1343  uint64_t boot_up_time;
1344  uint64_t shutdown_time;
1345  uint64_t reset_time;
1346  amdsmi_vf_sched_state_t state;
1347  char last_boot_start[AMDSMI_MAX_DATE_LENGTH];
1348  char last_boot_end[AMDSMI_MAX_DATE_LENGTH];
1349  char last_shutdown_start[AMDSMI_MAX_DATE_LENGTH];
1350  char last_shutdown_end[AMDSMI_MAX_DATE_LENGTH];
1351  char last_reset_start[AMDSMI_MAX_DATE_LENGTH];
1352  char last_reset_end[AMDSMI_MAX_DATE_LENGTH];
1353  char current_active_time[AMDSMI_MAX_DATE_LENGTH];
1354  char current_running_time[AMDSMI_MAX_DATE_LENGTH];
1355  char total_active_time[AMDSMI_MAX_DATE_LENGTH];
1356  char total_running_time[AMDSMI_MAX_DATE_LENGTH];
1357  uint64_t reserved[11];
1358 } amdsmi_sched_info_t;
1359 
1360 typedef struct {
1361  amdsmi_sched_info_t sched;
1362  amdsmi_guard_info_t guard;
1363  uint64_t reserved[8];
1364 } amdsmi_vf_data_t;
1365 
1366 typedef struct {
1367  uint64_t total;
1368  uint64_t available;
1369  uint64_t optimal;
1370  uint64_t min_value;
1371  uint64_t max_value;
1372  uint64_t reserved[2];
1373 } amdsmi_profile_caps_info_t;
1374 
1375 typedef struct {
1376  uint8_t profile_count;
1377  uint8_t current_profile_index;
1378  struct {
1379  uint32_t vf_count;
1380  amdsmi_profile_caps_info_t profile_caps[AMDSMI_PROFILE_CAPABILITY__MAX];
1381  } profiles[AMDSMI_MAX_PROFILE_COUNT];
1382  uint32_t reserved[6];
1383 } amdsmi_profile_info_t;
1384 
1385 typedef struct {
1386  char driver_version[AMDSMI_MAX_DRIVER_INFO_RSVD];
1387  uint32_t fb_usage;
1388  uint64_t reserved[23];
1389 } amdsmi_guest_data_t;
1390 
1391 typedef struct {
1392  uint32_t dfc_fw_version;
1393  uint32_t dfc_fw_total_entries;
1394  uint32_t dfc_gart_wr_guest_min;
1395  uint32_t dfc_gart_wr_guest_max;
1396  uint32_t reserved[12];
1397 } amdsmi_dfc_fw_header_t;
1398 
1399 typedef struct {
1400  uint32_t oldest;
1401  uint32_t latest;
1402 } amdsmi_dfc_fw_white_list_t;
1403 
1404 typedef struct {
1405  uint8_t ta_uuid[AMDSMI_MAX_UUID_ELEMENTS];
1406 } amdsmi_dfc_fw_ta_uuid_t;
1407 
1408 typedef struct {
1409  uint32_t dfc_fw_type;
1410  uint32_t verification_enabled;
1411  uint32_t customer_ordinal;
1412  uint32_t reserved[13];
1413  union {
1414  amdsmi_dfc_fw_white_list_t white_list[AMDSMI_MAX_WHITE_LIST_ELEMENTS];
1415  amdsmi_dfc_fw_ta_uuid_t ta_white_list[AMDSMI_MAX_TA_WHITE_LIST_ELEMENTS];
1416  };
1417  uint32_t black_list[AMDSMI_MAX_BLACK_LIST_ELEMENTS];
1418 } amdsmi_dfc_fw_data_t;
1419 
1420 typedef struct {
1421  amdsmi_dfc_fw_header_t header;
1422  amdsmi_dfc_fw_data_t data[AMDSMI_DFC_FW_NUMBER_OF_ENTRIES];
1423 } amdsmi_dfc_fw_t;
1424 
1425 typedef struct {
1426  uint64_t retired_page;
1427  uint64_t ts;
1428  unsigned char err_type;
1429  union {
1430  unsigned char bank;
1431  unsigned char cu;
1432  };
1433  unsigned char mem_channel;
1434  unsigned char mcumc_id;
1435  uint32_t reserved[3];
1436 } amdsmi_eeprom_table_record_t;
1437 
1438 typedef struct {
1439  uint64_t timestamp;
1440  uint32_t vf_idx;
1441  uint32_t fw_id;
1442  uint16_t status;
1443  uint32_t reserved[3];
1444 } amdsmi_fw_load_error_record_t;
1445 
1446 typedef struct {
1447  uint8_t num_err_records;
1448  amdsmi_fw_load_error_record_t err_records[AMDSMI_MAX_ERR_RECORDS];
1449  uint64_t reserved[7];
1450 } amdsmi_fw_error_record_t;
1451 
1452 typedef struct {
1453  uint32_t num_links;
1454  struct links_ {
1455  amdsmi_bdf_t bdf;
1456  uint32_t bit_rate;
1457  uint32_t max_bandwidth;
1458  amdsmi_link_type_t link_type;
1459  uint64_t read;
1460  uint64_t write;
1461  uint64_t reserved[2];
1462  } links[AMDSMI_MAX_NUM_XGMI_PHYSICAL_LINK];
1463  uint64_t reserved[7];
1464 } amdsmi_link_metrics_t;
1465 
1466 typedef struct {
1467  uint64_t weight;
1468  amdsmi_link_status_t link_status;
1469  amdsmi_link_type_t link_type;
1470  uint8_t num_hops;
1471  uint8_t fb_sharing;
1472  uint32_t reserved[10];
1473 } amdsmi_link_topology_t;
1474 
1475 typedef struct {
1476  uint32_t count;
1477  amdsmi_processor_handle processor_list[AMDSMI_MAX_DEVICES];
1478  uint64_t reserved[15];
1479 } amdsmi_topology_nearest_t;
1480 
1481 typedef union {
1482  struct cap_ {
1483  uint32_t mode_custom_cap :1;
1484  uint32_t mode_1_cap :1;
1485  uint32_t mode_2_cap :1;
1486  uint32_t mode_4_cap :1;
1487  uint32_t mode_8_cap :1;
1488  uint32_t reserved :27;
1489  } cap;
1490  uint32_t xgmi_fb_sharing_cap_mask;
1491 } amdsmi_xgmi_fb_sharing_caps_t;
1492 
1493 typedef struct {
1494  amdsmi_vram_type_t vram_type;
1495  amdsmi_vram_vendor_t vram_vendor;
1496  uint32_t vram_size;
1497  uint32_t vram_bit_width;
1498  uint64_t reserved[6];
1499 } amdsmi_vram_info_t;
1500 
1501 typedef struct {
1502  amdsmi_metric_unit_t unit;
1503  amdsmi_metric_name_t name;
1504  amdsmi_metric_category_t category;
1505  uint32_t flags;
1506  uint32_t vf_mask;
1507  uint64_t val;
1508  uint32_t reserved[8];
1509 } amdsmi_metric_t;
1510 
1514 typedef struct {
1515  uint32_t major;
1516  uint32_t minor;
1517  uint32_t release;
1518 } amdsmi_version_t;
1519 
1523 typedef union {
1524  struct nps_flags_{
1525  uint32_t nps1_cap :1; // bool 1 = true; 0 = false;
1526  uint32_t nps2_cap :1; // bool 1 = true; 0 = false;
1527  uint32_t nps4_cap :1; // bool 1 = true; 0 = false;
1528  uint32_t nps8_cap :1; // bool 1 = true; 0 = false;
1529  uint32_t reserved :28; // bool 1 = true; 0 = false;
1530  } nps_flags;
1531  uint32_t nps_cap_mask;
1532 } amdsmi_nps_caps_t;
1533 
1534 typedef struct {
1535  amdsmi_nps_caps_t partition_caps;
1536  amdsmi_memory_partition_type_t mp_mode;
1537  uint32_t num_numa_ranges;
1538  struct numa_range_ {
1539  amdsmi_vram_type_t memory_type;
1540  uint64_t start;
1541  uint64_t end;
1542  } numa_range[AMDSMI_MAX_NUM_NUMA_NODES];
1543  uint64_t reserved[11];
1544 } amdsmi_memory_partition_config_t;
1545 
1546 typedef struct {
1547  amdsmi_accelerator_partition_type_t profile_type;
1548  uint32_t num_partitions;
1549  amdsmi_nps_caps_t memory_caps;
1550  uint32_t profile_index;
1551  uint32_t num_resources;
1552  uint32_t resources[AMDSMI_MAX_ACCELERATOR_PARTITIONS][AMDSMI_MAX_CP_PROFILE_RESOURCES];
1553  uint64_t reserved[13];
1554 } amdsmi_accelerator_partition_profile_t;
1555 
1556 typedef struct {
1557  uint32_t profile_index;
1558  amdsmi_accelerator_partition_resource_type_t resource_type;
1559  uint32_t partition_resource;
1560  uint32_t num_partitions_share_resource;
1561  uint64_t reserved[6];
1562 } amdsmi_accelerator_partition_resource_profile_t;
1563 
1564 typedef struct {
1565  uint32_t num_profiles;
1566  uint32_t num_resource_profiles;
1567  amdsmi_accelerator_partition_resource_profile_t resource_profiles[AMDSMI_MAX_CP_PROFILE_RESOURCES];
1568  uint32_t default_profile_index;
1569  amdsmi_accelerator_partition_profile_t profiles[AMDSMI_MAX_ACCELERATOR_PROFILE];
1570  uint64_t reserved[30];
1571 } amdsmi_accelerator_partition_profile_config_t;
1572 
1573 typedef struct {
1574  uint32_t policy_id;
1575  char policy_description[AMDSMI_MAX_NAME];
1576  uint64_t reserved[3];
1577 } amdsmi_dpm_policy_entry_t;
1578 
1579 typedef struct {
1583  uint32_t num_supported;
1584 
1588  uint32_t cur;
1589 
1594  amdsmi_dpm_policy_entry_t policies[AMDSMI_MAX_NUM_PM_POLICIES];
1595  uint64_t reserved[7];
1596 } amdsmi_dpm_policy_t;
1597 
1598 #pragma pack(push, 1)
1599 
1600 typedef struct {
1601  unsigned char b[16];
1602 } amdsmi_cper_guid_t;
1603 
1604 typedef enum {
1605  AMDSMI_CPER_SEV_NON_FATAL_UNCORRECTED = 0,
1606  AMDSMI_CPER_SEV_FATAL = 1,
1607  AMDSMI_CPER_SEV_NON_FATAL_CORRECTED = 2,
1608  AMDSMI_CPER_SEV_NUM = 3,
1609 
1610  AMDSMI_CPER_SEV_UNUSED = 10,
1611 } amdsmi_cper_sev_t;
1612 
1613 typedef struct {
1614  uint8_t seconds;
1615  uint8_t minutes;
1616  uint8_t hours;
1617  uint8_t flag;
1618  uint8_t day;
1619  uint8_t month;
1620  uint8_t year;
1621  uint8_t century;
1622 } amdsmi_cper_timestamp_t;
1623 
1624 typedef struct {
1625  char signature[4]; /* "CPER" */
1626  uint16_t revision;
1627  uint32_t signature_end; /* 0xFFFFFFFF */
1628  uint16_t sec_cnt;
1629  amdsmi_cper_sev_t error_severity;
1630  union {
1631  struct {
1632  uint32_t platform_id : 1;
1633  uint32_t timestamp : 1;
1634  uint32_t partition_id : 1;
1635  uint32_t reserved : 29;
1636  } valid_bits;
1637  uint32_t valid_mask;
1638  };
1639  uint32_t record_length; /* Total size of CPER Entry */
1640  amdsmi_cper_timestamp_t timestamp;
1641  char platform_id[16];
1642  amdsmi_cper_guid_t partition_id; /* Reserved */
1643  char creator_id[16];
1644  amdsmi_cper_guid_t notify_type; /* CMC, MCE */
1645  char record_id[8]; /* Unique CPER Entry ID */
1646  uint32_t flags; /* Reserved */
1647  uint64_t persistence_info; /* Reserved */
1648  uint8_t reserved[12]; /* Reserved */
1649 } amdsmi_cper_hdr_t;
1650 
1651 #pragma pack(pop)
1652 
1653 typedef struct {
1654  uint8_t is_iolink_coherent;
1655  uint8_t is_iolink_atomics_32bit;
1656  uint8_t is_iolink_atomics_64bit;
1657  uint8_t is_iolink_dma;
1658  uint8_t is_iolink_bi_directional;
1659  uint64_t reserved[3];
1660 } amdsmi_p2p_capability_t;
1661 
1662 /*****************************************************************************/
1685 amdsmi_status_t amdsmi_init(uint64_t init_flags);
1686 
1693 amdsmi_status_t amdsmi_shut_down(void);
1694  // end of init
1696 
1697 /*****************************************************************************/
1721 amdsmi_status_t amdsmi_get_processor_handles(amdsmi_socket_handle socket_handle, uint32_t *processor_count, amdsmi_processor_handle *processor_handles);
1722 
1738 amdsmi_status_t amdsmi_get_processor_type(amdsmi_processor_handle processor_handle,
1739  processor_type_t *processor_type);
1740 
1754 amdsmi_status_t amdsmi_get_socket_handles(uint32_t *socket_count, amdsmi_socket_handle *socket_handles);
1755 
1769 amdsmi_status_t amdsmi_get_socket_info(amdsmi_socket_handle socket_handle, size_t len, char *name);
1770 
1781 amdsmi_status_t amdsmi_get_processor_handle_from_bdf(amdsmi_bdf_t bdf, amdsmi_processor_handle *processor_handle);
1782 
1793 amdsmi_status_t amdsmi_get_index_from_processor_handle(amdsmi_processor_handle processor_handle, uint32_t *processor_index);
1794 
1805 amdsmi_status_t amdsmi_get_vf_handle_from_bdf(amdsmi_bdf_t bdf, amdsmi_vf_handle_t *vf_handle);
1806 
1816 amdsmi_status_t amdsmi_get_gpu_device_bdf(amdsmi_processor_handle processor_handle, amdsmi_bdf_t *bdf);
1817 
1828 amdsmi_status_t amdsmi_get_processor_handle_from_index(uint32_t processor_index, amdsmi_processor_handle *processor_handle);
1829 
1839 amdsmi_status_t amdsmi_get_vf_bdf(amdsmi_vf_handle_t vf_handle, amdsmi_bdf_t *bdf);
1840 
1852 amdsmi_status_t amdsmi_get_vf_handle_from_vf_index(amdsmi_processor_handle processor_handle, uint32_t fcn_idx, amdsmi_vf_handle_t *vf_handle);
1853 
1864 amdsmi_status_t amdsmi_get_vf_handle_from_uuid(const char *uuid, amdsmi_vf_handle_t *vf_handle);
1865 
1876 amdsmi_status_t amdsmi_get_processor_handle_from_uuid(const char *uuid, amdsmi_processor_handle *processor_handle);
1877 
1892 amdsmi_status_t amdsmi_get_gpu_device_uuid(amdsmi_processor_handle processor_handle, unsigned int *uuid_length, char *uuid);
1893 
1908 amdsmi_status_t amdsmi_get_vf_uuid(amdsmi_vf_handle_t processor_handle, unsigned int *uuid_length, char *uuid);
1909 
1921  amdsmi_status_t amdsmi_get_gpu_virtualization_mode(amdsmi_processor_handle processor_handle, amdsmi_virtualization_mode_t *mode); // end of discovery
1923 
1924 /*****************************************************************************/
1939 amdsmi_status_t amdsmi_get_gpu_driver_info(amdsmi_processor_handle processor_handle, amdsmi_driver_info_t *info);
1940 
1950 amdsmi_status_t amdsmi_get_gpu_driver_model(amdsmi_processor_handle processor_handle, amdsmi_driver_model_type_t *model);
1951 
1965 amdsmi_status_t amdsmi_get_lib_version(amdsmi_version_t *version); // end of swversion
1967 
1968 /*****************************************************************************/
1983 amdsmi_status_t amdsmi_get_gpu_asic_info(amdsmi_processor_handle processor_handle, amdsmi_asic_info_t *info);
1984 
1995 amdsmi_status_t amdsmi_get_gpu_vram_info(amdsmi_processor_handle processor_handle, amdsmi_vram_info_t *info);
1996 
2012 amdsmi_status_t amdsmi_get_power_cap_info(amdsmi_processor_handle processor_handle, uint32_t sensor_ind, amdsmi_power_cap_info_t *info);
2013 
2024 amdsmi_status_t amdsmi_get_pcie_info(amdsmi_processor_handle processor_handle, amdsmi_pcie_info_t *info);
2025 
2036 amdsmi_status_t amdsmi_get_fb_layout(amdsmi_processor_handle processor_handle, amdsmi_pf_fb_info_t *info);
2037  // end of asicinfo
2039 
2040 /*****************************************************************************/
2055 amdsmi_status_t amdsmi_get_gpu_vbios_info(amdsmi_processor_handle processor_handle, amdsmi_vbios_info_t *info);
2056 
2067 amdsmi_status_t amdsmi_get_gpu_board_info(amdsmi_processor_handle processor_handle, amdsmi_board_info_t *info);
2068 
2078 amdsmi_status_t amdsmi_get_fw_info(amdsmi_processor_handle processor_handle, amdsmi_fw_info_t *info);
2079 
2090 amdsmi_status_t amdsmi_get_fw_error_records(amdsmi_processor_handle processor_handle, amdsmi_fw_error_record_t *records);
2091 
2101 amdsmi_status_t amdsmi_get_dfc_fw_table(amdsmi_processor_handle processor_handle, amdsmi_dfc_fw_t *info);
2102  // end of fwinfo
2104 
2105 /*****************************************************************************/
2120 amdsmi_status_t amdsmi_get_gpu_activity(amdsmi_processor_handle processor_handle, amdsmi_engine_usage_t *info);
2121 
2137 amdsmi_status_t amdsmi_get_power_info(amdsmi_processor_handle processor_handle, uint32_t sensor_ind, amdsmi_power_info_t *info);
2138 
2158 amdsmi_status_t amdsmi_set_power_cap(amdsmi_processor_handle processor_handle, uint32_t sensor_ind, uint64_t cap);
2159 
2169 amdsmi_status_t amdsmi_is_gpu_power_management_enabled(amdsmi_processor_handle processor_handle, bool *enabled);
2170 
2188 amdsmi_status_t amdsmi_get_clock_info(amdsmi_processor_handle processor_handle, amdsmi_clk_type_t clk_type, amdsmi_clk_info_t *info);
2189 
2207 amdsmi_status_t amdsmi_get_temp_metric(amdsmi_processor_handle processor_handle, amdsmi_temperature_type_t sensor_type,
2208  amdsmi_temperature_metric_t metric, int64_t *temperature);
2209 
2220 amdsmi_status_t amdsmi_get_gpu_cache_info(amdsmi_processor_handle processor_handle, amdsmi_gpu_cache_info_t *info);
2221 
2236 amdsmi_status_t amdsmi_get_gpu_metrics(amdsmi_processor_handle processor_handle, uint32_t *metrics_size,
2237  amdsmi_metric_t *metrics);
2238 
2256 amdsmi_status_t amdsmi_get_soc_pstate(amdsmi_processor_handle processor_handle,
2257  amdsmi_dpm_policy_t *policy);
2258 
2276 amdsmi_status_t amdsmi_set_soc_pstate(amdsmi_processor_handle processor_handle,
2277  uint32_t policy_id);
2278  // end of gpumon
2280 
2281 /*****************************************************************************/
2297 amdsmi_status_t amdsmi_get_gpu_total_ecc_count(amdsmi_processor_handle processor_handle, amdsmi_error_count_t *ec);
2298 
2312 amdsmi_status_t amdsmi_get_gpu_ecc_count(amdsmi_processor_handle processor_handle, amdsmi_gpu_block_t block, amdsmi_error_count_t *ec);
2313 
2323 amdsmi_status_t amdsmi_get_gpu_ecc_enabled(amdsmi_processor_handle processor_handle, uint64_t *enabled_blocks);
2324 
2339 amdsmi_status_t amdsmi_get_gpu_bad_page_info(amdsmi_processor_handle processor_handle, uint32_t *bad_page_size,
2340  amdsmi_eeprom_table_record_t *bad_pages);
2341 
2352 amdsmi_status_t amdsmi_get_gpu_ras_feature_info(amdsmi_processor_handle processor_handle, amdsmi_ras_feature_t *ras_feature);
2353 
2354  // end of eccinfo
2356 
2357 /*****************************************************************************/
2375 amdsmi_status_t
2376 amdsmi_get_num_vf(amdsmi_processor_handle processor_handle, uint32_t *num_vf_enabled, uint32_t *num_vf_supported);
2377 
2378 
2388 amdsmi_status_t amdsmi_set_num_vf(amdsmi_processor_handle processor_handle, uint32_t num_vf);
2389 
2404 amdsmi_status_t
2405 amdsmi_get_vf_partition_info(amdsmi_processor_handle processor_handle, unsigned int vf_buffer_num,
2406  amdsmi_partition_info_t *info);
2407  // end of fbpart
2409 
2410 /*****************************************************************************/
2425 amdsmi_status_t
2426 amdsmi_get_vf_info(amdsmi_vf_handle_t vf_handle, amdsmi_vf_info_t *config);
2427 
2438 amdsmi_status_t
2439 amdsmi_get_vf_data(amdsmi_vf_handle_t vf_handle, amdsmi_vf_data_t *info);
2440  // end of vfconf
2442 
2443 /*****************************************************************************/
2479 amdsmi_status_t
2480 amdsmi_event_create(amdsmi_processor_handle *processor_list, uint32_t num_devices,
2481  uint64_t event_types, amdsmi_event_set *set);
2482 
2510 amdsmi_status_t
2511 amdsmi_event_read(amdsmi_event_set set, int64_t timeout_usec, amdsmi_event_entry_t *event);
2512 
2520 amdsmi_status_t
2521 amdsmi_event_destroy(amdsmi_event_set set);
2522  // end of eventmon
2524 
2525 /*****************************************************************************/
2543 amdsmi_status_t
2544 amdsmi_get_guest_data(amdsmi_vf_handle_t vf_handle, amdsmi_guest_data_t *info);
2545 
2557 amdsmi_status_t
2558 amdsmi_get_vf_fw_info(amdsmi_vf_handle_t vf_handle, amdsmi_fw_info_t *info);
2559 
2570 amdsmi_status_t
2571 amdsmi_get_partition_profile_info(amdsmi_processor_handle processor_handle,
2572  amdsmi_profile_info_t *profile_info);
2573  // end of hostguest
2575 
2576 /*****************************************************************************/
2591 amdsmi_status_t amdsmi_get_link_metrics(amdsmi_processor_handle processor_handle,
2592  amdsmi_link_metrics_t *link_metrics);
2593 
2606 amdsmi_status_t amdsmi_get_link_topology(amdsmi_processor_handle processor_handle_src,
2607  amdsmi_processor_handle processor_handle_dst,
2608  amdsmi_link_topology_t *topology_info);
2609 
2634 amdsmi_status_t amdsmi_get_link_topology_nearest(amdsmi_processor_handle processor_handle,
2635  amdsmi_link_type_t link_type,
2636  amdsmi_topology_nearest_t *topology_nearest_info);
2637 
2648 amdsmi_status_t amdsmi_get_xgmi_fb_sharing_caps(amdsmi_processor_handle processor_handle,
2649  amdsmi_xgmi_fb_sharing_caps_t *caps);
2650 
2665 amdsmi_status_t amdsmi_get_xgmi_fb_sharing_mode_info(amdsmi_processor_handle processor_handle_src,
2666  amdsmi_processor_handle processor_handle_dst,
2667  amdsmi_xgmi_fb_sharing_mode_t mode,
2668  uint8_t *fb_sharing);
2669 
2681 amdsmi_status_t amdsmi_set_xgmi_fb_sharing_mode(amdsmi_processor_handle processor_handle,
2682  amdsmi_xgmi_fb_sharing_mode_t mode);
2683 
2706 amdsmi_status_t amdsmi_set_xgmi_fb_sharing_mode_v2(amdsmi_processor_handle *processor_list, uint32_t num_processors,
2707  amdsmi_xgmi_fb_sharing_mode_t mode);
2708 
2709 
2734 amdsmi_status_t
2735 amdsmi_topo_get_p2p_status(amdsmi_processor_handle processor_handle_src,
2736  amdsmi_processor_handle processor_handle_dst,
2737  amdsmi_link_type_t *type, amdsmi_p2p_capability_t *cap);
2738 
2739 
2740  // end of xgmi
2742 
2743 /*****************************************************************************/
2756 amdsmi_status_t amdsmi_clear_vf_fb(amdsmi_vf_handle_t vf_handle); // end of vfmanagement
2758 
2774 amdsmi_status_t amdsmi_status_code_to_string(amdsmi_status_t status, const char **status_string);
2775 
2776 /*****************************************************************************/
2791  amdsmi_status_t
2792  amdsmi_get_gpu_memory_partition_config(amdsmi_processor_handle processor_handle,
2793  amdsmi_memory_partition_config_t *config);
2794 
2804 amdsmi_status_t
2805 amdsmi_set_gpu_memory_partition_mode(amdsmi_processor_handle processor_handle, amdsmi_memory_partition_type_t mode);
2806 
2817 amdsmi_status_t
2818 amdsmi_get_gpu_accelerator_partition_profile_config(amdsmi_processor_handle processor_handle,
2819  amdsmi_accelerator_partition_profile_config_t *profile_config);
2820 
2834 amdsmi_status_t
2835 amdsmi_get_gpu_accelerator_partition_profile(amdsmi_processor_handle processor_handle,
2836  amdsmi_accelerator_partition_profile_t *profile, uint32_t *partition_id);
2837 
2847 amdsmi_status_t
2848 amdsmi_set_gpu_accelerator_partition_profile(amdsmi_processor_handle processor_handle, uint32_t profile_index);
2849  // end of partitioning
2851 
2852 
2885 amdsmi_status_t
2886 amdsmi_get_gpu_cper_entries(amdsmi_processor_handle processor_handle, uint32_t severity_mask, char *cper_data,
2887  uint64_t *buf_size, amdsmi_cper_hdr_t** cper_hdrs, uint64_t *entry_count, uint64_t *cursor);
2888 
2912 amdsmi_status_t amdsmi_get_afids_from_cper(char *cper_buffer, uint32_t buf_size, uint64_t *afids, uint32_t *num_afids);
2913 
2914 #endif // __AMDSMI_H__
AMDSMI_MAX_DATE_LENGTH
#define AMDSMI_MAX_DATE_LENGTH
YYYY-MM-DD:HH:MM:SS.MSC.
Definition: amdsmi.h:69
amdsmi_accelerator_partition_type_t
amdsmi_accelerator_partition_type_t
Definition: amdsmi.h:1092
AMDSMI_ACCELERATOR_PARTITION_DPX
@ AMDSMI_ACCELERATOR_PARTITION_DPX
together with shared memory
Definition: amdsmi.h:1096
AMDSMI_ACCELERATOR_PARTITION_QPX
@ AMDSMI_ACCELERATOR_PARTITION_QPX
work together with shared memory
Definition: amdsmi.h:1100
AMDSMI_ACCELERATOR_PARTITION_SPX
@ AMDSMI_ACCELERATOR_PARTITION_SPX
together with shared memory
Definition: amdsmi.h:1094
AMDSMI_ACCELERATOR_PARTITION_TPX
@ AMDSMI_ACCELERATOR_PARTITION_TPX
work together with shared memory
Definition: amdsmi.h:1098
AMDSMI_ACCELERATOR_PARTITION_CPX
@ AMDSMI_ACCELERATOR_PARTITION_CPX
shared memory
Definition: amdsmi.h:1102
amdsmi_clk_type_t
amdsmi_clk_type_t
Clock types.
Definition: amdsmi.h:315
AMDSMI_CLK_TYPE_SYS
@ AMDSMI_CLK_TYPE_SYS
System clock.
Definition: amdsmi.h:316
AMDSMI_CLK_TYPE_DCEF
@ AMDSMI_CLK_TYPE_DCEF
Display Controller Engine clock.
Definition: amdsmi.h:321
AMDSMI_CLK_TYPE_DF
@ AMDSMI_CLK_TYPE_DF
running on a separate clock)
Definition: amdsmi.h:319
amdsmi_status_code_to_string
amdsmi_status_t amdsmi_status_code_to_string(amdsmi_status_t status, const char **status_string)
Get a description of a provided AMDSMI error status.
amdsmi_profile_capability_type_t
amdsmi_profile_capability_type_t
Definition: amdsmi.h:882
AMDSMI_PROFILE_CAPABILITY_DECODE
@ AMDSMI_PROFILE_CAPABILITY_DECODE
decode engine
Definition: amdsmi.h:885
AMDSMI_PROFILE_CAPABILITY_MEMORY
@ AMDSMI_PROFILE_CAPABILITY_MEMORY
memory
Definition: amdsmi.h:883
AMDSMI_PROFILE_CAPABILITY_ENCODE
@ AMDSMI_PROFILE_CAPABILITY_ENCODE
encode engine
Definition: amdsmi.h:884
AMDSMI_PROFILE_CAPABILITY_COMPUTE
@ AMDSMI_PROFILE_CAPABILITY_COMPUTE
compute engine
Definition: amdsmi.h:886
amdsmi_init_flags_t
amdsmi_init_flags_t
Initialization flags.
Definition: amdsmi.h:43
AMDSMI_INIT_ALL_PROCESSORS
@ AMDSMI_INIT_ALL_PROCESSORS
Initialize all processors.
Definition: amdsmi.h:44
amdsmi_metric_type_t
amdsmi_metric_type_t
Definition: amdsmi.h:1064
AMDSMI_METRIC_TYPE_COUNTER
@ AMDSMI_METRIC_TYPE_COUNTER
counter metric
Definition: amdsmi.h:1065
AMDSMI_METRIC_TYPE_CHIPLET
@ AMDSMI_METRIC_TYPE_CHIPLET
chiplet metric
Definition: amdsmi.h:1066
AMDSMI_METRIC_TYPE_ACC
@ AMDSMI_METRIC_TYPE_ACC
accumulated metric
Definition: amdsmi.h:1068
AMDSMI_METRIC_TYPE_INST
@ AMDSMI_METRIC_TYPE_INST
instantaneous metric
Definition: amdsmi.h:1067
amdsmi_fw_block_t
amdsmi_fw_block_t
Definition: amdsmi.h:218
AMDSMI_FW_ID_RLX6
@ AMDSMI_FW_ID_RLX6
FW_ID_MES_THREAD1_STACK = MES_KIQ_STACK.
Definition: amdsmi.h:269
AMDSMI_FW_ID_DMCU_ISR
@ AMDSMI_FW_ID_DMCU_ISR
ISR.
Definition: amdsmi.h:242
AMDSMI_FW_ID_MES_THREAD1
@ AMDSMI_FW_ID_MES_THREAD1
FW_ID_MES_THREAD1 = CP_MES_KIQ.
Definition: amdsmi.h:267
AMDSMI_FW_ID_DMCU_ERAM
@ AMDSMI_FW_ID_DMCU_ERAM
eRAM
Definition: amdsmi.h:241
amdsmi_mm_ip_t
amdsmi_mm_ip_t
GPU Capability info.
Definition: amdsmi.h:305
amdsmi_guest_fw_engine_id_t
amdsmi_guest_fw_engine_id_t
The values of this enum are used to identify the various firmware blocks.
Definition: amdsmi.h:767
amdsmi_ecc_correction_schema_support_t
amdsmi_ecc_correction_schema_support_t
The values of this enum are used to identify supported ecc correction schema.
Definition: amdsmi.h:756
amdsmi_memory_partition_type_t
amdsmi_memory_partition_type_t
Memory Partitions. This enum is used to identify various memory partition types.
Definition: amdsmi.h:1075
AMDSMI_MEMORY_PARTITION_NPS8
@ AMDSMI_MEMORY_PARTITION_NPS8
Definition: amdsmi.h:1085
AMDSMI_MEMORY_PARTITION_NPS1
@ AMDSMI_MEMORY_PARTITION_NPS1
across all 8 HBM stacks (all stacks/1).
Definition: amdsmi.h:1077
AMDSMI_MEMORY_PARTITION_NPS2
@ AMDSMI_MEMORY_PARTITION_NPS2
Definition: amdsmi.h:1079
AMDSMI_MEMORY_PARTITION_NPS4
@ AMDSMI_MEMORY_PARTITION_NPS4
Definition: amdsmi.h:1082
amdsmi_event_gpu_t
amdsmi_event_gpu_t
Below are the error subcodes of each category.
Definition: amdsmi.h:422
amdsmi_cache_property_type_t
amdsmi_cache_property_type_t
cache properties
Definition: amdsmi.h:210
amdsmi_get_afids_from_cper
amdsmi_status_t amdsmi_get_afids_from_cper(char *cper_buffer, uint32_t buf_size, uint64_t *afids, uint32_t *num_afids)
Get the AFIDs from CPER buffer.
AMDSMI_MAX_DEVICES
#define AMDSMI_MAX_DEVICES
Maximum size definitions AMDSMI.
Definition: amdsmi.h:55
AMDSMI_EVENT_MSG_SIZE
#define AMDSMI_EVENT_MSG_SIZE
256 BYTES
Definition: amdsmi.h:83
amdsmi_status_t
amdsmi_status_t
ENUMERATORS.
Definition: amdsmi.h:154
AMDSMI_STATUS_NOT_INIT
@ AMDSMI_STATUS_NOT_INIT
Processor not initialized.
Definition: amdsmi.h:180
AMDSMI_STATUS_NON_AMD_CPU
@ AMDSMI_STATUS_NON_AMD_CPU
System has different cpu than AMD.
Definition: amdsmi.h:189
AMDSMI_STATUS_INVAL
@ AMDSMI_STATUS_INVAL
Invalid parameters.
Definition: amdsmi.h:157
AMDSMI_STATUS_BUSY
@ AMDSMI_STATUS_BUSY
Processor busy.
Definition: amdsmi.h:178
AMDSMI_STATUS_UNKNOWN_ERROR
@ AMDSMI_STATUS_UNKNOWN_ERROR
An unknown error occurred.
Definition: amdsmi.h:204
AMDSMI_STATUS_DRIVER_NOT_LOADED
@ AMDSMI_STATUS_DRIVER_NOT_LOADED
Processor driver not loaded.
Definition: amdsmi.h:182
AMDSMI_STATUS_FILE_ERROR
@ AMDSMI_STATUS_FILE_ERROR
Problem accessing a file.
Definition: amdsmi.h:170
AMDSMI_STATUS_DRM_ERROR
@ AMDSMI_STATUS_DRM_ERROR
Error when call libdrm.
Definition: amdsmi.h:162
AMDSMI_STATUS_ARG_PTR_NULL
@ AMDSMI_STATUS_ARG_PTR_NULL
Parsed argument is invalid.
Definition: amdsmi.h:198
AMDSMI_STATUS_IO
@ AMDSMI_STATUS_IO
I/O Error.
Definition: amdsmi.h:168
AMDSMI_STATUS_NO_HSMP_DRV
@ AMDSMI_STATUS_NO_HSMP_DRV
HSMP driver not found.
Definition: amdsmi.h:192
AMDSMI_STATUS_HSMP_TIMEOUT
@ AMDSMI_STATUS_HSMP_TIMEOUT
HSMP message is timedout.
Definition: amdsmi.h:195
AMDSMI_STATUS_NO_DATA
@ AMDSMI_STATUS_NO_DATA
No data was found for a given input.
Definition: amdsmi.h:184
AMDSMI_STATUS_RETRY
@ AMDSMI_STATUS_RETRY
Retry operation.
Definition: amdsmi.h:165
AMDSMI_STATUS_UNEXPECTED_SIZE
@ AMDSMI_STATUS_UNEXPECTED_SIZE
An unexpected amount of data was read.
Definition: amdsmi.h:186
AMDSMI_STATUS_SETTING_UNAVAILABLE
@ AMDSMI_STATUS_SETTING_UNAVAILABLE
Setting is not available.
Definition: amdsmi.h:200
AMDSMI_STATUS_FILE_NOT_FOUND
@ AMDSMI_STATUS_FILE_NOT_FOUND
file or directory not found
Definition: amdsmi.h:197
AMDSMI_STATUS_INTERNAL_EXCEPTION
@ AMDSMI_STATUS_INTERNAL_EXCEPTION
An internal exception was caught.
Definition: amdsmi.h:172
AMDSMI_STATUS_NO_HSMP_SUP
@ AMDSMI_STATUS_NO_HSMP_SUP
HSMP not supported.
Definition: amdsmi.h:193
AMDSMI_STATUS_MAP_ERROR
@ AMDSMI_STATUS_MAP_ERROR
The internal library error did not map to a status code.
Definition: amdsmi.h:203
AMDSMI_STATUS_FAIL_LOAD_SYMBOL
@ AMDSMI_STATUS_FAIL_LOAD_SYMBOL
Fail to load symbol.
Definition: amdsmi.h:161
AMDSMI_STATUS_INSUFFICIENT_SIZE
@ AMDSMI_STATUS_INSUFFICIENT_SIZE
Not enough resources were available for the operation.
Definition: amdsmi.h:185
AMDSMI_STATUS_INIT_ERROR
@ AMDSMI_STATUS_INIT_ERROR
An error occurred when initializing internal data structures.
Definition: amdsmi.h:174
AMDSMI_STATUS_OUT_OF_RESOURCES
@ AMDSMI_STATUS_OUT_OF_RESOURCES
Not enough memory.
Definition: amdsmi.h:171
AMDSMI_STATUS_NO_SLOT
@ AMDSMI_STATUS_NO_SLOT
No more free slot.
Definition: amdsmi.h:181
AMDSMI_STATUS_NO_MSR_DRV
@ AMDSMI_STATUS_NO_MSR_DRV
MSR driver not found.
Definition: amdsmi.h:191
AMDSMI_STATUS_INTERRUPT
@ AMDSMI_STATUS_INTERRUPT
An interrupt occurred during execution of function.
Definition: amdsmi.h:167
AMDSMI_STATUS_SUCCESS
@ AMDSMI_STATUS_SUCCESS
Call succeeded.
Definition: amdsmi.h:155
AMDSMI_STATUS_NO_ENERGY_DRV
@ AMDSMI_STATUS_NO_ENERGY_DRV
Energy driver not found.
Definition: amdsmi.h:190
AMDSMI_STATUS_ADDRESS_FAULT
@ AMDSMI_STATUS_ADDRESS_FAULT
Bad address.
Definition: amdsmi.h:169
AMDSMI_STATUS_NOT_YET_IMPLEMENTED
@ AMDSMI_STATUS_NOT_YET_IMPLEMENTED
Not implemented yet.
Definition: amdsmi.h:159
AMDSMI_STATUS_NO_DRV
@ AMDSMI_STATUS_NO_DRV
No Energy and HSMP driver present.
Definition: amdsmi.h:196
AMDSMI_STATUS_NO_PERM
@ AMDSMI_STATUS_NO_PERM
Permission Denied.
Definition: amdsmi.h:166
AMDSMI_STATUS_NOT_FOUND
@ AMDSMI_STATUS_NOT_FOUND
Processor not found.
Definition: amdsmi.h:179
AMDSMI_STATUS_FAIL_LOAD_MODULE
@ AMDSMI_STATUS_FAIL_LOAD_MODULE
Fail to load lib.
Definition: amdsmi.h:160
AMDSMI_STATUS_AMDGPU_RESTART_ERR
@ AMDSMI_STATUS_AMDGPU_RESTART_ERR
AMDGPU restart failed.
Definition: amdsmi.h:199
AMDSMI_STATUS_NOT_SUPPORTED
@ AMDSMI_STATUS_NOT_SUPPORTED
Command not supported.
Definition: amdsmi.h:158
AMDSMI_STATUS_UNEXPECTED_DATA
@ AMDSMI_STATUS_UNEXPECTED_DATA
The data read or provided to function is not what was expected.
Definition: amdsmi.h:187
AMDSMI_STATUS_API_FAILED
@ AMDSMI_STATUS_API_FAILED
API call failed.
Definition: amdsmi.h:163
AMDSMI_STATUS_TIMEOUT
@ AMDSMI_STATUS_TIMEOUT
Timeout in API call.
Definition: amdsmi.h:164
AMDSMI_STATUS_NO_HSMP_MSG_SUP
@ AMDSMI_STATUS_NO_HSMP_MSG_SUP
HSMP message/feature not supported.
Definition: amdsmi.h:194
AMDSMI_STATUS_INPUT_OUT_OF_BOUNDS
@ AMDSMI_STATUS_INPUT_OUT_OF_BOUNDS
The provided input is out of allowable or safe range.
Definition: amdsmi.h:173
AMDSMI_STATUS_REFCOUNT_OVERFLOW
@ AMDSMI_STATUS_REFCOUNT_OVERFLOW
An internal reference counter exceeded INT32_MAX.
Definition: amdsmi.h:175
amdsmi_temperature_metric_t
amdsmi_temperature_metric_t
Temperature Metrics. This enum is used to identify various temperature metrics. Corresponding values ...
Definition: amdsmi.h:352
AMDSMI_TEMP_CRITICAL_HYST
@ AMDSMI_TEMP_CRITICAL_HYST
Definition: amdsmi.h:365
AMDSMI_TEMP_CRITICAL
@ AMDSMI_TEMP_CRITICAL
greater than corresponding temp_max values.
Definition: amdsmi.h:363
AMDSMI_TEMP_OFFSET
@ AMDSMI_TEMP_OFFSET
Definition: amdsmi.h:381
AMDSMI_TEMP_EMERGENCY
@ AMDSMI_TEMP_EMERGENCY
Definition: amdsmi.h:368
AMDSMI_TEMP_LOWEST
@ AMDSMI_TEMP_LOWEST
temperature reading by the chip.
Definition: amdsmi.h:383
AMDSMI_TEMP_CRIT_MIN
@ AMDSMI_TEMP_CRIT_MIN
Definition: amdsmi.h:375
AMDSMI_TEMP_SHUTDOWN
@ AMDSMI_TEMP_SHUTDOWN
Shutdown temperature.
Definition: amdsmi.h:385
AMDSMI_TEMP_EMERGENCY_HYST
@ AMDSMI_TEMP_EMERGENCY_HYST
Definition: amdsmi.h:372
AMDSMI_TEMP_CURRENT
@ AMDSMI_TEMP_CURRENT
Temperature current value.
Definition: amdsmi.h:353
AMDSMI_TEMP_MIN
@ AMDSMI_TEMP_MIN
Temperature min value.
Definition: amdsmi.h:356
AMDSMI_TEMP_HIGHEST
@ AMDSMI_TEMP_HIGHEST
Historical maximum temperature.
Definition: amdsmi.h:384
AMDSMI_TEMP_CRIT_MIN_HYST
@ AMDSMI_TEMP_CRIT_MIN_HYST
Definition: amdsmi.h:378
AMDSMI_TEMP_MIN_HYST
@ AMDSMI_TEMP_MIN_HYST
Definition: amdsmi.h:360
AMDSMI_TEMP_MAX_HYST
@ AMDSMI_TEMP_MAX_HYST
Definition: amdsmi.h:357
AMDSMI_TEMP_MAX
@ AMDSMI_TEMP_MAX
Temperature max value.
Definition: amdsmi.h:355
amdsmi_gpu_block_t
amdsmi_gpu_block_t
Definition: amdsmi.h:925
AMDSMI_GPU_BLOCK_XGMI_WAFL
@ AMDSMI_GPU_BLOCK_XGMI_WAFL
XGMI block.
Definition: amdsmi.h:937
AMDSMI_GPU_BLOCK_GFX
@ AMDSMI_GPU_BLOCK_GFX
GFX block.
Definition: amdsmi.h:932
AMDSMI_GPU_BLOCK_IH
@ AMDSMI_GPU_BLOCK_IH
IH block.
Definition: amdsmi.h:947
AMDSMI_GPU_BLOCK_VCN
@ AMDSMI_GPU_BLOCK_VCN
VCN block.
Definition: amdsmi.h:945
AMDSMI_GPU_BLOCK_INVALID
@ AMDSMI_GPU_BLOCK_INVALID
invalid block
Definition: amdsmi.h:926
AMDSMI_GPU_BLOCK_MP0
@ AMDSMI_GPU_BLOCK_MP0
MP0 block.
Definition: amdsmi.h:941
AMDSMI_GPU_BLOCK_HDP
@ AMDSMI_GPU_BLOCK_HDP
HDP block.
Definition: amdsmi.h:936
AMDSMI_GPU_BLOCK_MPIO
@ AMDSMI_GPU_BLOCK_MPIO
MPIO block.
Definition: amdsmi.h:948
AMDSMI_GPU_BLOCK_ATHUB
@ AMDSMI_GPU_BLOCK_ATHUB
ATHUB block.
Definition: amdsmi.h:934
AMDSMI_GPU_BLOCK_MP1
@ AMDSMI_GPU_BLOCK_MP1
MP1 block.
Definition: amdsmi.h:942
AMDSMI_GPU_BLOCK_PCIE_BIF
@ AMDSMI_GPU_BLOCK_PCIE_BIF
PCIE_BIF block.
Definition: amdsmi.h:935
AMDSMI_GPU_BLOCK_SDMA
@ AMDSMI_GPU_BLOCK_SDMA
SDMA block.
Definition: amdsmi.h:931
AMDSMI_GPU_BLOCK_JPEG
@ AMDSMI_GPU_BLOCK_JPEG
JPEG block.
Definition: amdsmi.h:946
AMDSMI_GPU_BLOCK_UMC
@ AMDSMI_GPU_BLOCK_UMC
UMC block.
Definition: amdsmi.h:930
AMDSMI_GPU_BLOCK_FUSE
@ AMDSMI_GPU_BLOCK_FUSE
Fuse block.
Definition: amdsmi.h:943
AMDSMI_GPU_BLOCK_DF
@ AMDSMI_GPU_BLOCK_DF
DF block.
Definition: amdsmi.h:938
AMDSMI_GPU_BLOCK_MMHUB
@ AMDSMI_GPU_BLOCK_MMHUB
MMHUB block.
Definition: amdsmi.h:933
AMDSMI_GPU_BLOCK_SMN
@ AMDSMI_GPU_BLOCK_SMN
SMN block.
Definition: amdsmi.h:939
AMDSMI_GPU_BLOCK_SEM
@ AMDSMI_GPU_BLOCK_SEM
SEM block.
Definition: amdsmi.h:940
AMDSMI_GPU_BLOCK_MCA
@ AMDSMI_GPU_BLOCK_MCA
MCA block.
Definition: amdsmi.h:944
amdsmi_get_gpu_cper_entries
amdsmi_status_t amdsmi_get_gpu_cper_entries(amdsmi_processor_handle processor_handle, uint32_t severity_mask, char *cper_data, uint64_t *buf_size, amdsmi_cper_hdr_t **cper_hdrs, uint64_t *entry_count, uint64_t *cursor)
Retrieve CPER entries cached in the driver.
amdsmi_temperature_type_t
amdsmi_temperature_type_t
This enumeration is used to indicate from which part of the processor a temperature reading should be...
Definition: amdsmi.h:335
amdsmi_socket_handle
void * amdsmi_socket_handle
opaque handler point to underlying implementation
Definition: amdsmi.h:147
amdsmi_set_gpu_accelerator_partition_profile
amdsmi_status_t amdsmi_set_gpu_accelerator_partition_profile(amdsmi_processor_handle processor_handle, uint32_t profile_index)
Sets accelerator partition setting based on profile_index from amdsmi_get_gpu_accelerator_partition_p...
amdsmi_get_gpu_memory_partition_config
amdsmi_status_t amdsmi_get_gpu_memory_partition_config(amdsmi_processor_handle processor_handle, amdsmi_memory_partition_config_t *config)
Returns current gpu memory partition config and mode capabilities.
amdsmi_get_gpu_accelerator_partition_profile_config
amdsmi_status_t amdsmi_get_gpu_accelerator_partition_profile_config(amdsmi_processor_handle processor_handle, amdsmi_accelerator_partition_profile_config_t *profile_config)
Returns gpu accelerator partition caps as currently configured in the system.
amdsmi_set_gpu_memory_partition_mode
amdsmi_status_t amdsmi_set_gpu_memory_partition_mode(amdsmi_processor_handle processor_handle, amdsmi_memory_partition_type_t mode)
Sets memory partition mode.
amdsmi_get_gpu_accelerator_partition_profile
amdsmi_status_t amdsmi_get_gpu_accelerator_partition_profile(amdsmi_processor_handle processor_handle, amdsmi_accelerator_partition_profile_t *profile, uint32_t *partition_id)
Returns current gpu accelerator partition cap.
amdsmi_get_fb_layout
amdsmi_status_t amdsmi_get_fb_layout(amdsmi_processor_handle processor_handle, amdsmi_pf_fb_info_t *info)
Returns the framebuffer info for the ASIC.
amdsmi_get_power_cap_info
amdsmi_status_t amdsmi_get_power_cap_info(amdsmi_processor_handle processor_handle, uint32_t sensor_ind, amdsmi_power_cap_info_t *info)
Returns the power caps as currently configured in the system.
amdsmi_get_pcie_info
amdsmi_status_t amdsmi_get_pcie_info(amdsmi_processor_handle processor_handle, amdsmi_pcie_info_t *info)
Returns the PCIe info for the GPU.
amdsmi_get_gpu_vram_info
amdsmi_status_t amdsmi_get_gpu_vram_info(amdsmi_processor_handle processor_handle, amdsmi_vram_info_t *info)
Returns vram info.
amdsmi_get_gpu_asic_info
amdsmi_status_t amdsmi_get_gpu_asic_info(amdsmi_processor_handle processor_handle, amdsmi_asic_info_t *info)
Returns the ASIC information for the processor.
amdsmi_get_processor_handles
amdsmi_status_t amdsmi_get_processor_handles(amdsmi_socket_handle socket_handle, uint32_t *processor_count, amdsmi_processor_handle *processor_handles)
Returns a list of AMD GPU devices in the system.
amdsmi_get_index_from_processor_handle
amdsmi_status_t amdsmi_get_index_from_processor_handle(amdsmi_processor_handle processor_handle, uint32_t *processor_index)
Returns the index of the given processor handle.
amdsmi_get_gpu_device_uuid
amdsmi_status_t amdsmi_get_gpu_device_uuid(amdsmi_processor_handle processor_handle, unsigned int *uuid_length, char *uuid)
Returns the UUID of the processor.
amdsmi_get_processor_type
amdsmi_status_t amdsmi_get_processor_type(amdsmi_processor_handle processor_handle, processor_type_t *processor_type)
Get the processor type.
amdsmi_get_socket_info
amdsmi_status_t amdsmi_get_socket_info(amdsmi_socket_handle socket_handle, size_t len, char *name)
Returns socket information about given socket handle NOT SUPPORTED YET, CURRENTLY HARDCODED TO RETURN...
amdsmi_get_gpu_virtualization_mode
amdsmi_status_t amdsmi_get_gpu_virtualization_mode(amdsmi_processor_handle processor_handle, amdsmi_virtualization_mode_t *mode)
Returns the virtualization mode for the target device.
amdsmi_get_processor_handle_from_uuid
amdsmi_status_t amdsmi_get_processor_handle_from_uuid(const char *uuid, amdsmi_processor_handle *processor_handle)
Returns the processor handle from the given UUID.
amdsmi_get_socket_handles
amdsmi_status_t amdsmi_get_socket_handles(uint32_t *socket_count, amdsmi_socket_handle *socket_handles)
Returns a list of socket handles in the system. NOT SUPPORTED YET, CURRENTLY HARDCODED TO RETURN EMPT...
amdsmi_get_vf_bdf
amdsmi_status_t amdsmi_get_vf_bdf(amdsmi_vf_handle_t vf_handle, amdsmi_bdf_t *bdf)
Returns BDF of the given device (VF).
amdsmi_get_vf_handle_from_bdf
amdsmi_status_t amdsmi_get_vf_handle_from_bdf(amdsmi_bdf_t bdf, amdsmi_vf_handle_t *vf_handle)
Returns VF handle from the given BDF.
amdsmi_get_processor_handle_from_bdf
amdsmi_status_t amdsmi_get_processor_handle_from_bdf(amdsmi_bdf_t bdf, amdsmi_processor_handle *processor_handle)
Returns processor handle (PF) from the given BDF.
amdsmi_get_vf_handle_from_vf_index
amdsmi_status_t amdsmi_get_vf_handle_from_vf_index(amdsmi_processor_handle processor_handle, uint32_t fcn_idx, amdsmi_vf_handle_t *vf_handle)
Returns the handle of a virtual function given its index.
amdsmi_get_vf_uuid
amdsmi_status_t amdsmi_get_vf_uuid(amdsmi_vf_handle_t processor_handle, unsigned int *uuid_length, char *uuid)
Returns the UUID of the VF.
amdsmi_get_gpu_device_bdf
amdsmi_status_t amdsmi_get_gpu_device_bdf(amdsmi_processor_handle processor_handle, amdsmi_bdf_t *bdf)
Returns BDF of the given processor (PF or VF).
amdsmi_get_vf_handle_from_uuid
amdsmi_status_t amdsmi_get_vf_handle_from_uuid(const char *uuid, amdsmi_vf_handle_t *vf_handle)
Returns the handle of a virtual function from the given UUID.
amdsmi_get_processor_handle_from_index
amdsmi_status_t amdsmi_get_processor_handle_from_index(uint32_t processor_index, amdsmi_processor_handle *processor_handle)
Returns the processor handle from the given processor index.
amdsmi_get_gpu_total_ecc_count
amdsmi_status_t amdsmi_get_gpu_total_ecc_count(amdsmi_processor_handle processor_handle, amdsmi_error_count_t *ec)
Returns the number of ECC errors (correctable, uncorrectable and deferred) in the given GPU.
amdsmi_get_gpu_ecc_count
amdsmi_status_t amdsmi_get_gpu_ecc_count(amdsmi_processor_handle processor_handle, amdsmi_gpu_block_t block, amdsmi_error_count_t *ec)
Returns the number of ECC errors (correctable, uncorrectable and deferred) for the given GPU block.
amdsmi_get_gpu_ecc_enabled
amdsmi_status_t amdsmi_get_gpu_ecc_enabled(amdsmi_processor_handle processor_handle, uint64_t *enabled_blocks)
Returns the enabled ECC bitmask.
amdsmi_get_gpu_ras_feature_info
amdsmi_status_t amdsmi_get_gpu_ras_feature_info(amdsmi_processor_handle processor_handle, amdsmi_ras_feature_t *ras_feature)
Returns RAS features info.
amdsmi_get_gpu_bad_page_info
amdsmi_status_t amdsmi_get_gpu_bad_page_info(amdsmi_processor_handle processor_handle, uint32_t *bad_page_size, amdsmi_eeprom_table_record_t *bad_pages)
Returns the bad page info.
amdsmi_event_destroy
amdsmi_status_t amdsmi_event_destroy(amdsmi_event_set set)
Destroys and frees an event set.
amdsmi_event_read
amdsmi_status_t amdsmi_event_read(amdsmi_event_set set, int64_t timeout_usec, amdsmi_event_entry_t *event)
The call blocks till timeout is expired to copy one event specified by the event set into the user pr...
amdsmi_event_create
amdsmi_status_t amdsmi_event_create(amdsmi_processor_handle *processor_list, uint32_t num_devices, uint64_t event_types, amdsmi_event_set *set)
Allocate a new event set notifier to monitor different types of issues with the GPU running virtualiz...
amdsmi_get_vf_partition_info
amdsmi_status_t amdsmi_get_vf_partition_info(amdsmi_processor_handle processor_handle, unsigned int vf_buffer_num, amdsmi_partition_info_t *info)
Returns the current framebuffer partitioning structure as currently configured by the driver.
amdsmi_get_num_vf
amdsmi_status_t amdsmi_get_num_vf(amdsmi_processor_handle processor_handle, uint32_t *num_vf_enabled, uint32_t *num_vf_supported)
Returns the number of VFs enabled by gpuv in the ASIC.
amdsmi_set_num_vf
amdsmi_status_t amdsmi_set_num_vf(amdsmi_processor_handle processor_handle, uint32_t num_vf)
Enable a given number of VF.
amdsmi_get_gpu_vbios_info
amdsmi_status_t amdsmi_get_gpu_vbios_info(amdsmi_processor_handle processor_handle, amdsmi_vbios_info_t *info)
Returns the static information for the vBIOS on the processor.
amdsmi_get_fw_info
amdsmi_status_t amdsmi_get_fw_info(amdsmi_processor_handle processor_handle, amdsmi_fw_info_t *info)
Returns the firmware versions running on PF of the processor.
amdsmi_get_gpu_board_info
amdsmi_status_t amdsmi_get_gpu_board_info(amdsmi_processor_handle processor_handle, amdsmi_board_info_t *info)
Returns the board part number and board information for the requested processor.
amdsmi_get_dfc_fw_table
amdsmi_status_t amdsmi_get_dfc_fw_table(amdsmi_processor_handle processor_handle, amdsmi_dfc_fw_t *info)
Returns the DFC fw table.
amdsmi_get_fw_error_records
amdsmi_status_t amdsmi_get_fw_error_records(amdsmi_processor_handle processor_handle, amdsmi_fw_error_record_t *records)
Gets firmware error records.
amdsmi_get_gpu_metrics
amdsmi_status_t amdsmi_get_gpu_metrics(amdsmi_processor_handle processor_handle, uint32_t *metrics_size, amdsmi_metric_t *metrics)
Returns metrics information.
amdsmi_get_power_info
amdsmi_status_t amdsmi_get_power_info(amdsmi_processor_handle processor_handle, uint32_t sensor_ind, amdsmi_power_info_t *info)
Returns the current power and voltage of the GPU.
amdsmi_get_temp_metric
amdsmi_status_t amdsmi_get_temp_metric(amdsmi_processor_handle processor_handle, amdsmi_temperature_type_t sensor_type, amdsmi_temperature_metric_t metric, int64_t *temperature)
Returns temperature measurements of the GPU. The results are in °C.
amdsmi_get_gpu_activity
amdsmi_status_t amdsmi_get_gpu_activity(amdsmi_processor_handle processor_handle, amdsmi_engine_usage_t *info)
Returns the current usage of the GPU engines (GFX, MM and MEM). Each usage is reported as a percentag...
amdsmi_get_clock_info
amdsmi_status_t amdsmi_get_clock_info(amdsmi_processor_handle processor_handle, amdsmi_clk_type_t clk_type, amdsmi_clk_info_t *info)
Returns the measurements of the clocks in the GPU for the GFX and multimedia engines and Memory....
amdsmi_set_power_cap
amdsmi_status_t amdsmi_set_power_cap(amdsmi_processor_handle processor_handle, uint32_t sensor_ind, uint64_t cap)
Sets GPU power cap.
amdsmi_get_soc_pstate
amdsmi_status_t amdsmi_get_soc_pstate(amdsmi_processor_handle processor_handle, amdsmi_dpm_policy_t *policy)
Returns the soc pstate policy for the processor.
amdsmi_set_soc_pstate
amdsmi_status_t amdsmi_set_soc_pstate(amdsmi_processor_handle processor_handle, uint32_t policy_id)
Set the soc pstate policy for the processor.
amdsmi_get_gpu_cache_info
amdsmi_status_t amdsmi_get_gpu_cache_info(amdsmi_processor_handle processor_handle, amdsmi_gpu_cache_info_t *info)
Returns gpu cache info.
amdsmi_is_gpu_power_management_enabled
amdsmi_status_t amdsmi_is_gpu_power_management_enabled(amdsmi_processor_handle processor_handle, bool *enabled)
Returns is power management enabled.
amdsmi_get_guest_data
amdsmi_status_t amdsmi_get_guest_data(amdsmi_vf_handle_t vf_handle, amdsmi_guest_data_t *info)
Returns guest OS information of the queried VF. The fw_info field from the amdsmi_guest_data structur...
amdsmi_get_partition_profile_info
amdsmi_status_t amdsmi_get_partition_profile_info(amdsmi_processor_handle processor_handle, amdsmi_profile_info_t *profile_info)
Return the list of supported profiles on the given GPU device.
amdsmi_get_vf_fw_info
amdsmi_status_t amdsmi_get_vf_fw_info(amdsmi_vf_handle_t vf_handle, amdsmi_fw_info_t *info)
Returns the firmware versions running on a VF. In case the VM is not started on the VF,...
amdsmi_shut_down
amdsmi_status_t amdsmi_shut_down(void)
The library frees all associated with the library on the current process.
amdsmi_init
amdsmi_status_t amdsmi_init(uint64_t init_flags)
Initializes the library and the internal software structures.
amdsmi_get_xgmi_fb_sharing_caps
amdsmi_status_t amdsmi_get_xgmi_fb_sharing_caps(amdsmi_processor_handle processor_handle, amdsmi_xgmi_fb_sharing_caps_t *caps)
Return XGMI capabilities.
amdsmi_set_xgmi_fb_sharing_mode_v2
amdsmi_status_t amdsmi_set_xgmi_fb_sharing_mode_v2(amdsmi_processor_handle *processor_list, uint32_t num_processors, amdsmi_xgmi_fb_sharing_mode_t mode)
Set XGMI framebuffer custom sharing mode.
amdsmi_get_xgmi_fb_sharing_mode_info
amdsmi_status_t amdsmi_get_xgmi_fb_sharing_mode_info(amdsmi_processor_handle processor_handle_src, amdsmi_processor_handle processor_handle_dst, amdsmi_xgmi_fb_sharing_mode_t mode, uint8_t *fb_sharing)
Return XGMI framebuffer sharing information between two GPUs.
amdsmi_get_link_topology
amdsmi_status_t amdsmi_get_link_topology(amdsmi_processor_handle processor_handle_src, amdsmi_processor_handle processor_handle_dst, amdsmi_link_topology_t *topology_info)
Return link topology information between two connected processors.
amdsmi_get_link_metrics
amdsmi_status_t amdsmi_get_link_metrics(amdsmi_processor_handle processor_handle, amdsmi_link_metrics_t *link_metrics)
Return link metric information.
amdsmi_topo_get_p2p_status
amdsmi_status_t amdsmi_topo_get_p2p_status(amdsmi_processor_handle processor_handle_src, amdsmi_processor_handle processor_handle_dst, amdsmi_link_type_t *type, amdsmi_p2p_capability_t *cap)
Retrieve connection type and P2P capabilities between 2 GPUs.
amdsmi_set_xgmi_fb_sharing_mode
amdsmi_status_t amdsmi_set_xgmi_fb_sharing_mode(amdsmi_processor_handle processor_handle, amdsmi_xgmi_fb_sharing_mode_t mode)
Set XGMI framebuffer sharing mode.
amdsmi_get_link_topology_nearest
amdsmi_status_t amdsmi_get_link_topology_nearest(amdsmi_processor_handle processor_handle, amdsmi_link_type_t link_type, amdsmi_topology_nearest_t *topology_nearest_info)
Retrieve the set of GPUs that are nearest to a given device at a specific interconnectivity level.
amdsmi_get_gpu_driver_info
amdsmi_status_t amdsmi_get_gpu_driver_info(amdsmi_processor_handle processor_handle, amdsmi_driver_info_t *info)
Returns the driver version information.
amdsmi_get_gpu_driver_model
amdsmi_status_t amdsmi_get_gpu_driver_model(amdsmi_processor_handle processor_handle, amdsmi_driver_model_type_t *model)
Returns the driver model information.
amdsmi_get_lib_version
amdsmi_status_t amdsmi_get_lib_version(amdsmi_version_t *version)
Get the build version information for the currently running build of AMDSMI.
amdsmi_get_vf_info
amdsmi_status_t amdsmi_get_vf_info(amdsmi_vf_handle_t vf_handle, amdsmi_vf_info_t *config)
Returns the configuration structure for a VF.
amdsmi_get_vf_data
amdsmi_status_t amdsmi_get_vf_data(amdsmi_vf_handle_t vf_handle, amdsmi_vf_data_t *info)
Returns the data structure for a VF.
amdsmi_clear_vf_fb
amdsmi_status_t amdsmi_clear_vf_fb(amdsmi_vf_handle_t vf_handle)
Clear the framebuffer of a VF. If trying to clear the framebuffer of an active function,...
amdsmi_accelerator_partition_profile_config_t
Definition: amdsmi.h:1564
amdsmi_accelerator_partition_profile_config_t::default_profile_index
uint32_t default_profile_index
The index of the default profile in the profiles array.
Definition: amdsmi.h:1568
amdsmi_accelerator_partition_profile_config_t::num_profiles
uint32_t num_profiles
The length of profiles array.
Definition: amdsmi.h:1565
amdsmi_accelerator_partition_profile_t
Definition: amdsmi.h:1546
amdsmi_accelerator_partition_profile_t::profile_index
uint32_t profile_index
The index in the profiles array in amdsmi_accelerator_partition_profile_t.
Definition: amdsmi.h:1550
amdsmi_accelerator_partition_profile_t::num_partitions
uint32_t num_partitions
On MI300X, SPX: 1, DPX: 2, QPX: 4, CPX: 8.
Definition: amdsmi.h:1548
amdsmi_accelerator_partition_profile_t::memory_caps
amdsmi_nps_caps_t memory_caps
Memory capabilities of the profile.
Definition: amdsmi.h:1549
amdsmi_accelerator_partition_profile_t::profile_type
amdsmi_accelerator_partition_type_t profile_type
SPX, DPX, QPX, CPX and so on.
Definition: amdsmi.h:1547
amdsmi_accelerator_partition_profile_t::num_resources
uint32_t num_resources
length of array resources
Definition: amdsmi.h:1551
amdsmi_accelerator_partition_resource_profile_t
Definition: amdsmi.h:1556
amdsmi_accelerator_partition_resource_profile_t::partition_resource
uint32_t partition_resource
The resources a partition can be used, which may be shared.
Definition: amdsmi.h:1559
amdsmi_accelerator_partition_resource_profile_t::num_partitions_share_resource
uint32_t num_partitions_share_resource
If it is greater than 1, then resource is shared.
Definition: amdsmi.h:1560
amdsmi_asic_info_t
Definition: amdsmi.h:1211
amdsmi_asic_info_t::vendor_id
uint32_t vendor_id
Use 32 bit to be compatible with other platform.
Definition: amdsmi.h:1216
amdsmi_asic_info_t::device_id
uint64_t device_id
The unique id of a GPU.
Definition: amdsmi.h:1218
amdsmi_asic_info_t::subvendor_id
uint32_t subvendor_id
The subsystem vendor id.
Definition: amdsmi.h:1217
amdsmi_asic_info_t::subsystem_id
uint32_t subsystem_id
The subsystem device id.
Definition: amdsmi.h:1223
amdsmi_bdf_t::bdf_
Definition: amdsmi.h:1137
amdsmi_board_info_t
Definition: amdsmi.h:1288
amdsmi_clk_info_t
Definition: amdsmi.h:1249
amdsmi_cper_guid_t
Definition: amdsmi.h:1600
amdsmi_cper_hdr_t
Definition: amdsmi.h:1624
amdsmi_cper_timestamp_t
Definition: amdsmi.h:1613
amdsmi_dfc_fw_data_t
Definition: amdsmi.h:1408
amdsmi_dfc_fw_header_t
Definition: amdsmi.h:1391
amdsmi_dfc_fw_t
Definition: amdsmi.h:1420
amdsmi_dfc_fw_ta_uuid_t
Definition: amdsmi.h:1404
amdsmi_dfc_fw_white_list_t
Definition: amdsmi.h:1399
amdsmi_dpm_policy_entry_t
Definition: amdsmi.h:1573
amdsmi_dpm_policy_t
Definition: amdsmi.h:1579
amdsmi_dpm_policy_t::cur
uint32_t cur
Definition: amdsmi.h:1588
amdsmi_dpm_policy_t::num_supported
uint32_t num_supported
Definition: amdsmi.h:1583
amdsmi_driver_info_t
Definition: amdsmi.h:1227
amdsmi_eeprom_table_record_t
Definition: amdsmi.h:1425
amdsmi_eeprom_table_record_t::retired_page
uint64_t retired_page
Bad page frame address.
Definition: amdsmi.h:1426
amdsmi_engine_usage_t
Definition: amdsmi.h:1242
amdsmi_error_count_t
Definition: amdsmi.h:1258
amdsmi_error_count_t::uncorrectable_count
uint64_t uncorrectable_count
Accumulated uncorrectable errors.
Definition: amdsmi.h:1260
amdsmi_error_count_t::correctable_count
uint64_t correctable_count
Accumulated correctable errors.
Definition: amdsmi.h:1259
amdsmi_error_count_t::deferred_count
uint64_t deferred_count
Accumulated deferred errors.
Definition: amdsmi.h:1261
amdsmi_event_entry_t
Definition: amdsmi.h:1275
amdsmi_event_entry_t::timestamp
uint64_t timestamp
UTC microseconds.
Definition: amdsmi.h:1278
amdsmi_fw_error_record_t
Definition: amdsmi.h:1446
amdsmi_fw_info_t
Definition: amdsmi.h:1201
amdsmi_fw_load_error_record_t
Definition: amdsmi.h:1438
amdsmi_fw_load_error_record_t::timestamp
uint64_t timestamp
UTC microseconds.
Definition: amdsmi.h:1439
amdsmi_fw_load_error_record_t::status
uint16_t status
Definition: amdsmi.h:1442
amdsmi_gpu_cache_info_t::cache_
Definition: amdsmi.h:1190
amdsmi_gpu_cache_info_t
Definition: amdsmi.h:1188
amdsmi_guard_info_t
Definition: amdsmi.h:1319
amdsmi_guest_data_t
Definition: amdsmi.h:1385
amdsmi_guest_data_t::fb_usage
uint32_t fb_usage
Definition: amdsmi.h:1387
amdsmi_link_metrics_t::links_
Definition: amdsmi.h:1454
amdsmi_link_metrics_t::links_::write
uint64_t write
total data transfered for each link in KB
Definition: amdsmi.h:1460
amdsmi_link_metrics_t::links_::link_type
amdsmi_link_type_t link_type
type of the link
Definition: amdsmi.h:1458
amdsmi_link_metrics_t::links_::max_bandwidth
uint32_t max_bandwidth
max bandwidth of the link
Definition: amdsmi.h:1457
amdsmi_link_metrics_t::links_::bit_rate
uint32_t bit_rate
current link speed in Gb/s
Definition: amdsmi.h:1456
amdsmi_link_metrics_t::links_::read
uint64_t read
total data received for each link in KB
Definition: amdsmi.h:1459
amdsmi_link_metrics_t
Definition: amdsmi.h:1452
amdsmi_link_metrics_t::num_links
uint32_t num_links
number of links
Definition: amdsmi.h:1453
amdsmi_link_topology_t
Definition: amdsmi.h:1466
amdsmi_link_topology_t::weight
uint64_t weight
link weight
Definition: amdsmi.h:1467
amdsmi_link_topology_t::link_type
amdsmi_link_type_t link_type
type of the link
Definition: amdsmi.h:1469
amdsmi_link_topology_t::num_hops
uint8_t num_hops
number of hops
Definition: amdsmi.h:1470
amdsmi_link_topology_t::link_status
amdsmi_link_status_t link_status
HW status of the link.
Definition: amdsmi.h:1468
amdsmi_link_topology_t::fb_sharing
uint8_t fb_sharing
framebuffer sharing flag
Definition: amdsmi.h:1471
amdsmi_memory_partition_config_t::numa_range_
Definition: amdsmi.h:1538
amdsmi_memory_partition_config_t
Definition: amdsmi.h:1534
amdsmi_metric_t
Definition: amdsmi.h:1501
amdsmi_metric_t::flags
uint32_t flags
used to determine type of the metric (amdsmi_metric_type_t)
Definition: amdsmi.h:1505
amdsmi_metric_t::vf_mask
uint32_t vf_mask
Mask of all active VFs + PF that this metric applies to.
Definition: amdsmi.h:1506
amdsmi_nps_caps_t::nps_flags_
Definition: amdsmi.h:1524
amdsmi_p2p_capability_t
Definition: amdsmi.h:1653
amdsmi_p2p_capability_t::is_iolink_coherent
uint8_t is_iolink_coherent
1 = true, 0 = false, UINT8_MAX = Not defined.
Definition: amdsmi.h:1654
amdsmi_partition_info_t
Definition: amdsmi.h:1313
amdsmi_pcie_info_t::pcie_metric_
Definition: amdsmi.h:1155
amdsmi_pcie_info_t::pcie_metric_::pcie_nak_received_count
uint64_t pcie_nak_received_count
total number of NAKs issued on the PCIe link by the receiver
Definition: amdsmi.h:1163
amdsmi_pcie_info_t::pcie_metric_::pcie_replay_count
uint64_t pcie_replay_count
total number of the replays issued on the PCIe link
Definition: amdsmi.h:1159
amdsmi_pcie_info_t::pcie_metric_::pcie_width
uint16_t pcie_width
current PCIe width
Definition: amdsmi.h:1156
amdsmi_pcie_info_t::pcie_metric_::pcie_speed
uint32_t pcie_speed
current PCIe speed in MT/s
Definition: amdsmi.h:1157
amdsmi_pcie_info_t::pcie_metric_::pcie_bandwidth
uint32_t pcie_bandwidth
current PCIe bandwidth in Mb/s
Definition: amdsmi.h:1158
amdsmi_pcie_info_t::pcie_metric_::pcie_l0_to_recovery_count
uint64_t pcie_l0_to_recovery_count
total number of times the PCIe link transitioned from L0 to the recovery state
Definition: amdsmi.h:1160
amdsmi_pcie_info_t::pcie_metric_::pcie_nak_sent_count
uint64_t pcie_nak_sent_count
total number of NAKs issued on the PCIe link by the device
Definition: amdsmi.h:1162
amdsmi_pcie_info_t::pcie_metric_::pcie_replay_roll_over_count
uint64_t pcie_replay_roll_over_count
total number of replay rollovers issued on the PCIe link
Definition: amdsmi.h:1161
amdsmi_pcie_info_t::pcie_metric_::pcie_lc_perf_other_end_recovery_count
uint32_t pcie_lc_perf_other_end_recovery_count
PCIe other end recovery counter.
Definition: amdsmi.h:1164
amdsmi_pcie_info_t::pcie_static_
Definition: amdsmi.h:1147
amdsmi_pcie_info_t::pcie_static_::max_pcie_width
uint16_t max_pcie_width
maximum number of PCIe lanes
Definition: amdsmi.h:1148
amdsmi_pcie_info_t::pcie_static_::max_pcie_interface_version
uint32_t max_pcie_interface_version
maximum PCIe link generation
Definition: amdsmi.h:1152
amdsmi_pcie_info_t::pcie_static_::slot_type
amdsmi_card_form_factor_t slot_type
card form factor
Definition: amdsmi.h:1151
amdsmi_pcie_info_t::pcie_static_::max_pcie_speed
uint32_t max_pcie_speed
maximum PCIe speed
Definition: amdsmi.h:1149
amdsmi_pcie_info_t::pcie_static_::pcie_interface_version
uint32_t pcie_interface_version
PCIe interface version.
Definition: amdsmi.h:1150
amdsmi_pcie_info_t
Definition: amdsmi.h:1146
amdsmi_pf_fb_info_t
Definition: amdsmi.h:1297
amdsmi_pf_fb_info_t::pf_fb_reserved
uint32_t pf_fb_reserved
Definition: amdsmi.h:1299
amdsmi_pf_fb_info_t::min_vf_fb_usable
uint32_t min_vf_fb_usable
Definition: amdsmi.h:1303
amdsmi_pf_fb_info_t::fb_alignment
uint32_t fb_alignment
Definition: amdsmi.h:1301
amdsmi_pf_fb_info_t::total_fb_size
uint32_t total_fb_size
Definition: amdsmi.h:1298
amdsmi_pf_fb_info_t::max_vf_fb_usable
uint32_t max_vf_fb_usable
Definition: amdsmi.h:1302
amdsmi_pf_fb_info_t::pf_fb_offset
uint32_t pf_fb_offset
Definition: amdsmi.h:1300
amdsmi_power_cap_info_t
Definition: amdsmi.h:1171
amdsmi_power_info_t
Definition: amdsmi.h:1234
amdsmi_power_info_t::soc_voltage
uint64_t soc_voltage
SOC voltage measurement in mV.
Definition: amdsmi.h:1237
amdsmi_power_info_t::mem_voltage
uint64_t mem_voltage
MEM voltage measurement in mV.
Definition: amdsmi.h:1238
amdsmi_power_info_t::gfx_voltage
uint64_t gfx_voltage
GFX voltage measurement in mV.
Definition: amdsmi.h:1236
amdsmi_profile_caps_info_t
Definition: amdsmi.h:1366
amdsmi_profile_info_t
Definition: amdsmi.h:1375
amdsmi_ras_feature_t
Definition: amdsmi.h:1265
amdsmi_ras_feature_t::supported_ecc_correction_schema
uint32_t supported_ecc_correction_schema
ecc_correction_schema mask used with amdsmi_ecc_correction_schema_support_t flags
Definition: amdsmi.h:1267
amdsmi_sched_info_t
Definition: amdsmi.h:1341
amdsmi_sched_info_t::boot_up_time
uint64_t boot_up_time
in microseconds
Definition: amdsmi.h:1343
amdsmi_topology_nearest_t
Definition: amdsmi.h:1475
amdsmi_vbios_info_t
Definition: amdsmi.h:1180
amdsmi_version_t
This structure holds version information.
Definition: amdsmi.h:1514
amdsmi_version_t::minor
uint32_t minor
Minor version.
Definition: amdsmi.h:1516
amdsmi_version_t::major
uint32_t major
Major version.
Definition: amdsmi.h:1515
amdsmi_version_t::release
uint32_t release
Patch, build or stepping version.
Definition: amdsmi.h:1517
amdsmi_vf_data_t
Definition: amdsmi.h:1360
amdsmi_vf_fb_info_t
Definition: amdsmi.h:1307
amdsmi_vf_fb_info_t::fb_size
uint32_t fb_size
Definition: amdsmi.h:1309
amdsmi_vf_fb_info_t::fb_offset
uint32_t fb_offset
Definition: amdsmi.h:1308
amdsmi_vf_handle_t
Definition: amdsmi.h:1271
amdsmi_vf_info_t
Definition: amdsmi.h:1335
amdsmi_vf_info_t::gfx_timeslice
uint32_t gfx_timeslice
Definition: amdsmi.h:1337
amdsmi_vram_info_t
Definition: amdsmi.h:1493
amdsmi_vram_info_t::vram_size
uint32_t vram_size
vram size in MB
Definition: amdsmi.h:1496
amdsmi_xgmi_fb_sharing_caps_t::cap_
Definition: amdsmi.h:1482
amdsmi_bdf_t
AUX STRUCTURES.
Definition: amdsmi.h:1136
amdsmi_nps_caps_t
This union holds memory partition bitmask.
Definition: amdsmi.h:1523
amdsmi_xgmi_fb_sharing_caps_t
Definition: amdsmi.h:1481