amdsmi.h Source File

amdsmi.h Source File#

AMD SMI: amdsmi.h Source File
amdsmi.h
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1 /*
2  * Copyright (c) 2022-2024 Advanced Micro Devices, Inc. All rights reserved.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a copy
5  * of this software and associated documentation files (the "Software"), to deal
6  * in the Software without restriction, including without limitation the rights
7  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
8  * copies of the Software, and to permit persons to whom the Software is
9  * furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
17  * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
19  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
20  * THE SOFTWARE.
21  */
22 
29 #ifndef __AMDSMI_H__
30 #define __AMDSMI_H__
31 
32 #ifndef __KERNEL__
33 #include <stdint.h>
34 #include <stdbool.h>
35 #include <stddef.h>
36 #endif
37 
43 typedef enum {
44  AMDSMI_INIT_ALL_PROCESSORS = 0xFFFFFFFF,
45  AMDSMI_INIT_AMD_CPUS = (1 << 0),
46  AMDSMI_INIT_AMD_GPUS = (1 << 1),
47  AMDSMI_INIT_NON_AMD_CPUS = (1 << 2),
48  AMDSMI_INIT_NON_AMD_GPUS = (1 << 3),
49  AMDSMI_INIT_AMD_APUS = (AMDSMI_INIT_AMD_CPUS | AMDSMI_INIT_AMD_GPUS) // Default option
50 } amdsmi_init_flags_t;
51 
55 #define AMDSMI_MAX_DEVICES 32
56 #define AMDSMI_MAX_VF_COUNT 32
57 #define AMDSMI_PF_INDEX (AMDSMI_MAX_VF_COUNT - 1)
58 #define AMDSMI_MAX_STRING_LENGTH 256
59 #define AMDSMI_MAX_DRIVER_INFO_RSVD 64
60 #define AMDSMI_MAX_MM_IP_COUNT 8
61 #define AMDSMI_MAX_CACHE_TYPES 10
62 #define AMDSMI_MAX_NUM_PM_POLICIES 32
63 #define AMDSMI_MAX_NAME 32
64 
66 #define AMDSMI_MAX_DRIVER_NUM 2
67 
69 #define AMDSMI_MAX_DATE_LENGTH 32
70 
71 #define AMDSMI_GPU_UUID_SIZE 38
72 
73 #define AMDSMI_DFC_FW_NUMBER_OF_ENTRIES 9
74 
75 #define AMDSMI_MAX_WHITE_LIST_ELEMENTS 16
76 #define AMDSMI_MAX_BLACK_LIST_ELEMENTS 64
77 #define AMDSMI_MAX_UUID_ELEMENTS 16
78 #define AMDSMI_MAX_TA_WHITE_LIST_ELEMENTS 8
79 
80 #define AMDSMI_MAX_ERR_RECORDS 10
81 
83 #define AMDSMI_EVENT_MSG_SIZE 256
84 
85 #define AMDSMI_MAX_PROFILE_COUNT 16
86 
90 #define AMDSMI_TIME_FORMAT "%02d:%02d:%02d.%03d"
91 #define AMDSMI_DATE_FORMAT "%04d-%02d-%02d:%02d:%02d:%02d.%03d"
92 
98 #define AMDSMI_MASK_ALL (~0ULL)
99 
101 #define AMDSMI_MASK_DEFAULT ((1ULL << 62) - 1)
102 
104 #define AMDSMI_MASK_INIT (0ULL)
105 
107 #define AMDSMI_MASK_HIGH_AND_MED_SEVERITY (~((1ULL << 61) - 1))
108 
112 #define AMDSMI_MASK_HIGH_ERROR_SEVERITY_ONLY(mask) (mask & ((1ULL << 60) - 1))
113 #define AMDSMI_MASK_INCLUDE_MED_ERROR_SEVERITY(mask) (mask | (1ULL << 60))
114 #define AMDSMI_MASK_INCLUDE_LOW_ERROR_SEVERITY(mask) (mask | (1ULL << 61))
115 #define AMDSMI_MASK_INCLUDE_WARN_SEVERITY(mask) (mask | (1ULL << 62))
116 #define AMDSMI_MASK_INCLUDE_INFO_SEVERITY(mask) (mask | (1ULL << 63))
117 
121 #define AMDSMI_MASK_HIGH_SEVERITY_ONLY(mask) (mask & ((1ULL << 62) - 1))
122 #define AMDSMI_MASK_INCLUDE_MED_SEVERITY(mask) AMDSMI_MASK_INCLUDE_WARN_SEVERITY(mask)
123 #define AMDSMI_MASK_INCLUDE_LOW_SEVERITY(mask) AMDSMI_MASK_INCLUDE_INFO_SEVERITY(mask)
124 
125 #define AMDSMI_MASK_INCLUDE_CATEGORY(mask, cate) (mask | (1ULL << cate))
126 #define AMDSMI_MASK_EXCLUDE_CATEGORY(mask, cate) (mask & (~(1ULL << cate)))
127 
128 #define AMDSMI_MAX_NUM_XGMI_PHYSICAL_LINK 64
129 #define AMDSMI_MAX_FB_SHARING_GROUPS 64
130 #define AMDSMI_MAX_NUM_CONNECTED_NODES 64
131 
132 #define AMDSMI_MAX_NUM_METRICS_V1 255
133 #define AMDSMI_MAX_NUM_METRICS AMDSMI_MAX_NUM_METRICS_V1
134 
135 #define AMDSMI_MAX_BAD_PAGE_RECORD_V1 512
136 #define AMDSMI_MAX_BAD_PAGE_RECORD_V2 16384
137 #define AMDSMI_MAX_BAD_PAGE_RECORD AMDSMI_MAX_BAD_PAGE_RECORD_V2
138 
139 #define AMDSMI_MAX_CP_PROFILE_RESOURCES 32
140 #define AMDSMI_MAX_ACCELERATOR_PARTITIONS 8
141 #define AMDSMI_MAX_ACCELERATOR_PROFILE 32
142 #define AMDSMI_MAX_NUM_NUMA_NODES 32
143 
144 #define MAX_NUMBER_OF_AFIDS_PER_RECORD 12
145 
147 typedef void *amdsmi_socket_handle;
148 typedef void *amdsmi_event_set;
149 typedef void *amdsmi_processor_handle;
150 
154 typedef enum {
155  AMDSMI_STATUS_SUCCESS = 0,
156  // Library usage errors
157  AMDSMI_STATUS_INVAL = 1,
158  AMDSMI_STATUS_NOT_SUPPORTED = 2,
159  AMDSMI_STATUS_NOT_YET_IMPLEMENTED = 3,
160  AMDSMI_STATUS_FAIL_LOAD_MODULE = 4,
161  AMDSMI_STATUS_FAIL_LOAD_SYMBOL = 5,
162  AMDSMI_STATUS_DRM_ERROR = 6,
163  AMDSMI_STATUS_API_FAILED = 7,
164  AMDSMI_STATUS_TIMEOUT = 8,
165  AMDSMI_STATUS_RETRY = 9,
166  AMDSMI_STATUS_NO_PERM = 10,
167  AMDSMI_STATUS_INTERRUPT = 11,
168  AMDSMI_STATUS_IO = 12,
169  AMDSMI_STATUS_ADDRESS_FAULT = 13,
170  AMDSMI_STATUS_FILE_ERROR = 14,
171  AMDSMI_STATUS_OUT_OF_RESOURCES = 15,
172  AMDSMI_STATUS_INTERNAL_EXCEPTION = 16,
173  AMDSMI_STATUS_INPUT_OUT_OF_BOUNDS = 17,
174  AMDSMI_STATUS_INIT_ERROR = 18,
175  AMDSMI_STATUS_REFCOUNT_OVERFLOW = 19,
176  AMDSMI_STATUS_MORE_DATA = 20,
177  // Processor related errors
178  AMDSMI_STATUS_BUSY = 30,
179  AMDSMI_STATUS_NOT_FOUND = 31,
180  AMDSMI_STATUS_NOT_INIT = 32,
181  AMDSMI_STATUS_NO_SLOT = 33,
182  AMDSMI_STATUS_DRIVER_NOT_LOADED = 34,
183  // Data and size errors
184  AMDSMI_STATUS_NO_DATA = 40,
185  AMDSMI_STATUS_INSUFFICIENT_SIZE = 41,
186  AMDSMI_STATUS_UNEXPECTED_SIZE = 42,
187  AMDSMI_STATUS_UNEXPECTED_DATA = 43,
188  //esmi errors
189  AMDSMI_STATUS_NON_AMD_CPU = 44,
190  AMDSMI_STATUS_NO_ENERGY_DRV = 45,
191  AMDSMI_STATUS_NO_MSR_DRV = 46,
192  AMDSMI_STATUS_NO_HSMP_DRV = 47,
193  AMDSMI_STATUS_NO_HSMP_SUP = 48,
194  AMDSMI_STATUS_NO_HSMP_MSG_SUP = 49,
195  AMDSMI_STATUS_HSMP_TIMEOUT = 50,
196  AMDSMI_STATUS_NO_DRV = 51,
197  AMDSMI_STATUS_FILE_NOT_FOUND = 52,
198  AMDSMI_STATUS_ARG_PTR_NULL = 53,
199  AMDSMI_STATUS_AMDGPU_RESTART_ERR = 54,
200  AMDSMI_STATUS_SETTING_UNAVAILABLE = 55,
201 
202  // General errors
203  AMDSMI_STATUS_MAP_ERROR = 0xFFFFFFFE,
204  AMDSMI_STATUS_UNKNOWN_ERROR = 0xFFFFFFFF,
205 } amdsmi_status_t;
206 
210 typedef enum {
211  AMDSMI_CACHE_PROPERTY_ENABLED = 0x00000001,
212  AMDSMI_CACHE_PROPERTY_DATA_CACHE = 0x00000002,
213  AMDSMI_CACHE_PROPERTY_INST_CACHE = 0x00000004,
214  AMDSMI_CACHE_PROPERTY_CPU_CACHE = 0x00000008,
215  AMDSMI_CACHE_PROPERTY_SIMD_CACHE = 0x00000010,
216 } amdsmi_cache_property_type_t;
217 
218 typedef enum {
219  AMDSMI_FW_ID_SMU = 1,
220  AMDSMI_FW_ID_FIRST = AMDSMI_FW_ID_SMU,
221  AMDSMI_FW_ID_CP_CE,
222  AMDSMI_FW_ID_CP_PFP,
223  AMDSMI_FW_ID_CP_ME,
224  AMDSMI_FW_ID_CP_MEC_JT1,
225  AMDSMI_FW_ID_CP_MEC_JT2,
226  AMDSMI_FW_ID_CP_MEC1,
227  AMDSMI_FW_ID_CP_MEC2,
228  AMDSMI_FW_ID_RLC,
229  AMDSMI_FW_ID_SDMA0,
230  AMDSMI_FW_ID_SDMA1,
231  AMDSMI_FW_ID_SDMA2,
232  AMDSMI_FW_ID_SDMA3,
233  AMDSMI_FW_ID_SDMA4,
234  AMDSMI_FW_ID_SDMA5,
235  AMDSMI_FW_ID_SDMA6,
236  AMDSMI_FW_ID_SDMA7,
237  AMDSMI_FW_ID_VCN,
238  AMDSMI_FW_ID_UVD,
239  AMDSMI_FW_ID_VCE,
240  AMDSMI_FW_ID_ISP,
241  AMDSMI_FW_ID_DMCU_ERAM,
242  AMDSMI_FW_ID_DMCU_ISR,
243  AMDSMI_FW_ID_RLC_RESTORE_LIST_GPM_MEM,
244  AMDSMI_FW_ID_RLC_RESTORE_LIST_SRM_MEM,
245  AMDSMI_FW_ID_RLC_RESTORE_LIST_CNTL,
246  AMDSMI_FW_ID_RLC_V,
247  AMDSMI_FW_ID_MMSCH,
248  AMDSMI_FW_ID_PSP_SYSDRV,
249  AMDSMI_FW_ID_PSP_SOSDRV,
250  AMDSMI_FW_ID_PSP_TOC,
251  AMDSMI_FW_ID_PSP_KEYDB,
252  AMDSMI_FW_ID_DFC,
253  AMDSMI_FW_ID_PSP_SPL,
254  AMDSMI_FW_ID_DRV_CAP,
255  AMDSMI_FW_ID_MC,
256  AMDSMI_FW_ID_PSP_BL,
257  AMDSMI_FW_ID_CP_PM4,
258  AMDSMI_FW_ID_RLC_P,
259  AMDSMI_FW_ID_SEC_POLICY_STAGE2,
260  AMDSMI_FW_ID_REG_ACCESS_WHITELIST,
261  AMDSMI_FW_ID_IMU_DRAM,
262  AMDSMI_FW_ID_IMU_IRAM,
263  AMDSMI_FW_ID_SDMA_TH0,
264  AMDSMI_FW_ID_SDMA_TH1,
265  AMDSMI_FW_ID_CP_MES,
266  AMDSMI_FW_ID_MES_STACK,
267  AMDSMI_FW_ID_MES_THREAD1,
268  AMDSMI_FW_ID_MES_THREAD1_STACK,
269  AMDSMI_FW_ID_RLX6,
270  AMDSMI_FW_ID_RLX6_DRAM_BOOT,
271  AMDSMI_FW_ID_RS64_ME,
272  AMDSMI_FW_ID_RS64_ME_P0_DATA,
273  AMDSMI_FW_ID_RS64_ME_P1_DATA,
274  AMDSMI_FW_ID_RS64_PFP,
275  AMDSMI_FW_ID_RS64_PFP_P0_DATA,
276  AMDSMI_FW_ID_RS64_PFP_P1_DATA,
277  AMDSMI_FW_ID_RS64_MEC,
278  AMDSMI_FW_ID_RS64_MEC_P0_DATA,
279  AMDSMI_FW_ID_RS64_MEC_P1_DATA,
280  AMDSMI_FW_ID_RS64_MEC_P2_DATA,
281  AMDSMI_FW_ID_RS64_MEC_P3_DATA,
282  AMDSMI_FW_ID_PPTABLE,
283  AMDSMI_FW_ID_PSP_SOC,
284  AMDSMI_FW_ID_PSP_DBG,
285  AMDSMI_FW_ID_PSP_INTF,
286  AMDSMI_FW_ID_RLX6_CORE1,
287  AMDSMI_FW_ID_RLX6_DRAM_BOOT_CORE1,
288  AMDSMI_FW_ID_RLCV_LX7,
289  AMDSMI_FW_ID_RLC_SAVE_RESTORE_LIST,
290  AMDSMI_FW_ID_ASD,
291  AMDSMI_FW_ID_TA_RAS,
292  AMDSMI_FW_ID_XGMI,
293  AMDSMI_FW_ID_RLC_SRLG,
294  AMDSMI_FW_ID_RLC_SRLS,
295  AMDSMI_FW_ID_SMC,
296  AMDSMI_FW_ID_DMCU,
297  AMDSMI_FW_ID_PSP_RAS,
298  AMDSMI_FW_ID_P2S_TABLE,
299  AMDSMI_FW_ID_PLDM_BUNDLE,
300  AMDSMI_FW_ID__MAX
301 } amdsmi_fw_block_t;
302 
306 typedef enum {
307  AMDSMI_MM_UVD,
308  AMDSMI_MM_VCE,
309  AMDSMI_MM_VCN,
310  AMDSMI_MM__MAX
311 } amdsmi_mm_ip_t;
312 
316 typedef enum {
317  AMDSMI_CLK_TYPE_SYS = 0x0,
318  AMDSMI_CLK_TYPE_FIRST = AMDSMI_CLK_TYPE_SYS,
319  AMDSMI_CLK_TYPE_GFX = AMDSMI_CLK_TYPE_SYS,
320  AMDSMI_CLK_TYPE_DF,
322  AMDSMI_CLK_TYPE_DCEF,
323  AMDSMI_CLK_TYPE_SOC,
324  AMDSMI_CLK_TYPE_MEM,
325  AMDSMI_CLK_TYPE_PCIE,
326  AMDSMI_CLK_TYPE_VCLK0,
327  AMDSMI_CLK_TYPE_VCLK1,
328  AMDSMI_CLK_TYPE_DCLK0,
329  AMDSMI_CLK_TYPE_DCLK1,
330  AMDSMI_CLK_TYPE__MAX = AMDSMI_CLK_TYPE_DCLK1
331 } amdsmi_clk_type_t;
336 typedef enum {
337  AMDSMI_TEMPERATURE_TYPE_EDGE,
338  AMDSMI_TEMPERATURE_TYPE_FIRST = AMDSMI_TEMPERATURE_TYPE_EDGE,
339  AMDSMI_TEMPERATURE_TYPE_HOTSPOT,
340  AMDSMI_TEMPERATURE_TYPE_JUNCTION = AMDSMI_TEMPERATURE_TYPE_HOTSPOT,
341  AMDSMI_TEMPERATURE_TYPE_VRAM,
342  AMDSMI_TEMPERATURE_TYPE_HBM_0,
343  AMDSMI_TEMPERATURE_TYPE_HBM_1,
344  AMDSMI_TEMPERATURE_TYPE_HBM_2,
345  AMDSMI_TEMPERATURE_TYPE_HBM_3,
346  AMDSMI_TEMPERATURE_TYPE_PLX,
347  AMDSMI_TEMPERATURE_TYPE__MAX = AMDSMI_TEMPERATURE_TYPE_PLX
348 } amdsmi_temperature_type_t;
353 typedef enum {
354  AMDSMI_TEMP_CURRENT = 0x0,
355  AMDSMI_TEMP_FIRST = AMDSMI_TEMP_CURRENT,
356  AMDSMI_TEMP_MAX,
357  AMDSMI_TEMP_MIN,
358  AMDSMI_TEMP_MAX_HYST,
361  AMDSMI_TEMP_MIN_HYST,
364  AMDSMI_TEMP_CRITICAL,
366  AMDSMI_TEMP_CRITICAL_HYST,
369  AMDSMI_TEMP_EMERGENCY,
373  AMDSMI_TEMP_EMERGENCY_HYST,
376  AMDSMI_TEMP_CRIT_MIN,
379  AMDSMI_TEMP_CRIT_MIN_HYST,
382  AMDSMI_TEMP_OFFSET,
384  AMDSMI_TEMP_LOWEST,
385  AMDSMI_TEMP_HIGHEST,
386  AMDSMI_TEMP_SHUTDOWN,
387  AMDSMI_TEMP_LAST = AMDSMI_TEMP_SHUTDOWN
388 } amdsmi_temperature_metric_t;
389 
390 
391 typedef enum {
392  AMDSMI_PROCESSOR_TYPE_UNKNOWN = 0,
393  AMDSMI_PROCESSOR_TYPE_AMD_GPU,
394  AMDSMI_PROCESSOR_TYPE_AMD_CPU,
395  AMDSMI_PROCESSOR_TYPE_NON_AMD_GPU,
396  AMDSMI_PROCESSOR_TYPE_NON_AMD_CPU,
397  AMDSMI_PROCESSOR_TYPE_AMD_CPU_CORE,
398  AMDSMI_PROCESSOR_TYPE_AMD_APU
399 } processor_type_t;
400 
401 typedef enum {
402  AMDSMI_EVENT_CATEGORY_NON_USED = 0,
403  AMDSMI_EVENT_CATEGORY_DRIVER = 1,
404  AMDSMI_EVENT_CATEGORY_RESET = 2,
405  AMDSMI_EVENT_CATEGORY_SCHED = 3,
406  AMDSMI_EVENT_CATEGORY_VBIOS = 4,
407  AMDSMI_EVENT_CATEGORY_ECC = 5,
408  AMDSMI_EVENT_CATEGORY_PP = 6,
409  AMDSMI_EVENT_CATEGORY_IOV = 7,
410  AMDSMI_EVENT_CATEGORY_VF = 8,
411  AMDSMI_EVENT_CATEGORY_FW = 9,
412  AMDSMI_EVENT_CATEGORY_GPU = 10,
413  AMDSMI_EVENT_CATEGORY_GUARD = 11,
414  AMDSMI_EVENT_CATEGORY_GPUMON = 12,
415  AMDSMI_EVENT_CATEGORY_MMSCH = 13,
416  AMDSMI_EVENT_CATEGORY_XGMI = 14,
417  AMDSMI_EVENT_CATEGORY__MAX
418 } amdsmi_event_category_t;
419 
423 typedef enum {
424  AMDSMI_EVENT_GPU_DEVICE_LOST = 0,
425  AMDSMI_EVENT_GPU_NOT_SUPPORTED,
426  AMDSMI_EVENT_GPU_RMA,
427  AMDSMI_EVENT_GPU_NOT_INITIALIZED,
428  AMDSMI_EVENT_GPU_MMSCH_ABNORMAL_STATE,
429  AMDSMI_EVENT_GPU_RLCV_ABNORMAL_STATE,
430  AMDSMI_EVENT_GPU_SDMA_ENGINE_BUSY,
431  AMDSMI_EVENT_GPU_RLC_ENGINE_BUSY,
432  AMDSMI_EVENT_GPU_GC_ENGINE_BUSY,
433  AMDSMI_EVENT_GPU__MAX
434 } amdsmi_event_gpu_t;
435 
436 typedef enum {
437  AMDSMI_EVENT_DRIVER_SPIN_LOCK_BUSY = 0,
438  AMDSMI_EVENT_DRIVER_ALLOC_SYSTEM_MEM_FAIL,
439  AMDSMI_EVENT_DRIVER_CREATE_GFX_WORKQUEUE_FAIL,
440  AMDSMI_EVENT_DRIVER_CREATE_MM_WORKQUEUE_FAIL,
441  AMDSMI_EVENT_DRIVER_BUFFER_OVERFLOW,
442 
443  AMDSMI_EVENT_DRIVER_DEV_INIT_FAIL,
444  AMDSMI_EVENT_DRIVER_CREATE_THREAD_FAIL,
445  AMDSMI_EVENT_DRIVER_NO_ACCESS_PCI_REGION,
446  AMDSMI_EVENT_DRIVER_MMIO_FAIL,
447  AMDSMI_EVENT_DRIVER_INTERRUPT_INIT_FAIL,
448 
449  AMDSMI_EVENT_DRIVER_INVALID_VALUE,
450  AMDSMI_EVENT_DRIVER_CREATE_MUTEX_FAIL,
451  AMDSMI_EVENT_DRIVER_CREATE_TIMER_FAIL,
452  AMDSMI_EVENT_DRIVER_CREATE_EVENT_FAIL,
453  AMDSMI_EVENT_DRIVER_CREATE_SPIN_LOCK_FAIL,
454 
455  AMDSMI_EVENT_DRIVER_ALLOC_FB_MEM_FAIL,
456  AMDSMI_EVENT_DRIVER_ALLOC_DMA_MEM_FAIL,
457  AMDSMI_EVENT_DRIVER_NO_FB_MANAGER,
458  AMDSMI_EVENT_DRIVER_HW_INIT_FAIL,
459  AMDSMI_EVENT_DRIVER_SW_INIT_FAIL,
460 
461  AMDSMI_EVENT_DRIVER_INIT_CONFIG_ERROR,
462  AMDSMI_EVENT_DRIVER_ERROR_LOGGING_FAILED,
463  AMDSMI_EVENT_DRIVER_CREATE_RWLOCK_FAIL,
464  AMDSMI_EVENT_DRIVER_CREATE_RWSEMA_FAIL,
465  AMDSMI_EVENT_DRIVER_GET_READ_LOCK_FAIL,
466 
467  AMDSMI_EVENT_DRIVER_GET_WRITE_LOCK_FAIL,
468  AMDSMI_EVENT_DRIVER_GET_READ_SEMA_FAIL,
469  AMDSMI_EVENT_DRIVER_GET_WRITE_SEMA_FAIL,
470 
471  AMDSMI_EVENT_DRIVER_DIAG_DATA_INIT_FAIL,
472  AMDSMI_EVENT_DRIVER_DIAG_DATA_MEM_REQ_FAIL,
473  AMDSMI_EVENT_DRIVER_DIAG_DATA_VADDR_REQ_FAIL,
474  AMDSMI_EVENT_DRIVER_DIAG_DATA_BUS_ADDR_REQ_FAIL,
475 
476  AMDSMI_EVENT_DRIVER_HRTIMER_START_FAIL,
477  AMDSMI_EVENT_DRIVER_CREATE_DRIVER_FILE_FAIL,
478  AMDSMI_EVENT_DRIVER_CREATE_DEVICE_FILE_FAIL,
479  AMDSMI_EVENT_DRIVER_CREATE_DEBUGFS_FILE_FAIL,
480  AMDSMI_EVENT_DRIVER_CREATE_DEBUGFS_DIR_FAIL,
481 
482  AMDSMI_EVENT_DRIVER_PCI_ENABLE_DEVICE_FAIL,
483  AMDSMI_EVENT_DRIVER_FB_MAP_FAIL,
484  AMDSMI_EVENT_DRIVER_DOORBELL_MAP_FAIL,
485  AMDSMI_EVENT_DRIVER_PCI_REGISTER_DRIVER_FAIL,
486 
487  AMDSMI_EVENT_DRIVER_ALLOC_IOVA_ALIGN_FAIL,
488 
489  AMDSMI_EVENT_DRIVER_ROM_MAP_FAIL,
490  AMDSMI_EVENT_DRIVER_FULL_ACCESS_TIMEOUT,
491 
492  AMDSMI_EVENT_DRIVER__MAX
493 } amdsmi_event_driver_t;
494 
495 typedef enum {
496  AMDSMI_EVENT_FW_CMD_ALLOC_BUF_FAIL = 0,
497  AMDSMI_EVENT_FW_CMD_BUF_PREP_FAIL,
498  AMDSMI_EVENT_FW_RING_INIT_FAIL,
499  AMDSMI_EVENT_FW_FW_APPLY_SECURITY_POLICY_FAIL,
500  AMDSMI_EVENT_FW_START_RING_FAIL,
501 
502  AMDSMI_EVENT_FW_FW_LOAD_FAIL,
503  AMDSMI_EVENT_FW_EXIT_FAIL,
504  AMDSMI_EVENT_FW_INIT_FAIL,
505  AMDSMI_EVENT_FW_CMD_SUBMIT_FAIL,
506  AMDSMI_EVENT_FW_CMD_FENCE_WAIT_FAIL,
507 
508  AMDSMI_EVENT_FW_TMR_LOAD_FAIL,
509  AMDSMI_EVENT_FW_TOC_LOAD_FAIL,
510  AMDSMI_EVENT_FW_RAS_LOAD_FAIL,
511  AMDSMI_EVENT_FW_RAS_UNLOAD_FAIL,
512  AMDSMI_EVENT_FW_RAS_TA_INVOKE_FAIL,
513  AMDSMI_EVENT_FW_RAS_TA_ERR_INJECT_FAIL,
514 
515  AMDSMI_EVENT_FW_ASD_LOAD_FAIL,
516  AMDSMI_EVENT_FW_ASD_UNLOAD_FAIL,
517  AMDSMI_EVENT_FW_AUTOLOAD_FAIL,
518  AMDSMI_EVENT_FW_VFGATE_FAIL,
519 
520  AMDSMI_EVENT_FW_XGMI_LOAD_FAIL,
521  AMDSMI_EVENT_FW_XGMI_UNLOAD_FAIL,
522  AMDSMI_EVENT_FW_XGMI_TA_INVOKE_FAIL,
523 
524  AMDSMI_EVENT_FW_TMR_INIT_FAIL,
525  AMDSMI_EVENT_FW_NOT_SUPPORTED_FEATURE,
526  AMDSMI_EVENT_FW_GET_PSP_TRACELOG_FAIL,
527 
528  AMDSMI_EVENT_FW_SET_SNAPSHOT_ADDR_FAIL,
529  AMDSMI_EVENT_FW_SNAPSHOT_TRIGGER_FAIL,
530 
531  AMDSMI_EVENT_FW_MIGRATION_GET_PSP_INFO_FAIL,
532  AMDSMI_EVENT_FW_MIGRATION_EXPORT_FAIL,
533  AMDSMI_EVENT_FW_MIGRATION_IMPORT_FAIL,
534 
535  AMDSMI_EVENT_FW_BL_FAIL,
536  AMDSMI_EVENT_FW_RAS_BOOT_FAIL,
537  AMDSMI_EVENT_FW_MAILBOX_ERROR,
538 
539  AMDSMI_EVENT_FW__MAX
540 } amdsmi_event_fw_t;
541 
542 #define AMDSMI_EVENT_FW_FW_INIT_FAIL AMDSMI_EVENT_FW_RING_INIT_FAIL
543 
544 typedef enum {
545  AMDSMI_EVENT_RESET_GPU = 0,
546  AMDSMI_EVENT_RESET_GPU_FAILED,
547  AMDSMI_EVENT_RESET_FLR,
548  AMDSMI_EVENT_RESET_FLR_FAILED,
549  AMDSMI_EVENT_RESET__MAX
550 } amdsmi_event_reset_t;
551 
552 typedef enum {
553  AMDSMI_EVENT_IOV_NO_GPU_IOV_CAP = 0,
554  AMDSMI_EVENT_IOV_ASIC_NO_SRIOV_SUPPORT,
555  AMDSMI_EVENT_IOV_ENABLE_SRIOV_FAIL,
556  AMDSMI_EVENT_IOV_CMD_TIMEOUT,
557  AMDSMI_EVENT_IOV_CMD_ERROR,
558 
559  AMDSMI_EVENT_IOV_INIT_IV_RING_FAIL,
560  AMDSMI_EVENT_IOV_SRIOV_STRIDE_ERROR,
561  AMDSMI_EVENT_IOV_WS_SAVE_TIMEOUT,
562  AMDSMI_EVENT_IOV_WS_IDLE_TIMEOUT,
563  AMDSMI_EVENT_IOV_WS_RUN_TIMEOUT,
564  AMDSMI_EVENT_IOV_WS_LOAD_TIMEOUT,
565  AMDSMI_EVENT_IOV_WS_SHUTDOWN_TIMEOUT,
566  AMDSMI_EVENT_IOV_WS_ALREADY_SHUTDOWN,
567  AMDSMI_EVENT_IOV_WS_INFINITE_LOOP,
568  AMDSMI_EVENT_IOV_WS_REENTRANT_ERROR,
569  AMDSMI_EVENT_IOV__MAX
570 } amdsmi_event_iov_t;
571 
572 typedef enum {
573  AMDSMI_EVENT_ECC_UCE = 0,
574  AMDSMI_EVENT_ECC_CE,
575  AMDSMI_EVENT_ECC_IN_PF_FB,
576  AMDSMI_EVENT_ECC_IN_CRI_REG,
577  AMDSMI_EVENT_ECC_IN_VF_CRI,
578  AMDSMI_EVENT_ECC_REACH_THD,
579  AMDSMI_EVENT_ECC_VF_CE,
580  AMDSMI_EVENT_ECC_VF_UE,
581  AMDSMI_EVENT_ECC_IN_SAME_ROW,
582  AMDSMI_EVENT_ECC_UMC_UE,
583  AMDSMI_EVENT_ECC_GFX_CE,
584  AMDSMI_EVENT_ECC_GFX_UE,
585  AMDSMI_EVENT_ECC_SDMA_CE,
586  AMDSMI_EVENT_ECC_SDMA_UE,
587  AMDSMI_EVENT_ECC_GFX_CE_TOTAL,
588  AMDSMI_EVENT_ECC_GFX_UE_TOTAL,
589  AMDSMI_EVENT_ECC_SDMA_CE_TOTAL,
590  AMDSMI_EVENT_ECC_SDMA_UE_TOTAL,
591  AMDSMI_EVENT_ECC_UMC_CE_TOTAL,
592  AMDSMI_EVENT_ECC_UMC_UE_TOTAL,
593  AMDSMI_EVENT_ECC_MMHUB_CE,
594  AMDSMI_EVENT_ECC_MMHUB_UE,
595  AMDSMI_EVENT_ECC_MMHUB_CE_TOTAL,
596  AMDSMI_EVENT_ECC_MMHUB_UE_TOTAL,
597  AMDSMI_EVENT_ECC_XGMI_WAFL_CE,
598  AMDSMI_EVENT_ECC_XGMI_WAFL_UE,
599  AMDSMI_EVENT_ECC_XGMI_WAFL_CE_TOTAL,
600  AMDSMI_EVENT_ECC_XGMI_WAFL_UE_TOTAL,
601  AMDSMI_EVENT_ECC_FATAL_ERROR,
602  AMDSMI_EVENT_ECC_POISON_CONSUMPTION,
603  AMDSMI_EVENT_ECC_ACA_DUMP,
604  AMDSMI_EVENT_ECC_WRONG_SOCKET_ID,
605  AMDSMI_EVENT_ECC_ACA_UNKNOWN_BLOCK_INSTANCE,
606  AMDSMI_EVENT_ECC_UNKNOWN_CHIPLET_CE,
607  AMDSMI_EVENT_ECC_UNKNOWN_CHIPLET_UE,
608  AMDSMI_EVENT_ECC_UMC_CHIPLET_CE,
609  AMDSMI_EVENT_ECC_UMC_CHIPLET_UE,
610  AMDSMI_EVENT_ECC_GFX_CHIPLET_CE,
611  AMDSMI_EVENT_ECC_GFX_CHIPLET_UE,
612  AMDSMI_EVENT_ECC_SDMA_CHIPLET_CE,
613  AMDSMI_EVENT_ECC_SDMA_CHIPLET_UE,
614  AMDSMI_EVENT_ECC_MMHUB_CHIPLET_CE,
615  AMDSMI_EVENT_ECC_MMHUB_CHIPLET_UE,
616  AMDSMI_EVENT_ECC_XGMI_WAFL_CHIPLET_CE,
617  AMDSMI_EVENT_ECC_XGMI_WAFL_CHIPLET_UE,
618  AMDSMI_EVENT_ECC_EEPROM_ENTRIES_FOUND,
619  AMDSMI_EVENT_ECC_UMC_DE,
620  AMDSMI_EVENT_ECC_UMC_DE_TOTAL,
621  AMDSMI_EVENT_ECC_UNKNOWN,
622  AMDSMI_EVENT_ECC_EEPROM_REACH_THD,
623  AMDSMI_EVENT_ECC_UMC_CHIPLET_DE,
624  AMDSMI_EVENT_ECC_UNKNOWN_CHIPLET_DE,
625  AMDSMI_EVENT_ECC_EEPROM_CHK_MISMATCH,
626  AMDSMI_EVENT_ECC_EEPROM_RESET,
627  AMDSMI_EVENT_ECC_EEPROM_RESET_FAILED,
628  AMDSMI_EVENT_ECC_EEPROM_APPEND,
629  AMDSMI_EVENT_ECC_THD_CHANGED,
630  AMDSMI_EVENT_ECC_DUP_ENTRIES,
631  AMDSMI_EVENT_ECC_EEPROM_WRONG_HDR,
632  AMDSMI_EVENT_ECC_EEPROM_WRONG_VER,
633 
634  AMDSMI_EVENT_ECC__MAX
635 } amdsmi_event_ecc_t;
636 
637 typedef enum {
638  AMDSMI_EVENT_PP_SET_DPM_POLICY_FAIL = 0,
639  AMDSMI_EVENT_PP_ACTIVATE_DPM_POLICY_FAIL,
640  AMDSMI_EVENT_PP_I2C_SLAVE_NOT_PRESENT,
641  AMDSMI_EVENT_PP_THROTTLER_EVENT,
642  AMDSMI_EVENT_PP__MAX
643 } amdsmi_event_pp_t;
644 
645 typedef enum {
646  AMDSMI_EVENT_SCHED_WORLD_SWITCH_FAIL = 0,
647  AMDSMI_EVENT_SCHED_DISABLE_AUTO_HW_SWITCH_FAIL,
648  AMDSMI_EVENT_SCHED_ENABLE_AUTO_HW_SWITCH_FAIL,
649  AMDSMI_EVENT_SCHED_GFX_SAVE_REG_FAIL,
650  AMDSMI_EVENT_SCHED_GFX_IDLE_REG_FAIL,
651 
652  AMDSMI_EVENT_SCHED_GFX_RUN_REG_FAIL,
653  AMDSMI_EVENT_SCHED_GFX_LOAD_REG_FAIL,
654  AMDSMI_EVENT_SCHED_GFX_INIT_REG_FAIL,
655  AMDSMI_EVENT_SCHED_MM_SAVE_REG_FAIL,
656  AMDSMI_EVENT_SCHED_MM_IDLE_REG_FAIL,
657 
658  AMDSMI_EVENT_SCHED_MM_RUN_REG_FAIL,
659  AMDSMI_EVENT_SCHED_MM_LOAD_REG_FAIL,
660  AMDSMI_EVENT_SCHED_MM_INIT_REG_FAIL,
661  AMDSMI_EVENT_SCHED_INIT_GPU_FAIL,
662  AMDSMI_EVENT_SCHED_RUN_GPU_FAIL,
663 
664  AMDSMI_EVENT_SCHED_SAVE_GPU_STATE_FAIL,
665  AMDSMI_EVENT_SCHED_LOAD_GPU_STATE_FAIL,
666  AMDSMI_EVENT_SCHED_IDLE_GPU_FAIL,
667  AMDSMI_EVENT_SCHED_FINI_GPU_FAIL,
668  AMDSMI_EVENT_SCHED_DEAD_VF,
669 
670  AMDSMI_EVENT_SCHED_EVENT_QUEUE_FULL,
671  AMDSMI_EVENT_SCHED_SHUTDOWN_VF_FAIL,
672  AMDSMI_EVENT_SCHED_RESET_VF_NUM_FAIL,
673  AMDSMI_EVENT_SCHED_IGNORE_EVENT,
674  AMDSMI_EVENT_SCHED_PF_SWITCH_FAIL,
675  AMDSMI_EVENT_SCHED__MAX
676 } amdsmi_event_sched_t;
677 
678 typedef enum {
679  AMDSMI_EVENT_VF_ATOMBIOS_INIT_FAIL = 0,
680  AMDSMI_EVENT_VF_NO_VBIOS,
681  AMDSMI_EVENT_VF_GPU_POST_ERROR,
682  AMDSMI_EVENT_VF_ATOMBIOS_GET_CLOCK_FAIL,
683  AMDSMI_EVENT_VF_FENCE_INIT_FAIL,
684  AMDSMI_EVENT_VF_AMDGPU_INIT_FAIL,
685  AMDSMI_EVENT_VF_IB_INIT_FAIL,
686  AMDSMI_EVENT_VF_AMDGPU_LATE_INIT_FAIL,
687  AMDSMI_EVENT_VF_ASIC_RESUME_FAIL,
688  AMDSMI_EVENT_VF_GPU_RESET_FAIL,
689  AMDSMI_EVENT_VF__MAX
690 } amdsmi_event_vf_max_t;
691 
692 typedef enum {
693  AMDSMI_EVENT_VBIOS_INVALID = 0,
694  AMDSMI_EVENT_VBIOS_IMAGE_MISSING,
695  AMDSMI_EVENT_VBIOS_CHECKSUM_ERR,
696  AMDSMI_EVENT_VBIOS_POST_FAIL,
697  AMDSMI_EVENT_VBIOS_READ_FAIL,
698 
699  AMDSMI_EVENT_VBIOS_READ_IMG_HEADER_FAIL,
700  AMDSMI_EVENT_VBIOS_READ_IMG_SIZE_FAIL,
701  AMDSMI_EVENT_VBIOS_GET_FW_INFO_FAIL,
702  AMDSMI_EVENT_VBIOS_GET_TBL_REVISION_FAIL,
703  AMDSMI_EVENT_VBIOS_PARSER_TBL_FAIL,
704 
705  AMDSMI_EVENT_VBIOS_IP_DISCOVERY_FAIL,
706  AMDSMI_EVENT_VBIOS_TIMEOUT,
707  AMDSMI_EVENT_VBIOS_HASH_INVALID,
708  AMDSMI_EVENT_VBIOS_HASH_UPDATED,
709  AMDSMI_EVENT_VBIOS_IP_DISCOVERY_BINARY_CHECKSUM_FAIL,
710  AMDSMI_EVENT_VBIOS_IP_DISCOVERY_TABLE_CHECKSUM_FAIL,
711  AMDSMI_EVENT_VBIOS__MAX
712 } amdsmi_event_vbios_t;
713 
714 typedef enum {
715  AMDSMI_EVENT_GUARD_RESET_FAIL = 0,
716  AMDSMI_EVENT_GUARD_EVENT_OVERFLOW,
717  AMDSMI_EVENT_GUARD__MAX
718 } amdsmi_event_guard_t;
719 
720 typedef enum {
721  AMDSMI_EVENT_GPUMON_INVALID_OPTION = 0,
722  AMDSMI_EVENT_GPUMON_INVALID_VF_INDEX,
723  AMDSMI_EVENT_GPUMON_INVALID_FB_SIZE,
724  AMDSMI_EVENT_GPUMON_NO_SUITABLE_SPACE,
725  AMDSMI_EVENT_GPUMON_NO_AVAILABLE_SLOT,
726 
727  AMDSMI_EVENT_GPUMON_OVERSIZE_ALLOCATION,
728  AMDSMI_EVENT_GPUMON_OVERLAPPING_FB,
729  AMDSMI_EVENT_GPUMON_INVALID_GFX_TIMESLICE,
730  AMDSMI_EVENT_GPUMON_INVALID_MM_TIMESLICE,
731  AMDSMI_EVENT_GPUMON_INVALID_GFX_PART,
732 
733  AMDSMI_EVENT_GPUMON_VF_BUSY,
734  AMDSMI_EVENT_GPUMON_INVALID_VF_NUM,
735  AMDSMI_EVENT_GPUMON_NOT_SUPPORTED,
736  AMDSMI_EVENT_GPUMON__MAX
737 } amdsmi_event_gpumon_t;
738 
739 typedef enum {
740  AMDSMI_EVENT_MMSCH_IGNORED_JOB = 0,
741  AMDSMI_EVENT_MMSCH_UNSUPPORTED_VCN_FW,
742  AMDSMI_EVENT_MMSCH__MAX
743 } amdsmi_event_mmsch_t;
744 
745 typedef enum {
746  AMDSMI_EVENT_XGMI_TOPOLOGY_UPDATE_FAILED = 0,
747  AMDSMI_EVENT_XGMI_TOPOLOGY_HW_INIT_UPDATE,
748  AMDSMI_EVENT_XGMI_TOPOLOGY_UPDATE_DONE,
749  AMDSMI_EVENT_XGMI_FB_SHARING_SETTING_ERROR,
750  AMDSMI_EVENT_XGMI_FB_SHARING_SETTING_RESET,
751  AMDSMI_EVENT_XGMI__MAX
752 } amdsmi_event_xgmi_t;
753 
757 typedef enum {
758  AMDSMI_RAS_ECC_SUPPORT_PARITY = (1 << 0),
759  AMDSMI_RAS_ECC_SUPPORT_CORRECTABLE = (1 << 1),
760  AMDSMI_RAS_ECC_SUPPORT_UNCORRECTABLE = (1 << 2),
761  AMDSMI_RAS_ECC_SUPPORT_POISON = (1 << 3)
762 } amdsmi_ecc_correction_schema_support_t;
763 
768 typedef enum {
769  AMDSMI_GUEST_FW_ID_VCE = 0,
770  AMDSMI_GUEST_FW_ID_UVD,
771  AMDSMI_GUEST_FW_ID_MC,
772  AMDSMI_GUEST_FW_ID_ME,
773  AMDSMI_GUEST_FW_ID_PFP,
774  AMDSMI_GUEST_FW_ID_CE,
775  AMDSMI_GUEST_FW_ID_RLC,
776  AMDSMI_GUEST_FW_ID_RLC_SRLC,
777  AMDSMI_GUEST_FW_ID_RLC_SRLG,
778  AMDSMI_GUEST_FW_ID_RLC_SRLS,
779  AMDSMI_GUEST_FW_ID_MEC,
780  AMDSMI_GUEST_FW_ID_MEC2,
781  AMDSMI_GUEST_FW_ID_SOS,
782  AMDSMI_GUEST_FW_ID_ASD,
783  AMDSMI_GUEST_FW_ID_TA_RAS,
784  AMDSMI_GUEST_FW_ID_TA_XGMI,
785  AMDSMI_GUEST_FW_ID_SMC,
786  AMDSMI_GUEST_FW_ID_SDMA,
787  AMDSMI_GUEST_FW_ID_SDMA2,
788  AMDSMI_GUEST_FW_ID_VCN,
789  AMDSMI_GUEST_FW_ID_DMCU,
790  AMDSMI_GUEST_FW_ID__MAX
791 } amdsmi_guest_fw_engine_id_t;
792 
793 typedef enum {
794  AMDSMI_VF_CONFIG_FB_SIZE_SET = 0,
795  AMDSMI_VF_CONFIG_FB_OFFSET_SET,
796  AMDSMI_VF_CONFIG_GFX_TIMESLICE_US_SET,
797  AMDSMI_VF_CONFIG_ENG_COMPUTE_BW_SET,
798  AMDSMI_VF_CONFIG_GUARD_THRESHOLD_FLR_SET,
799  AMDSMI_VF_CONFIG_GUARD_THRESHOLD_EXCL_MOD_SET,
800  AMDSMI_VF_CONFIG_GUARD_THRESHOLD_EXCL_TIMEOUT_SET,
801  AMDSMI_VF_CONFIG_GUARD_THRESHOLD_ALL_INT_SET,
802  AMDSMI_VF_CONFIG_ENG_ENCODE_BW_UVD_SET,
803  AMDSMI_VF_CONFIG_ENG_ENCODE_BW_VCE_SET,
804  AMDSMI_VF_CONFIG_ENG_ENCODE_BW_UVD1_SET,
805  AMDSMI_VF_CONFIG_ENG_ENCODE_BW_VCN_SET,
806  AMDSMI_VF_CONFIG_ENG_ENCODE_BW_VCN1_SET,
807  AMDSMI_VF_CONFIG__MAX
808 } amdsmi_vf_config_flags_t;
809 
810 typedef enum {
811  AMDSMI_VF_STATE_UNAVAILABLE,
812  AMDSMI_VF_STATE_AVAILABLE,
813  AMDSMI_VF_STATE_ACTIVE,
814  AMDSMI_VF_STATE_SUSPENDED,
815  AMDSMI_VF_STATE_FULLACCESS,
816  AMDSMI_VF_STATE_DEFAULT_AVAILABLE
817 } amdsmi_vf_sched_state_t;
818 
819 typedef enum {
820  AMDSMI_GUARD_EVENT_FLR,
821  AMDSMI_GUARD_EVENT_EXCLUSIVE_MOD,
822  AMDSMI_GUARD_EVENT_EXCLUSIVE_TIMEOUT,
823  AMDSMI_GUARD_EVENT_ALL_INT,
824  AMDSMI_GUARD_EVENT_RAS_ERR_COUNT,
825  AMDSMI_GUARD_EVENT_RAS_CPER_DUMP,
826  AMDSMI_GUARD_EVENT_RAS_BAD_PAGES,
827  AMDSMI_GUARD_EVENT__MAX
828 } amdsmi_guard_type_t;
829 
830 typedef enum {
831  AMDSMI_DRIVER_LIBGV,
832  AMDSMI_DRIVER_KMD,
833  AMDSMI_DRIVER_AMDGPUV,
834  AMDSMI_DRIVER_AMDGPU,
835  AMDSMI_DRIVER_VMWGPUV,
836  AMDSMI_DRIVER__MAX
837 } amdsmi_driver_t;
838 
839 typedef enum {
840  AMDSMI_GUARD_STATE_NORMAL = 0,
841  AMDSMI_GUARD_STATE_FULL = 1,
842  AMDSMI_GUARD_STATE_OVERFLOW = 2,
843 } amdsmi_guard_state_t;
844 
845 typedef enum {
846  AMDSMI_SCHED_BLOCK_GFX = 0x0,
847  AMDSMI_SCHED_BLOCK_UVD = 0x1,
848  AMDSMI_SCHED_BLOCK_VCE = 0x2,
849  AMDSMI_SCHED_BLOCK_UVD1 = 0x3,
850  AMDSMI_SCHED_BLOCK_VCN = 0x4,
851  AMDSMI_SCHED_BLOCK_VCN1 = 0x5,
852 } amdsmi_sched_block_t;
853 
854 typedef enum {
855  GUEST_FW_LOAD_STATUS_OK = 0,
856  GUEST_FW_LOAD_STATUS_OBSOLETE_FW = 1,
857  GUEST_FW_LOAD_STATUS_BAD_SIG = 2,
858  GUEST_FW_LOAD_STATUS_FW_LOAD_FAIL = 3,
859  GUEST_FW_LOAD_STATUS_ERR_GENERIC = 4
860 } amdsmi_guest_fw_load_status_t;
861 
862 
863 typedef enum {
864  AMDSMI_LINK_STATUS_ENABLED = 0,
865  AMDSMI_LINK_STATUS_DISABLED = 1,
866  AMDSMI_LINK_STATUS_INACTIVE = 2,
867  AMDSMI_LINK_STATUS_ERROR = 3
868 } amdsmi_link_status_t;
869 
870 typedef enum {
871  AMDSMI_LINK_TYPE_INTERNAL,
872  AMDSMI_LINK_TYPE_XGMI,
873  AMDSMI_LINK_TYPE_PCIE,
874  AMDSMI_LINK_TYPE_NOT_APPLICABLE,
875  AMDSMI_LINK_TYPE_UNKNOWN
876 } amdsmi_link_type_t;
877 
878 typedef enum {
879  AMDSMI_XGMI_FB_SHARING_MODE_CUSTOM = 0,
880  AMDSMI_XGMI_FB_SHARING_MODE_1 = 1,
881  AMDSMI_XGMI_FB_SHARING_MODE_2 = 2,
882  AMDSMI_XGMI_FB_SHARING_MODE_4 = 4,
883  AMDSMI_XGMI_FB_SHARING_MODE_8 = 8,
884  AMDSMI_XGMI_FB_SHARING_MODE_UNKNOWN = 0xFFFFFFFF
885 } amdsmi_xgmi_fb_sharing_mode_t;
886 
887 typedef enum {
888  AMDSMI_PROFILE_CAPABILITY_MEMORY = 0,
889  AMDSMI_PROFILE_CAPABILITY_ENCODE = 1,
890  AMDSMI_PROFILE_CAPABILITY_DECODE = 2,
891  AMDSMI_PROFILE_CAPABILITY_COMPUTE = 3,
892  AMDSMI_PROFILE_CAPABILITY__MAX,
893 } amdsmi_profile_capability_type_t;
894 
895 typedef enum {
896  AMDSMI_VRAM_TYPE_UNKNOWN = 0,
897  // HBM
898  AMDSMI_VRAM_TYPE_HBM = 1,
899  AMDSMI_VRAM_TYPE_HBM2 = 2,
900  AMDSMI_VRAM_TYPE_HBM2E = 3,
901  AMDSMI_VRAM_TYPE_HBM3 = 4,
902  AMDSMI_VRAM_TYPE_HBM3E = 5,
903  // DDR
904  AMDSMI_VRAM_TYPE_DDR2 = 10,
905  AMDSMI_VRAM_TYPE_DDR3 = 11,
906  AMDSMI_VRAM_TYPE_DDR4 = 12,
907  // GDDR
908  AMDSMI_VRAM_TYPE_GDDR1 = 17,
909  AMDSMI_VRAM_TYPE_GDDR2 = 18,
910  AMDSMI_VRAM_TYPE_GDDR3 = 19,
911  AMDSMI_VRAM_TYPE_GDDR4 = 20,
912  AMDSMI_VRAM_TYPE_GDDR5 = 21,
913  AMDSMI_VRAM_TYPE_GDDR6 = 22,
914  AMDSMI_VRAM_TYPE_GDDR7 = 23,
915 } amdsmi_vram_type_t;
916 
917 typedef enum {
918  AMDSMI_VRAM_VENDOR_SAMSUNG,
919  AMDSMI_VRAM_VENDOR_INFINEON,
920  AMDSMI_VRAM_VENDOR_ELPIDA,
921  AMDSMI_VRAM_VENDOR_ETRON,
922  AMDSMI_VRAM_VENDOR_NANYA,
923  AMDSMI_VRAM_VENDOR_HYNIX,
924  AMDSMI_VRAM_VENDOR_MOSEL,
925  AMDSMI_VRAM_VENDOR_WINBOND,
926  AMDSMI_VRAM_VENDOR_ESMT,
927  AMDSMI_VRAM_VENDOR_MICRON,
928  AMDSMI_VRAM_VENDOR_UNKNOWN
929 } amdsmi_vram_vendor_t;
930 
931 typedef enum {
932  AMDSMI_GPU_BLOCK_INVALID = 0,
934  AMDSMI_GPU_BLOCK_FIRST = (1 << 0),
935 
936  AMDSMI_GPU_BLOCK_UMC = AMDSMI_GPU_BLOCK_FIRST,
937  AMDSMI_GPU_BLOCK_SDMA = (1 << 1),
938  AMDSMI_GPU_BLOCK_GFX = (1 << 2),
939  AMDSMI_GPU_BLOCK_MMHUB = (1 << 3),
940  AMDSMI_GPU_BLOCK_ATHUB = (1 << 4),
941  AMDSMI_GPU_BLOCK_PCIE_BIF = (1 << 5),
942  AMDSMI_GPU_BLOCK_HDP = (1 << 6),
943  AMDSMI_GPU_BLOCK_XGMI_WAFL = (1 << 7),
944  AMDSMI_GPU_BLOCK_DF = (1 << 8),
945  AMDSMI_GPU_BLOCK_SMN = (1 << 9),
946  AMDSMI_GPU_BLOCK_SEM = (1 << 10),
947  AMDSMI_GPU_BLOCK_MP0 = (1 << 11),
948  AMDSMI_GPU_BLOCK_MP1 = (1 << 12),
949  AMDSMI_GPU_BLOCK_FUSE = (1 << 13),
950  AMDSMI_GPU_BLOCK_MCA = (1 << 14),
951  AMDSMI_GPU_BLOCK_VCN = (1 << 15),
952  AMDSMI_GPU_BLOCK_JPEG = (1 << 16),
953  AMDSMI_GPU_BLOCK_IH = (1 << 17),
954  AMDSMI_GPU_BLOCK_MPIO = (1 << 18),
955  AMDSMI_GPU_BLOCK_LAST = AMDSMI_GPU_BLOCK_MPIO,
956 } amdsmi_gpu_block_t;
957 
958 typedef enum {
959  AMDSMI_CARD_FORM_FACTOR_PCIE,
960  AMDSMI_CARD_FORM_FACTOR_OAM,
961  AMDSMI_CARD_FORM_FACTOR_CEM,
962  AMDSMI_CARD_FORM_FACTOR_UNKNOWN
963 } amdsmi_card_form_factor_t;
964 
965 
966 typedef enum {
967  AMDSMI_METRIC_CATEGORY_ACC_COUNTER,
968  AMDSMI_METRIC_CATEGORY_FREQUENCY,
969  AMDSMI_METRIC_CATEGORY_ACTIVITY,
970  AMDSMI_METRIC_CATEGORY_TEMPERATURE,
971  AMDSMI_METRIC_CATEGORY_POWER,
972  AMDSMI_METRIC_CATEGORY_ENERGY,
973  AMDSMI_METRIC_CATEGORY_THROTTLE,
974  AMDSMI_METRIC_CATEGORY_PCIE,
975  AMDSMI_METRIC_CATEGORY_UNKNOWN
976 } amdsmi_metric_category_t;
977 
978 typedef enum {
979  AMDSMI_METRIC_NAME_METRIC_ACC_COUNTER,
980  AMDSMI_METRIC_NAME_FW_TIMESTAMP,
981  AMDSMI_METRIC_NAME_CLK_GFX,
982  AMDSMI_METRIC_NAME_CLK_SOC,
983  AMDSMI_METRIC_NAME_CLK_MEM,
984  AMDSMI_METRIC_NAME_CLK_VCLK,
985  AMDSMI_METRIC_NAME_CLK_DCLK,
986 
987  AMDSMI_METRIC_NAME_USAGE_GFX,
988  AMDSMI_METRIC_NAME_USAGE_MEM,
989  AMDSMI_METRIC_NAME_USAGE_MM,
990  AMDSMI_METRIC_NAME_USAGE_VCN,
991  AMDSMI_METRIC_NAME_USAGE_JPEG,
992 
993  AMDSMI_METRIC_NAME_VOLT_GFX,
994  AMDSMI_METRIC_NAME_VOLT_SOC,
995  AMDSMI_METRIC_NAME_VOLT_MEM,
996 
997  AMDSMI_METRIC_NAME_TEMP_HOTSPOT_CURR,
998  AMDSMI_METRIC_NAME_TEMP_HOTSPOT_LIMIT,
999  AMDSMI_METRIC_NAME_TEMP_MEM_CURR,
1000  AMDSMI_METRIC_NAME_TEMP_MEM_LIMIT,
1001  AMDSMI_METRIC_NAME_TEMP_VR_CURR,
1002  AMDSMI_METRIC_NAME_TEMP_SHUTDOWN,
1003 
1004  AMDSMI_METRIC_NAME_POWER_CURR,
1005  AMDSMI_METRIC_NAME_POWER_LIMIT,
1006 
1007  AMDSMI_METRIC_NAME_ENERGY_SOCKET,
1008  AMDSMI_METRIC_NAME_ENERGY_CCD,
1009  AMDSMI_METRIC_NAME_ENERGY_XCD,
1010  AMDSMI_METRIC_NAME_ENERGY_AID,
1011  AMDSMI_METRIC_NAME_ENERGY_MEM,
1012 
1013  AMDSMI_METRIC_NAME_THROTTLE_SOCKET_ACTIVE,
1014  AMDSMI_METRIC_NAME_THROTTLE_VR_ACTIVE,
1015  AMDSMI_METRIC_NAME_THROTTLE_MEM_ACTIVE,
1016 
1017  AMDSMI_METRIC_NAME_PCIE_BANDWIDTH,
1018  AMDSMI_METRIC_NAME_PCIE_L0_TO_RECOVERY_COUNT,
1019  AMDSMI_METRIC_NAME_PCIE_REPLAY_COUNT,
1020  AMDSMI_METRIC_NAME_PCIE_REPLAY_ROLLOVER_COUNT,
1021  AMDSMI_METRIC_NAME_PCIE_NAK_SENT_COUNT,
1022  AMDSMI_METRIC_NAME_PCIE_NAK_RECEIVED_COUNT,
1023 
1024  AMDSMI_METRIC_NAME_CLK_GFX_MAX_LIMIT,
1025  AMDSMI_METRIC_NAME_CLK_SOC_MAX_LIMIT,
1026  AMDSMI_METRIC_NAME_CLK_MEM_MAX_LIMIT,
1027  AMDSMI_METRIC_NAME_CLK_VCLK_MAX_LIMIT,
1028  AMDSMI_METRIC_NAME_CLK_DCLK_MAX_LIMIT,
1029 
1030  AMDSMI_METRIC_NAME_CLK_GFX_MIN_LIMIT,
1031  AMDSMI_METRIC_NAME_CLK_SOC_MIN_LIMIT,
1032  AMDSMI_METRIC_NAME_CLK_MEM_MIN_LIMIT,
1033  AMDSMI_METRIC_NAME_CLK_VCLK_MIN_LIMIT,
1034  AMDSMI_METRIC_NAME_CLK_DCLK_MIN_LIMIT,
1035 
1036  AMDSMI_METRIC_NAME_CLK_GFX_LOCKED,
1037 
1038  AMDSMI_METRIC_NAME_CLK_GFX_DS_DISABLED,
1039  AMDSMI_METRIC_NAME_CLK_MEM_DS_DISABLED,
1040  AMDSMI_METRIC_NAME_CLK_SOC_DS_DISABLED,
1041  AMDSMI_METRIC_NAME_CLK_VCLK_DS_DISABLED,
1042  AMDSMI_METRIC_NAME_CLK_DCLK_DS_DISABLED,
1043 
1044  AMDSMI_METRIC_NAME_PCIE_LINK_SPEED,
1045  AMDSMI_METRIC_NAME_PCIE_LINK_WIDTH,
1046 
1047  AMDSMI_METRIC_NAME_DRAM_BANDWIDTH,
1048  AMDSMI_METRIC_NAME_MAX_DRAM_BANDWIDTH,
1049 
1050  AMDSMI_METRIC_NAME_UNKNOWN
1051 } amdsmi_metric_name_t;
1052 
1053 typedef enum {
1054  AMDSMI_METRIC_UNIT_COUNTER,
1055  AMDSMI_METRIC_UNIT_UINT,
1056  AMDSMI_METRIC_UNIT_BOOL,
1057  AMDSMI_METRIC_UNIT_MHZ,
1058  AMDSMI_METRIC_UNIT_PERCENT,
1059  AMDSMI_METRIC_UNIT_MILLIVOLT,
1060  AMDSMI_METRIC_UNIT_CELSIUS,
1061  AMDSMI_METRIC_UNIT_WATT,
1062  AMDSMI_METRIC_UNIT_JOULE,
1063  AMDSMI_METRIC_UNIT_GBPS,
1064  AMDSMI_METRIC_UNIT_MBITPS,
1065  AMDSMI_METRIC_UNIT_PCIE_GEN,
1066  AMDSMI_METRIC_UNIT_PCIE_LANES,
1067  AMDSMI_METRIC_UNIT_UNKNOWN
1068 } amdsmi_metric_unit_t;
1069 
1070 typedef enum {
1071  AMDSMI_METRIC_TYPE_COUNTER = (1 << 0),
1072  AMDSMI_METRIC_TYPE_CHIPLET = (1 << 1),
1073  AMDSMI_METRIC_TYPE_INST = (1 << 2),
1074  AMDSMI_METRIC_TYPE_ACC = (1 << 3)
1075 } amdsmi_metric_type_t;
1076 
1077 typedef enum {
1078  AMDSMI_METRIC_RES_GROUP_UNKNOWN,
1079  AMDSMI_METRIC_RES_GROUP_NA,
1080  AMDSMI_METRIC_RES_GROUP_GPU,
1081  AMDSMI_METRIC_RES_GROUP_XCP,
1082  AMDSMI_METRIC_RES_GROUP_AID,
1083  AMDSMI_METRIC_RES_GROUP_MID
1084 } amdsmi_metric_res_group_t;
1085 
1086 typedef enum {
1087  AMDSMI_METRIC_RES_SUBGROUP_UNKNOWN,
1088  AMDSMI_METRIC_RES_SUBGROUP_NA,
1089  AMDSMI_METRIC_RES_SUBGROUP_XCC,
1090  AMDSMI_METRIC_RES_SUBGROUP_ENGINE
1091 } amdsmi_metric_res_subgroup_t;
1092 
1097 typedef enum {
1098  AMDSMI_MEMORY_PARTITION_UNKNOWN = 0,
1099  AMDSMI_MEMORY_PARTITION_NPS1 = 1,
1101  AMDSMI_MEMORY_PARTITION_NPS2 = 2,
1104  AMDSMI_MEMORY_PARTITION_NPS4 = 4,
1107  AMDSMI_MEMORY_PARTITION_NPS8 = 8,
1112 } amdsmi_memory_partition_type_t;
1113 
1114 typedef enum {
1115  AMDSMI_ACCELERATOR_PARTITION_INVALID = 0,
1116  AMDSMI_ACCELERATOR_PARTITION_SPX,
1118  AMDSMI_ACCELERATOR_PARTITION_DPX,
1120  AMDSMI_ACCELERATOR_PARTITION_TPX,
1122  AMDSMI_ACCELERATOR_PARTITION_QPX,
1124  AMDSMI_ACCELERATOR_PARTITION_CPX,
1126  AMDSMI_ACCELERATOR_PARTITION_MAX
1127 } amdsmi_accelerator_partition_type_t;
1128 
1129 typedef enum {
1130  AMDSMI_ACCELERATOR_XCC,
1131  AMDSMI_ACCELERATOR_ENCODER,
1132  AMDSMI_ACCELERATOR_DECODER,
1133  AMDSMI_ACCELERATOR_DMA,
1134  AMDSMI_ACCELERATOR_JPEG,
1135  AMDSMI_ACCELERATOR_MAX
1136 } amdsmi_accelerator_partition_resource_type_t;
1137 
1138 typedef enum {
1139  AMDSMI_DRIVER_MODEL_TYPE_WDDM = 0,
1140  AMDSMI_DRIVER_MODEL_TYPE_WDM = 1,
1141  AMDSMI_DRIVER_MODEL_TYPE_MCDM = 2,
1142  AMDSMI_DRIVER_MODEL_TYPE__MAX = 3,
1143 } amdsmi_driver_model_type_t;
1144 
1145 typedef enum {
1146  AMDSMI_VIRTUALIZATION_MODE_UNKNOWN = 0,
1147  AMDSMI_VIRTUALIZATION_MODE_NONE,
1148  AMDSMI_VIRTUALIZATION_MODE_HOST,
1149 
1150  AMDSMI_VIRTUALIZATION_MODE_GUEST,
1151  AMDSMI_VIRTUALIZATION_MODE_PASSTHROUGH
1152 } amdsmi_virtualization_mode_t;
1153 
1154 typedef enum {
1155  AMDSMI_AFFINITY_SCOPE_NODE = 0, // Memory affinity as numa node
1156  AMDSMI_AFFINITY_SCOPE_SOCKET = 1, // socket affinity
1157 } amdsmi_affinity_scope_t;
1158 
1163 typedef union {
1164  struct bdf_ {
1165  uint64_t function_number : 3;
1166  uint64_t device_number : 5;
1167  uint64_t bus_number : 8;
1168  uint64_t domain_number : 48;
1169  } bdf;
1170  uint64_t as_uint;
1171 } amdsmi_bdf_t;
1172 
1173 typedef struct {
1174  struct pcie_static_ {
1175  uint16_t max_pcie_width;
1176  uint32_t max_pcie_speed;
1177  uint32_t pcie_interface_version;
1178  amdsmi_card_form_factor_t slot_type;
1179  uint32_t max_pcie_interface_version;
1180  uint64_t reserved[9];
1181  } pcie_static;
1182  struct pcie_metric_ {
1183  uint16_t pcie_width;
1184  uint32_t pcie_speed;
1185  uint32_t pcie_bandwidth;
1186  uint64_t pcie_replay_count;
1187  uint64_t pcie_l0_to_recovery_count;
1188  uint64_t pcie_replay_roll_over_count;
1189  uint64_t pcie_nak_sent_count;
1190  uint64_t pcie_nak_received_count;
1191  uint32_t pcie_lc_perf_other_end_recovery_count;
1192  uint64_t reserved[12];
1193  } pcie_metric;
1194  uint64_t reserved[32];
1195 } amdsmi_pcie_info_t;
1196 
1197 
1198 typedef struct {
1199  uint64_t power_cap;
1200  uint64_t default_power_cap;
1201  uint64_t dpm_cap;
1202  uint64_t min_power_cap;
1203  uint64_t max_power_cap;
1204  uint64_t reserved[3];
1205 } amdsmi_power_cap_info_t;
1206 
1207 typedef struct {
1208  char name[AMDSMI_MAX_STRING_LENGTH];
1209  char build_date[AMDSMI_MAX_DATE_LENGTH];
1210  char part_number[AMDSMI_MAX_STRING_LENGTH];
1211  char version[AMDSMI_MAX_STRING_LENGTH];
1212  uint64_t reserved[68];
1213 } amdsmi_vbios_info_t;
1214 
1215 typedef struct {
1216  uint32_t num_cache_types;
1217  struct cache_ {
1218  uint32_t cache_properties;
1219  uint32_t cache_size; /* In KB */
1220  uint32_t cache_level;
1221  uint32_t max_num_cu_shared; /* Indicates how many Compute Units share this cache instance */
1222  uint32_t num_cache_instance; /* total number of instance of this cache type */
1223  uint32_t reserved[3];
1224  } cache[AMDSMI_MAX_CACHE_TYPES];
1225  uint32_t reserved[15];
1226 } amdsmi_gpu_cache_info_t;
1227 
1228 typedef struct {
1229  uint8_t num_fw_info;
1230  struct {
1231  amdsmi_fw_block_t fw_id;
1232  uint64_t fw_version;
1233  uint64_t reserved[2];
1234  } fw_info_list[AMDSMI_FW_ID__MAX];
1235  uint64_t reserved[3];
1236 } amdsmi_fw_info_t;
1237 
1238 typedef struct {
1239  char market_name[AMDSMI_MAX_STRING_LENGTH];
1240  char vendor_name[AMDSMI_MAX_STRING_LENGTH];
1241  char asic_serial[AMDSMI_MAX_STRING_LENGTH];
1242  uint64_t reserved[64];
1243  uint32_t vendor_id;
1244  uint32_t subvendor_id;
1245  uint64_t device_id;
1246  uint32_t rev_id;
1247  uint32_t oam_id;
1248  uint32_t num_of_compute_units; //< 0xFFFFFFFF if not supported
1249  uint64_t target_graphics_version; //< 0xFFFFFFFFFFFFFFFF if not supported
1250  uint32_t subsystem_id;
1251  uint64_t reserved_2[10];
1252 } amdsmi_asic_info_t;
1253 
1254 typedef struct {
1255  char driver_version[AMDSMI_MAX_STRING_LENGTH];
1256  char driver_date[AMDSMI_MAX_DATE_LENGTH];
1257  char driver_name[AMDSMI_MAX_STRING_LENGTH];
1258  uint64_t reserved[68];
1259 } amdsmi_driver_info_t;
1260 
1261 typedef struct {
1262  uint64_t socket_power;
1263  uint64_t gfx_voltage;
1264  uint64_t soc_voltage;
1265  uint64_t mem_voltage;
1266  uint64_t reserved[4];
1267 } amdsmi_power_info_t;
1268 
1269 typedef struct {
1270  uint32_t gfx_activity;
1271  uint32_t umc_activity;
1272  uint32_t mm_activity;
1273  uint64_t reserved[6];
1274 } amdsmi_engine_usage_t;
1275 
1276 typedef struct {
1277  uint32_t clk;
1278  uint32_t min_clk;
1279  uint32_t max_clk;
1280  uint8_t clk_locked;
1281  uint8_t clk_deep_sleep;
1282  uint64_t reserved[2];
1283 } amdsmi_clk_info_t;
1284 
1285 typedef struct {
1286  uint64_t correctable_count;
1287  uint64_t uncorrectable_count;
1288  uint64_t deferred_count;
1289  uint64_t reserved[5];
1290 } amdsmi_error_count_t;
1291 
1292 typedef struct {
1293  uint32_t ras_eeprom_version;
1294  uint32_t supported_ecc_correction_schema;
1295  uint64_t reserved[3];
1296 } amdsmi_ras_feature_t;
1297 
1298 typedef struct {
1299  uint64_t handle;
1300 } amdsmi_vf_handle_t;
1301 
1302 typedef struct {
1303  amdsmi_vf_handle_t fcn_id;
1304  uint64_t dev_id;
1305  uint64_t timestamp;
1306  uint64_t data;
1307  uint32_t category;
1308  uint32_t subcode;
1309  uint32_t level;
1310  char date[AMDSMI_MAX_DATE_LENGTH];
1311  char message[AMDSMI_EVENT_MSG_SIZE];
1312  uint64_t reserved[6];
1313 } amdsmi_event_entry_t;
1314 
1315 typedef struct {
1316  char model_number[AMDSMI_MAX_STRING_LENGTH];
1317  char product_serial[AMDSMI_MAX_STRING_LENGTH];
1318  char fru_id[AMDSMI_MAX_STRING_LENGTH];
1319  char product_name[AMDSMI_MAX_STRING_LENGTH];
1320  char manufacturer_name[AMDSMI_MAX_STRING_LENGTH];
1321  uint64_t reserved[64];
1322 } amdsmi_board_info_t;
1323 
1324 typedef struct {
1325  uint32_t total_fb_size;
1326  uint32_t pf_fb_reserved;
1327  uint32_t pf_fb_offset;
1328  uint32_t fb_alignment;
1329  uint32_t max_vf_fb_usable;
1330  uint32_t min_vf_fb_usable;
1331  uint64_t reserved[5];
1332 } amdsmi_pf_fb_info_t;
1333 
1334 typedef struct {
1335  uint32_t fb_offset;
1336  uint32_t fb_size;
1337  uint64_t reserved[3];
1338 } amdsmi_vf_fb_info_t;
1339 
1340 typedef struct {
1341  amdsmi_vf_handle_t id;
1342  amdsmi_vf_fb_info_t fb;
1343  uint64_t reserved[3];
1344 } amdsmi_partition_info_t;
1345 
1346 typedef struct {
1347  uint8_t enabled;
1348  struct {
1349  amdsmi_guard_state_t state;
1350  /* amount of monitor event after enabled */
1351  uint32_t amount;
1352  /* threshold of events in the interval(seconds) */
1353  uint64_t interval;
1354  uint32_t threshold;
1355  /* current number of events in the interval*/
1356  uint32_t active;
1357  } guard[AMDSMI_GUARD_EVENT__MAX];
1358 } amdsmi_guard_info_t;
1359 
1360 typedef struct {
1361  amdsmi_vf_fb_info_t fb;
1362  uint32_t gfx_timeslice;
1363  uint64_t reserved[27];
1364 } amdsmi_vf_info_t;
1365 
1366 typedef struct {
1367  uint64_t flr_count;
1368  uint64_t boot_up_time;
1369  uint64_t shutdown_time;
1370  uint64_t reset_time;
1371  amdsmi_vf_sched_state_t state;
1372  char last_boot_start[AMDSMI_MAX_DATE_LENGTH];
1373  char last_boot_end[AMDSMI_MAX_DATE_LENGTH];
1374  char last_shutdown_start[AMDSMI_MAX_DATE_LENGTH];
1375  char last_shutdown_end[AMDSMI_MAX_DATE_LENGTH];
1376  char last_reset_start[AMDSMI_MAX_DATE_LENGTH];
1377  char last_reset_end[AMDSMI_MAX_DATE_LENGTH];
1378  char current_active_time[AMDSMI_MAX_DATE_LENGTH];
1379  char current_running_time[AMDSMI_MAX_DATE_LENGTH];
1380  char total_active_time[AMDSMI_MAX_DATE_LENGTH];
1381  char total_running_time[AMDSMI_MAX_DATE_LENGTH];
1382  uint64_t reserved[11];
1383 } amdsmi_sched_info_t;
1384 
1385 typedef struct {
1386  amdsmi_sched_info_t sched;
1387  amdsmi_guard_info_t guard;
1388  uint64_t reserved[8];
1389 } amdsmi_vf_data_t;
1390 
1391 typedef struct {
1392  uint64_t total;
1393  uint64_t available;
1394  uint64_t optimal;
1395  uint64_t min_value;
1396  uint64_t max_value;
1397  uint64_t reserved[2];
1398 } amdsmi_profile_caps_info_t;
1399 
1400 typedef struct {
1401  uint8_t profile_count;
1402  uint8_t current_profile_index;
1403  struct {
1404  uint32_t vf_count;
1405  amdsmi_profile_caps_info_t profile_caps[AMDSMI_PROFILE_CAPABILITY__MAX];
1406  } profiles[AMDSMI_MAX_PROFILE_COUNT];
1407  uint32_t reserved[6];
1408 } amdsmi_profile_info_t;
1409 
1410 typedef struct {
1411  char driver_version[AMDSMI_MAX_DRIVER_INFO_RSVD];
1412  uint32_t fb_usage;
1413  uint64_t reserved[23];
1414 } amdsmi_guest_data_t;
1415 
1416 typedef struct {
1417  uint32_t dfc_fw_version;
1418  uint32_t dfc_fw_total_entries;
1419  uint32_t dfc_gart_wr_guest_min;
1420  uint32_t dfc_gart_wr_guest_max;
1421  uint32_t reserved[12];
1422 } amdsmi_dfc_fw_header_t;
1423 
1424 typedef struct {
1425  uint32_t oldest;
1426  uint32_t latest;
1427 } amdsmi_dfc_fw_white_list_t;
1428 
1429 typedef struct {
1430  uint8_t ta_uuid[AMDSMI_MAX_UUID_ELEMENTS];
1431 } amdsmi_dfc_fw_ta_uuid_t;
1432 
1433 typedef struct {
1434  uint32_t dfc_fw_type;
1435  uint32_t verification_enabled;
1436  uint32_t customer_ordinal;
1437  uint32_t reserved[13];
1438  union {
1439  amdsmi_dfc_fw_white_list_t white_list[AMDSMI_MAX_WHITE_LIST_ELEMENTS];
1440  amdsmi_dfc_fw_ta_uuid_t ta_white_list[AMDSMI_MAX_TA_WHITE_LIST_ELEMENTS];
1441  };
1442  uint32_t black_list[AMDSMI_MAX_BLACK_LIST_ELEMENTS];
1443 } amdsmi_dfc_fw_data_t;
1444 
1445 typedef struct {
1446  amdsmi_dfc_fw_header_t header;
1447  amdsmi_dfc_fw_data_t data[AMDSMI_DFC_FW_NUMBER_OF_ENTRIES];
1448 } amdsmi_dfc_fw_t;
1449 
1450 typedef struct {
1451  uint64_t retired_page;
1452  uint64_t ts;
1453  unsigned char err_type;
1454  union {
1455  unsigned char bank;
1456  unsigned char cu;
1457  };
1458  unsigned char mem_channel;
1459  unsigned char mcumc_id;
1460  uint32_t reserved[3];
1461 } amdsmi_eeprom_table_record_t;
1462 
1463 typedef struct {
1464  uint64_t timestamp;
1465  uint32_t vf_idx;
1466  uint32_t fw_id;
1467  uint16_t status;
1468  uint32_t reserved[3];
1469 } amdsmi_fw_load_error_record_t;
1470 
1471 typedef struct {
1472  uint8_t num_err_records;
1473  amdsmi_fw_load_error_record_t err_records[AMDSMI_MAX_ERR_RECORDS];
1474  uint64_t reserved[7];
1475 } amdsmi_fw_error_record_t;
1476 
1477 typedef struct {
1478  uint32_t num_links;
1479  struct links_ {
1480  amdsmi_bdf_t bdf;
1481  uint32_t bit_rate;
1482  uint32_t max_bandwidth;
1483  amdsmi_link_type_t link_type;
1484  uint64_t read;
1485  uint64_t write;
1486  amdsmi_link_status_t link_status;
1487  uint64_t reserved[1];
1488  } links[AMDSMI_MAX_NUM_XGMI_PHYSICAL_LINK];
1489  uint64_t reserved[7];
1490 } amdsmi_link_metrics_t;
1491 
1492 typedef struct {
1493  uint64_t weight;
1494  amdsmi_link_status_t link_status;
1495  amdsmi_link_type_t link_type;
1496  uint8_t num_hops;
1497  uint8_t fb_sharing;
1498  uint32_t reserved[10];
1499 } amdsmi_link_topology_t;
1500 
1501 typedef struct {
1502  uint32_t count;
1503  amdsmi_processor_handle processor_list[AMDSMI_MAX_DEVICES];
1504  uint64_t reserved[15];
1505 } amdsmi_topology_nearest_t;
1506 
1507 typedef union {
1508  struct cap_ {
1509  uint32_t mode_custom_cap :1;
1510  uint32_t mode_1_cap :1;
1511  uint32_t mode_2_cap :1;
1512  uint32_t mode_4_cap :1;
1513  uint32_t mode_8_cap :1;
1514  uint32_t reserved :27;
1515  } cap;
1516  uint32_t xgmi_fb_sharing_cap_mask;
1517 } amdsmi_xgmi_fb_sharing_caps_t;
1518 
1519 typedef struct {
1520  amdsmi_vram_type_t vram_type;
1521  amdsmi_vram_vendor_t vram_vendor;
1522  uint32_t vram_size;
1523  uint32_t vram_bit_width;
1524  uint64_t reserved[6];
1525 } amdsmi_vram_info_t;
1526 
1527 typedef struct {
1528  amdsmi_metric_unit_t unit;
1529  amdsmi_metric_name_t name;
1530  amdsmi_metric_category_t category;
1531  uint32_t flags;
1532  uint32_t vf_mask;
1533  uint64_t val;
1534  amdsmi_metric_res_group_t res_group;
1535  amdsmi_metric_res_subgroup_t res_subgroup;
1536  uint32_t res_instance;
1537  uint32_t reserved[5];
1538 } amdsmi_metric_t;
1539 
1543 typedef struct {
1544  uint32_t major;
1545  uint32_t minor;
1546  uint32_t release;
1547 } amdsmi_version_t;
1548 
1552 typedef union {
1553  struct nps_flags_{
1554  uint32_t nps1_cap :1; // bool 1 = true; 0 = false;
1555  uint32_t nps2_cap :1; // bool 1 = true; 0 = false;
1556  uint32_t nps4_cap :1; // bool 1 = true; 0 = false;
1557  uint32_t nps8_cap :1; // bool 1 = true; 0 = false;
1558  uint32_t reserved :28; // bool 1 = true; 0 = false;
1559  } nps_flags;
1560  uint32_t nps_cap_mask;
1561 } amdsmi_nps_caps_t;
1562 
1563 typedef struct {
1564  amdsmi_nps_caps_t partition_caps;
1565  amdsmi_memory_partition_type_t mp_mode;
1566  uint32_t num_numa_ranges;
1567  struct numa_range_ {
1568  amdsmi_vram_type_t memory_type;
1569  uint64_t start;
1570  uint64_t end;
1571  } numa_range[AMDSMI_MAX_NUM_NUMA_NODES];
1572  uint64_t reserved[11];
1573 } amdsmi_memory_partition_config_t;
1574 
1575 typedef struct {
1576  amdsmi_accelerator_partition_type_t profile_type;
1577  uint32_t num_partitions;
1578  amdsmi_nps_caps_t memory_caps;
1579  uint32_t profile_index;
1580  uint32_t num_resources;
1581  uint32_t resources[AMDSMI_MAX_ACCELERATOR_PARTITIONS][AMDSMI_MAX_CP_PROFILE_RESOURCES];
1582  uint64_t reserved[13];
1583 } amdsmi_accelerator_partition_profile_t;
1584 
1585 typedef struct {
1586  uint32_t profile_index;
1587  amdsmi_accelerator_partition_resource_type_t resource_type;
1588  uint32_t partition_resource;
1589  uint32_t num_partitions_share_resource;
1590  uint64_t reserved[6];
1591 } amdsmi_accelerator_partition_resource_profile_t;
1592 
1593 typedef struct {
1594  uint32_t num_profiles;
1595  uint32_t num_resource_profiles;
1596  amdsmi_accelerator_partition_resource_profile_t resource_profiles[AMDSMI_MAX_CP_PROFILE_RESOURCES];
1597  uint32_t default_profile_index;
1598  amdsmi_accelerator_partition_profile_t profiles[AMDSMI_MAX_ACCELERATOR_PROFILE];
1599  uint64_t reserved[30];
1600 } amdsmi_accelerator_partition_profile_config_t;
1601 
1602 typedef struct {
1603  uint32_t policy_id;
1604  char policy_description[AMDSMI_MAX_NAME];
1605  uint64_t reserved[3];
1606 } amdsmi_dpm_policy_entry_t;
1607 
1608 typedef struct {
1612  uint32_t num_supported;
1613 
1617  uint32_t cur;
1618 
1623  amdsmi_dpm_policy_entry_t policies[AMDSMI_MAX_NUM_PM_POLICIES];
1624  uint64_t reserved[7];
1625 } amdsmi_dpm_policy_t;
1626 
1627 #pragma pack(push, 1)
1628 
1629 typedef struct {
1630  unsigned char b[16];
1631 } amdsmi_cper_guid_t;
1632 
1633 typedef enum {
1634  AMDSMI_CPER_SEV_NON_FATAL_UNCORRECTED = 0,
1635  AMDSMI_CPER_SEV_FATAL = 1,
1636  AMDSMI_CPER_SEV_NON_FATAL_CORRECTED = 2,
1637  AMDSMI_CPER_SEV_NUM = 3,
1638 
1639  AMDSMI_CPER_SEV_UNUSED = 10,
1640 } amdsmi_cper_sev_t;
1641 
1642 typedef struct {
1643  uint8_t seconds;
1644  uint8_t minutes;
1645  uint8_t hours;
1646  uint8_t flag;
1647  uint8_t day;
1648  uint8_t month;
1649  uint8_t year;
1650  uint8_t century;
1651 } amdsmi_cper_timestamp_t;
1652 
1653 typedef union {
1654  struct valid_bits_ {
1655  uint32_t platform_id : 1;
1656  uint32_t timestamp : 1;
1657  uint32_t partition_id : 1;
1658  uint32_t reserved : 29;
1659  } valid_bits;
1660  uint32_t valid_mask;
1661 } amdsmi_cper_valid_bits_t;
1662 
1663 typedef struct {
1664  char signature[4]; /* "CPER" */
1665  uint16_t revision;
1666  uint32_t signature_end; /* 0xFFFFFFFF */
1667  uint16_t sec_cnt;
1668  amdsmi_cper_sev_t error_severity;
1669  amdsmi_cper_valid_bits_t cper_valid_bits;
1670  uint32_t record_length; /* Total size of CPER Entry */
1671  amdsmi_cper_timestamp_t timestamp;
1672  char platform_id[16];
1673  amdsmi_cper_guid_t partition_id; /* Reserved */
1674  char creator_id[16];
1675  amdsmi_cper_guid_t notify_type; /* CMC, MCE */
1676  char record_id[8]; /* Unique CPER Entry ID */
1677  uint32_t flags; /* Reserved */
1678  uint64_t persistence_info; /* Reserved */
1679  uint8_t reserved[12]; /* Reserved */
1680 } amdsmi_cper_hdr_t;
1681 
1682 typedef enum {
1683  AMDSMI_CPER_NOTIFY_TYPE_CMC = 0x450eBDD72DCE8BB1,
1684  AMDSMI_CPER_NOTIFY_TYPE_CPE = 0x4a55D8434E292F96,
1685  AMDSMI_CPER_NOTIFY_TYPE_MCE = 0x4cc5919CE8F56FFE,
1686  AMDSMI_CPER_NOTIFY_TYPE_PCIE = 0x4dfc1A16CF93C01F,
1687  AMDSMI_CPER_NOTIFY_TYPE_INIT = 0x454a9308CC5263E8,
1688  AMDSMI_CPER_NOTIFY_TYPE_NMI = 0x42c9B7E65BAD89FF,
1689  AMDSMI_CPER_NOTIFY_TYPE_BOOT = 0x409aAB403D61A466,
1690  AMDSMI_CPER_NOTIFY_TYPE_DMAR = 0x4c27C6B3667DD791,
1691  AMDSMI_CPER_NOTIFY_TYPE_SEA = 0x11E4BBE89A78788A,
1692  AMDSMI_CPER_NOTIFY_TYPE_SEI = 0x4E87B0AE5C284C81,
1693  AMDSMI_CPER_NOTIFY_TYPE_PEI = 0x4214520409A9D5AC,
1694  AMDSMI_CPER_NOTIFY_TYPE_CXL_COMPONENT = 0x49A341DF69293BC9,
1695 } amdsmi_cper_notify_type_t;
1696 
1697 #pragma pack(pop)
1698 
1699 typedef struct {
1700  uint8_t is_iolink_coherent;
1701  uint8_t is_iolink_atomics_32bit;
1702  uint8_t is_iolink_atomics_64bit;
1703  uint8_t is_iolink_dma;
1704  uint8_t is_iolink_bi_directional;
1705  uint64_t reserved[3];
1706 } amdsmi_p2p_capability_t;
1707 
1708 /*****************************************************************************/
1731 amdsmi_status_t amdsmi_init(uint64_t init_flags);
1732 
1739 amdsmi_status_t amdsmi_shut_down(void);
1740  // end of init
1742 
1743 /*****************************************************************************/
1767 amdsmi_status_t amdsmi_get_processor_handles(amdsmi_socket_handle socket_handle, uint32_t *processor_count, amdsmi_processor_handle *processor_handles);
1768 
1784 amdsmi_status_t amdsmi_get_processor_type(amdsmi_processor_handle processor_handle,
1785  processor_type_t *processor_type);
1786 
1800 amdsmi_status_t amdsmi_get_socket_handles(uint32_t *socket_count, amdsmi_socket_handle *socket_handles);
1801 
1815 amdsmi_status_t amdsmi_get_socket_info(amdsmi_socket_handle socket_handle, size_t len, char *name);
1816 
1827 amdsmi_status_t amdsmi_get_processor_handle_from_bdf(amdsmi_bdf_t bdf, amdsmi_processor_handle *processor_handle);
1828 
1839 amdsmi_status_t amdsmi_get_index_from_processor_handle(amdsmi_processor_handle processor_handle, uint32_t *processor_index);
1840 
1851 amdsmi_status_t amdsmi_get_vf_handle_from_bdf(amdsmi_bdf_t bdf, amdsmi_vf_handle_t *vf_handle);
1852 
1862 amdsmi_status_t amdsmi_get_gpu_device_bdf(amdsmi_processor_handle processor_handle, amdsmi_bdf_t *bdf);
1863 
1874 amdsmi_status_t amdsmi_get_processor_handle_from_index(uint32_t processor_index, amdsmi_processor_handle *processor_handle);
1875 
1885 amdsmi_status_t amdsmi_get_vf_bdf(amdsmi_vf_handle_t vf_handle, amdsmi_bdf_t *bdf);
1886 
1898 amdsmi_status_t amdsmi_get_vf_handle_from_vf_index(amdsmi_processor_handle processor_handle, uint32_t fcn_idx, amdsmi_vf_handle_t *vf_handle);
1899 
1910 amdsmi_status_t amdsmi_get_vf_handle_from_uuid(const char *uuid, amdsmi_vf_handle_t *vf_handle);
1911 
1922 amdsmi_status_t amdsmi_get_processor_handle_from_uuid(const char *uuid, amdsmi_processor_handle *processor_handle);
1923 
1938 amdsmi_status_t amdsmi_get_gpu_device_uuid(amdsmi_processor_handle processor_handle, unsigned int *uuid_length, char *uuid);
1939 
1954 amdsmi_status_t amdsmi_get_vf_uuid(amdsmi_vf_handle_t processor_handle, unsigned int *uuid_length, char *uuid);
1955 
1967  amdsmi_status_t amdsmi_get_gpu_virtualization_mode(amdsmi_processor_handle processor_handle, amdsmi_virtualization_mode_t *mode);
1968 
1994 amdsmi_status_t amdsmi_get_cpu_affinity_with_scope(amdsmi_processor_handle processor_handle,
1995  uint32_t cpu_set_size, uint64_t* cpu_set, amdsmi_affinity_scope_t scope);
1996  // end of discovery
1998 
1999 /*****************************************************************************/
2014 amdsmi_status_t amdsmi_get_gpu_driver_info(amdsmi_processor_handle processor_handle, amdsmi_driver_info_t *info);
2015 
2025 amdsmi_status_t amdsmi_get_gpu_driver_model(amdsmi_processor_handle processor_handle, amdsmi_driver_model_type_t *model);
2026 
2040 amdsmi_status_t amdsmi_get_lib_version(amdsmi_version_t *version); // end of swversion
2042 
2043 /*****************************************************************************/
2058 amdsmi_status_t amdsmi_get_gpu_asic_info(amdsmi_processor_handle processor_handle, amdsmi_asic_info_t *info);
2059 
2070 amdsmi_status_t amdsmi_get_gpu_vram_info(amdsmi_processor_handle processor_handle, amdsmi_vram_info_t *info);
2071 
2087 amdsmi_status_t amdsmi_get_power_cap_info(amdsmi_processor_handle processor_handle, uint32_t sensor_ind, amdsmi_power_cap_info_t *info);
2088 
2099 amdsmi_status_t amdsmi_get_pcie_info(amdsmi_processor_handle processor_handle, amdsmi_pcie_info_t *info);
2100 
2111 amdsmi_status_t amdsmi_get_fb_layout(amdsmi_processor_handle processor_handle, amdsmi_pf_fb_info_t *info);
2112  // end of asicinfo
2114 
2115 /*****************************************************************************/
2130 amdsmi_status_t amdsmi_get_gpu_vbios_info(amdsmi_processor_handle processor_handle, amdsmi_vbios_info_t *info);
2131 
2142 amdsmi_status_t amdsmi_get_gpu_board_info(amdsmi_processor_handle processor_handle, amdsmi_board_info_t *info);
2143 
2153 amdsmi_status_t amdsmi_get_fw_info(amdsmi_processor_handle processor_handle, amdsmi_fw_info_t *info);
2154 
2165 amdsmi_status_t amdsmi_get_fw_error_records(amdsmi_processor_handle processor_handle, amdsmi_fw_error_record_t *records);
2166 
2176 amdsmi_status_t amdsmi_get_dfc_fw_table(amdsmi_processor_handle processor_handle, amdsmi_dfc_fw_t *info);
2177  // end of fwinfo
2179 
2180 /*****************************************************************************/
2195 amdsmi_status_t amdsmi_get_gpu_activity(amdsmi_processor_handle processor_handle, amdsmi_engine_usage_t *info);
2196 
2212 amdsmi_status_t amdsmi_get_power_info(amdsmi_processor_handle processor_handle, uint32_t sensor_ind, amdsmi_power_info_t *info);
2213 
2233 amdsmi_status_t amdsmi_set_power_cap(amdsmi_processor_handle processor_handle, uint32_t sensor_ind, uint64_t cap);
2234 
2244 amdsmi_status_t amdsmi_is_gpu_power_management_enabled(amdsmi_processor_handle processor_handle, bool *enabled);
2245 
2263 amdsmi_status_t amdsmi_get_clock_info(amdsmi_processor_handle processor_handle, amdsmi_clk_type_t clk_type, amdsmi_clk_info_t *info);
2264 
2282 amdsmi_status_t amdsmi_get_temp_metric(amdsmi_processor_handle processor_handle, amdsmi_temperature_type_t sensor_type,
2283  amdsmi_temperature_metric_t metric, int64_t *temperature);
2284 
2295 amdsmi_status_t amdsmi_get_gpu_cache_info(amdsmi_processor_handle processor_handle, amdsmi_gpu_cache_info_t *info);
2296 
2311 amdsmi_status_t amdsmi_get_gpu_metrics(amdsmi_processor_handle processor_handle, uint32_t *metrics_size,
2312  amdsmi_metric_t *metrics);
2313 
2331 amdsmi_status_t amdsmi_get_soc_pstate(amdsmi_processor_handle processor_handle,
2332  amdsmi_dpm_policy_t *policy);
2333 
2351 amdsmi_status_t amdsmi_set_soc_pstate(amdsmi_processor_handle processor_handle,
2352  uint32_t policy_id);
2353  // end of gpumon
2355 
2356 /*****************************************************************************/
2372 amdsmi_status_t amdsmi_get_gpu_total_ecc_count(amdsmi_processor_handle processor_handle, amdsmi_error_count_t *ec);
2373 
2387 amdsmi_status_t amdsmi_get_gpu_ecc_count(amdsmi_processor_handle processor_handle, amdsmi_gpu_block_t block, amdsmi_error_count_t *ec);
2388 
2398 amdsmi_status_t amdsmi_get_gpu_ecc_enabled(amdsmi_processor_handle processor_handle, uint64_t *enabled_blocks);
2399 
2414 amdsmi_status_t amdsmi_get_gpu_bad_page_info(amdsmi_processor_handle processor_handle, uint32_t *bad_page_size,
2415  amdsmi_eeprom_table_record_t *bad_pages);
2416 
2427 amdsmi_status_t amdsmi_get_gpu_ras_feature_info(amdsmi_processor_handle processor_handle, amdsmi_ras_feature_t *ras_feature);
2428 
2450 amdsmi_status_t amdsmi_get_bad_page_threshold(amdsmi_processor_handle processor_handle, uint32_t *threshold);
2451  // end of eccinfo
2453 
2454 /*****************************************************************************/
2472 amdsmi_status_t
2473 amdsmi_get_num_vf(amdsmi_processor_handle processor_handle, uint32_t *num_vf_enabled, uint32_t *num_vf_supported);
2474 
2475 
2485 amdsmi_status_t amdsmi_set_num_vf(amdsmi_processor_handle processor_handle, uint32_t num_vf);
2486 
2501 amdsmi_status_t
2502 amdsmi_get_vf_partition_info(amdsmi_processor_handle processor_handle, unsigned int vf_buffer_num,
2503  amdsmi_partition_info_t *info);
2504  // end of fbpart
2506 
2507 /*****************************************************************************/
2522 amdsmi_status_t
2523 amdsmi_get_vf_info(amdsmi_vf_handle_t vf_handle, amdsmi_vf_info_t *config);
2524 
2535 amdsmi_status_t
2536 amdsmi_get_vf_data(amdsmi_vf_handle_t vf_handle, amdsmi_vf_data_t *info);
2537  // end of vfconf
2539 
2540 /*****************************************************************************/
2576 amdsmi_status_t
2577 amdsmi_event_create(amdsmi_processor_handle *processor_list, uint32_t num_devices,
2578  uint64_t event_types, amdsmi_event_set *set);
2579 
2607 amdsmi_status_t
2608 amdsmi_event_read(amdsmi_event_set set, int64_t timeout_usec, amdsmi_event_entry_t *event);
2609 
2617 amdsmi_status_t
2618 amdsmi_event_destroy(amdsmi_event_set set);
2619  // end of eventmon
2621 
2622 /*****************************************************************************/
2640 amdsmi_status_t
2641 amdsmi_get_guest_data(amdsmi_vf_handle_t vf_handle, amdsmi_guest_data_t *info);
2642 
2654 amdsmi_status_t
2655 amdsmi_get_vf_fw_info(amdsmi_vf_handle_t vf_handle, amdsmi_fw_info_t *info);
2656 
2667 amdsmi_status_t
2668 amdsmi_get_partition_profile_info(amdsmi_processor_handle processor_handle,
2669  amdsmi_profile_info_t *profile_info);
2670  // end of hostguest
2672 
2673 /*****************************************************************************/
2688 amdsmi_status_t amdsmi_get_link_metrics(amdsmi_processor_handle processor_handle,
2689  amdsmi_link_metrics_t *link_metrics);
2690 
2703 amdsmi_status_t amdsmi_get_link_topology(amdsmi_processor_handle processor_handle_src,
2704  amdsmi_processor_handle processor_handle_dst,
2705  amdsmi_link_topology_t *topology_info);
2706 
2731 amdsmi_status_t amdsmi_get_link_topology_nearest(amdsmi_processor_handle processor_handle,
2732  amdsmi_link_type_t link_type,
2733  amdsmi_topology_nearest_t *topology_nearest_info);
2734 
2745 amdsmi_status_t amdsmi_get_xgmi_fb_sharing_caps(amdsmi_processor_handle processor_handle,
2746  amdsmi_xgmi_fb_sharing_caps_t *caps);
2747 
2762 amdsmi_status_t amdsmi_get_xgmi_fb_sharing_mode_info(amdsmi_processor_handle processor_handle_src,
2763  amdsmi_processor_handle processor_handle_dst,
2764  amdsmi_xgmi_fb_sharing_mode_t mode,
2765  uint8_t *fb_sharing);
2766 
2778 amdsmi_status_t amdsmi_set_xgmi_fb_sharing_mode(amdsmi_processor_handle processor_handle,
2779  amdsmi_xgmi_fb_sharing_mode_t mode);
2780 
2803 amdsmi_status_t amdsmi_set_xgmi_fb_sharing_mode_v2(amdsmi_processor_handle *processor_list, uint32_t num_processors,
2804  amdsmi_xgmi_fb_sharing_mode_t mode);
2805 
2806 
2831 amdsmi_status_t
2832 amdsmi_topo_get_p2p_status(amdsmi_processor_handle processor_handle_src,
2833  amdsmi_processor_handle processor_handle_dst,
2834  amdsmi_link_type_t *type, amdsmi_p2p_capability_t *cap);
2835 
2836 
2837  // end of xgmi
2839 
2840 /*****************************************************************************/
2853 amdsmi_status_t amdsmi_clear_vf_fb(amdsmi_vf_handle_t vf_handle); // end of vfmanagement
2855 
2871 amdsmi_status_t amdsmi_status_code_to_string(amdsmi_status_t status, const char **status_string);
2872 
2873 /*****************************************************************************/
2888  amdsmi_status_t
2889  amdsmi_get_gpu_memory_partition_config(amdsmi_processor_handle processor_handle,
2890  amdsmi_memory_partition_config_t *config);
2891 
2901 amdsmi_status_t
2902 amdsmi_set_gpu_memory_partition_mode(amdsmi_processor_handle processor_handle, amdsmi_memory_partition_type_t mode);
2903 
2914 amdsmi_status_t
2915 amdsmi_get_gpu_accelerator_partition_profile_config(amdsmi_processor_handle processor_handle,
2916  amdsmi_accelerator_partition_profile_config_t *profile_config);
2917 
2931 amdsmi_status_t
2932 amdsmi_get_gpu_accelerator_partition_profile(amdsmi_processor_handle processor_handle,
2933  amdsmi_accelerator_partition_profile_t *profile, uint32_t *partition_id);
2934 
2944 amdsmi_status_t
2945 amdsmi_set_gpu_accelerator_partition_profile(amdsmi_processor_handle processor_handle, uint32_t profile_index);
2946  // end of partitioning
2948 
2949 
2982 amdsmi_status_t
2983 amdsmi_get_gpu_cper_entries(amdsmi_processor_handle processor_handle, uint32_t severity_mask, char *cper_data,
2984  uint64_t *buf_size, amdsmi_cper_hdr_t** cper_hdrs, uint64_t *entry_count, uint64_t *cursor);
2985 
3009 amdsmi_status_t amdsmi_get_afids_from_cper(char *cper_buffer, uint32_t buf_size, uint64_t *afids, uint32_t *num_afids);
3010 
3025 amdsmi_status_t amdsmi_reset_gpu(amdsmi_processor_handle processor_handle);
3026 
3046 amdsmi_status_t
3047 amdsmi_topo_get_numa_node_number(amdsmi_processor_handle processor_handle, uint32_t* numa_node);
3048 
3049 #endif // __AMDSMI_H__
AMDSMI_MAX_DATE_LENGTH
#define AMDSMI_MAX_DATE_LENGTH
YYYY-MM-DD:HH:MM:SS.MSC.
Definition: amdsmi.h:69
amdsmi_accelerator_partition_type_t
amdsmi_accelerator_partition_type_t
Definition: amdsmi.h:1114
AMDSMI_ACCELERATOR_PARTITION_DPX
@ AMDSMI_ACCELERATOR_PARTITION_DPX
together with shared memory
Definition: amdsmi.h:1118
AMDSMI_ACCELERATOR_PARTITION_QPX
@ AMDSMI_ACCELERATOR_PARTITION_QPX
work together with shared memory
Definition: amdsmi.h:1122
AMDSMI_ACCELERATOR_PARTITION_SPX
@ AMDSMI_ACCELERATOR_PARTITION_SPX
together with shared memory
Definition: amdsmi.h:1116
AMDSMI_ACCELERATOR_PARTITION_TPX
@ AMDSMI_ACCELERATOR_PARTITION_TPX
work together with shared memory
Definition: amdsmi.h:1120
AMDSMI_ACCELERATOR_PARTITION_CPX
@ AMDSMI_ACCELERATOR_PARTITION_CPX
shared memory
Definition: amdsmi.h:1124
amdsmi_clk_type_t
amdsmi_clk_type_t
Clock types.
Definition: amdsmi.h:316
AMDSMI_CLK_TYPE_SYS
@ AMDSMI_CLK_TYPE_SYS
System clock.
Definition: amdsmi.h:317
AMDSMI_CLK_TYPE_DCEF
@ AMDSMI_CLK_TYPE_DCEF
Display Controller Engine clock.
Definition: amdsmi.h:322
AMDSMI_CLK_TYPE_DF
@ AMDSMI_CLK_TYPE_DF
running on a separate clock)
Definition: amdsmi.h:320
amdsmi_status_code_to_string
amdsmi_status_t amdsmi_status_code_to_string(amdsmi_status_t status, const char **status_string)
Get a description of a provided AMDSMI error status.
amdsmi_profile_capability_type_t
amdsmi_profile_capability_type_t
Definition: amdsmi.h:887
AMDSMI_PROFILE_CAPABILITY_DECODE
@ AMDSMI_PROFILE_CAPABILITY_DECODE
decode engine
Definition: amdsmi.h:890
AMDSMI_PROFILE_CAPABILITY_MEMORY
@ AMDSMI_PROFILE_CAPABILITY_MEMORY
memory
Definition: amdsmi.h:888
AMDSMI_PROFILE_CAPABILITY_ENCODE
@ AMDSMI_PROFILE_CAPABILITY_ENCODE
encode engine
Definition: amdsmi.h:889
AMDSMI_PROFILE_CAPABILITY_COMPUTE
@ AMDSMI_PROFILE_CAPABILITY_COMPUTE
compute engine
Definition: amdsmi.h:891
amdsmi_init_flags_t
amdsmi_init_flags_t
Initialization flags.
Definition: amdsmi.h:43
AMDSMI_INIT_ALL_PROCESSORS
@ AMDSMI_INIT_ALL_PROCESSORS
Initialize all processors.
Definition: amdsmi.h:44
amdsmi_topo_get_numa_node_number
amdsmi_status_t amdsmi_topo_get_numa_node_number(amdsmi_processor_handle processor_handle, uint32_t *numa_node)
Retrieve the NUMA CPU node number for a device.
amdsmi_metric_type_t
amdsmi_metric_type_t
Definition: amdsmi.h:1070
AMDSMI_METRIC_TYPE_COUNTER
@ AMDSMI_METRIC_TYPE_COUNTER
counter metric
Definition: amdsmi.h:1071
AMDSMI_METRIC_TYPE_CHIPLET
@ AMDSMI_METRIC_TYPE_CHIPLET
chiplet metric
Definition: amdsmi.h:1072
AMDSMI_METRIC_TYPE_ACC
@ AMDSMI_METRIC_TYPE_ACC
accumulated metric
Definition: amdsmi.h:1074
AMDSMI_METRIC_TYPE_INST
@ AMDSMI_METRIC_TYPE_INST
instantaneous metric
Definition: amdsmi.h:1073
amdsmi_fw_block_t
amdsmi_fw_block_t
Definition: amdsmi.h:218
AMDSMI_FW_ID_RLX6
@ AMDSMI_FW_ID_RLX6
FW_ID_MES_THREAD1_STACK = MES_KIQ_STACK.
Definition: amdsmi.h:269
AMDSMI_FW_ID_DMCU_ISR
@ AMDSMI_FW_ID_DMCU_ISR
ISR.
Definition: amdsmi.h:242
AMDSMI_FW_ID_MES_THREAD1
@ AMDSMI_FW_ID_MES_THREAD1
FW_ID_MES_THREAD1 = CP_MES_KIQ.
Definition: amdsmi.h:267
AMDSMI_FW_ID_DMCU_ERAM
@ AMDSMI_FW_ID_DMCU_ERAM
eRAM
Definition: amdsmi.h:241
amdsmi_mm_ip_t
amdsmi_mm_ip_t
GPU Capability info.
Definition: amdsmi.h:306
amdsmi_guest_fw_engine_id_t
amdsmi_guest_fw_engine_id_t
The values of this enum are used to identify the various firmware blocks.
Definition: amdsmi.h:768
amdsmi_reset_gpu
amdsmi_status_t amdsmi_reset_gpu(amdsmi_processor_handle processor_handle)
Reset the gpu associated with the device with provided processor handle. It is not supported on virtu...
amdsmi_ecc_correction_schema_support_t
amdsmi_ecc_correction_schema_support_t
The values of this enum are used to identify supported ecc correction schema.
Definition: amdsmi.h:757
amdsmi_memory_partition_type_t
amdsmi_memory_partition_type_t
Memory Partitions. This enum is used to identify various memory partition types.
Definition: amdsmi.h:1097
AMDSMI_MEMORY_PARTITION_NPS8
@ AMDSMI_MEMORY_PARTITION_NPS8
Definition: amdsmi.h:1107
AMDSMI_MEMORY_PARTITION_NPS1
@ AMDSMI_MEMORY_PARTITION_NPS1
across all 8 HBM stacks (all stacks/1).
Definition: amdsmi.h:1099
AMDSMI_MEMORY_PARTITION_NPS2
@ AMDSMI_MEMORY_PARTITION_NPS2
Definition: amdsmi.h:1101
AMDSMI_MEMORY_PARTITION_NPS4
@ AMDSMI_MEMORY_PARTITION_NPS4
Definition: amdsmi.h:1104
amdsmi_event_gpu_t
amdsmi_event_gpu_t
Below are the error subcodes of each category.
Definition: amdsmi.h:423
amdsmi_cache_property_type_t
amdsmi_cache_property_type_t
cache properties
Definition: amdsmi.h:210
amdsmi_get_afids_from_cper
amdsmi_status_t amdsmi_get_afids_from_cper(char *cper_buffer, uint32_t buf_size, uint64_t *afids, uint32_t *num_afids)
Get the AFIDs from CPER buffer.
AMDSMI_MAX_DEVICES
#define AMDSMI_MAX_DEVICES
Maximum size definitions AMDSMI.
Definition: amdsmi.h:55
AMDSMI_EVENT_MSG_SIZE
#define AMDSMI_EVENT_MSG_SIZE
256 BYTES
Definition: amdsmi.h:83
amdsmi_status_t
amdsmi_status_t
ENUMERATORS.
Definition: amdsmi.h:154
AMDSMI_STATUS_NOT_INIT
@ AMDSMI_STATUS_NOT_INIT
Processor not initialized.
Definition: amdsmi.h:180
AMDSMI_STATUS_NON_AMD_CPU
@ AMDSMI_STATUS_NON_AMD_CPU
System has different cpu than AMD.
Definition: amdsmi.h:189
AMDSMI_STATUS_INVAL
@ AMDSMI_STATUS_INVAL
Invalid parameters.
Definition: amdsmi.h:157
AMDSMI_STATUS_BUSY
@ AMDSMI_STATUS_BUSY
Processor busy.
Definition: amdsmi.h:178
AMDSMI_STATUS_UNKNOWN_ERROR
@ AMDSMI_STATUS_UNKNOWN_ERROR
An unknown error occurred.
Definition: amdsmi.h:204
AMDSMI_STATUS_DRIVER_NOT_LOADED
@ AMDSMI_STATUS_DRIVER_NOT_LOADED
Processor driver not loaded.
Definition: amdsmi.h:182
AMDSMI_STATUS_FILE_ERROR
@ AMDSMI_STATUS_FILE_ERROR
Problem accessing a file.
Definition: amdsmi.h:170
AMDSMI_STATUS_DRM_ERROR
@ AMDSMI_STATUS_DRM_ERROR
Error when call libdrm.
Definition: amdsmi.h:162
AMDSMI_STATUS_ARG_PTR_NULL
@ AMDSMI_STATUS_ARG_PTR_NULL
Parsed argument is invalid.
Definition: amdsmi.h:198
AMDSMI_STATUS_IO
@ AMDSMI_STATUS_IO
I/O Error.
Definition: amdsmi.h:168
AMDSMI_STATUS_NO_HSMP_DRV
@ AMDSMI_STATUS_NO_HSMP_DRV
HSMP driver not found.
Definition: amdsmi.h:192
AMDSMI_STATUS_HSMP_TIMEOUT
@ AMDSMI_STATUS_HSMP_TIMEOUT
HSMP message is timedout.
Definition: amdsmi.h:195
AMDSMI_STATUS_NO_DATA
@ AMDSMI_STATUS_NO_DATA
No data was found for a given input.
Definition: amdsmi.h:184
AMDSMI_STATUS_RETRY
@ AMDSMI_STATUS_RETRY
Retry operation.
Definition: amdsmi.h:165
AMDSMI_STATUS_UNEXPECTED_SIZE
@ AMDSMI_STATUS_UNEXPECTED_SIZE
An unexpected amount of data was read.
Definition: amdsmi.h:186
AMDSMI_STATUS_SETTING_UNAVAILABLE
@ AMDSMI_STATUS_SETTING_UNAVAILABLE
Setting is not available.
Definition: amdsmi.h:200
AMDSMI_STATUS_FILE_NOT_FOUND
@ AMDSMI_STATUS_FILE_NOT_FOUND
file or directory not found
Definition: amdsmi.h:197
AMDSMI_STATUS_INTERNAL_EXCEPTION
@ AMDSMI_STATUS_INTERNAL_EXCEPTION
An internal exception was caught.
Definition: amdsmi.h:172
AMDSMI_STATUS_NO_HSMP_SUP
@ AMDSMI_STATUS_NO_HSMP_SUP
HSMP not supported.
Definition: amdsmi.h:193
AMDSMI_STATUS_MAP_ERROR
@ AMDSMI_STATUS_MAP_ERROR
The internal library error did not map to a status code.
Definition: amdsmi.h:203
AMDSMI_STATUS_FAIL_LOAD_SYMBOL
@ AMDSMI_STATUS_FAIL_LOAD_SYMBOL
Fail to load symbol.
Definition: amdsmi.h:161
AMDSMI_STATUS_INSUFFICIENT_SIZE
@ AMDSMI_STATUS_INSUFFICIENT_SIZE
Not enough resources were available for the operation.
Definition: amdsmi.h:185
AMDSMI_STATUS_INIT_ERROR
@ AMDSMI_STATUS_INIT_ERROR
An error occurred when initializing internal data structures.
Definition: amdsmi.h:174
AMDSMI_STATUS_OUT_OF_RESOURCES
@ AMDSMI_STATUS_OUT_OF_RESOURCES
Not enough memory.
Definition: amdsmi.h:171
AMDSMI_STATUS_NO_SLOT
@ AMDSMI_STATUS_NO_SLOT
No more free slot.
Definition: amdsmi.h:181
AMDSMI_STATUS_NO_MSR_DRV
@ AMDSMI_STATUS_NO_MSR_DRV
MSR driver not found.
Definition: amdsmi.h:191
AMDSMI_STATUS_INTERRUPT
@ AMDSMI_STATUS_INTERRUPT
An interrupt occurred during execution of function.
Definition: amdsmi.h:167
AMDSMI_STATUS_SUCCESS
@ AMDSMI_STATUS_SUCCESS
Call succeeded.
Definition: amdsmi.h:155
AMDSMI_STATUS_NO_ENERGY_DRV
@ AMDSMI_STATUS_NO_ENERGY_DRV
Energy driver not found.
Definition: amdsmi.h:190
AMDSMI_STATUS_ADDRESS_FAULT
@ AMDSMI_STATUS_ADDRESS_FAULT
Bad address.
Definition: amdsmi.h:169
AMDSMI_STATUS_NOT_YET_IMPLEMENTED
@ AMDSMI_STATUS_NOT_YET_IMPLEMENTED
Not implemented yet.
Definition: amdsmi.h:159
AMDSMI_STATUS_NO_DRV
@ AMDSMI_STATUS_NO_DRV
No Energy and HSMP driver present.
Definition: amdsmi.h:196
AMDSMI_STATUS_NO_PERM
@ AMDSMI_STATUS_NO_PERM
Permission Denied.
Definition: amdsmi.h:166
AMDSMI_STATUS_NOT_FOUND
@ AMDSMI_STATUS_NOT_FOUND
Processor not found.
Definition: amdsmi.h:179
AMDSMI_STATUS_FAIL_LOAD_MODULE
@ AMDSMI_STATUS_FAIL_LOAD_MODULE
Fail to load lib.
Definition: amdsmi.h:160
AMDSMI_STATUS_AMDGPU_RESTART_ERR
@ AMDSMI_STATUS_AMDGPU_RESTART_ERR
AMDGPU restart failed.
Definition: amdsmi.h:199
AMDSMI_STATUS_NOT_SUPPORTED
@ AMDSMI_STATUS_NOT_SUPPORTED
Command not supported.
Definition: amdsmi.h:158
AMDSMI_STATUS_UNEXPECTED_DATA
@ AMDSMI_STATUS_UNEXPECTED_DATA
The data read or provided to function is not what was expected.
Definition: amdsmi.h:187
AMDSMI_STATUS_API_FAILED
@ AMDSMI_STATUS_API_FAILED
API call failed.
Definition: amdsmi.h:163
AMDSMI_STATUS_TIMEOUT
@ AMDSMI_STATUS_TIMEOUT
Timeout in API call.
Definition: amdsmi.h:164
AMDSMI_STATUS_NO_HSMP_MSG_SUP
@ AMDSMI_STATUS_NO_HSMP_MSG_SUP
HSMP message/feature not supported.
Definition: amdsmi.h:194
AMDSMI_STATUS_INPUT_OUT_OF_BOUNDS
@ AMDSMI_STATUS_INPUT_OUT_OF_BOUNDS
The provided input is out of allowable or safe range.
Definition: amdsmi.h:173
AMDSMI_STATUS_REFCOUNT_OVERFLOW
@ AMDSMI_STATUS_REFCOUNT_OVERFLOW
An internal reference counter exceeded INT32_MAX.
Definition: amdsmi.h:175
amdsmi_temperature_metric_t
amdsmi_temperature_metric_t
Temperature Metrics. This enum is used to identify various temperature metrics. Corresponding values ...
Definition: amdsmi.h:353
AMDSMI_TEMP_CRITICAL_HYST
@ AMDSMI_TEMP_CRITICAL_HYST
Definition: amdsmi.h:366
AMDSMI_TEMP_CRITICAL
@ AMDSMI_TEMP_CRITICAL
greater than corresponding temp_max values.
Definition: amdsmi.h:364
AMDSMI_TEMP_OFFSET
@ AMDSMI_TEMP_OFFSET
Definition: amdsmi.h:382
AMDSMI_TEMP_EMERGENCY
@ AMDSMI_TEMP_EMERGENCY
Definition: amdsmi.h:369
AMDSMI_TEMP_LOWEST
@ AMDSMI_TEMP_LOWEST
temperature reading by the chip.
Definition: amdsmi.h:384
AMDSMI_TEMP_CRIT_MIN
@ AMDSMI_TEMP_CRIT_MIN
Definition: amdsmi.h:376
AMDSMI_TEMP_SHUTDOWN
@ AMDSMI_TEMP_SHUTDOWN
Shutdown temperature.
Definition: amdsmi.h:386
AMDSMI_TEMP_EMERGENCY_HYST
@ AMDSMI_TEMP_EMERGENCY_HYST
Definition: amdsmi.h:373
AMDSMI_TEMP_CURRENT
@ AMDSMI_TEMP_CURRENT
Temperature current value.
Definition: amdsmi.h:354
AMDSMI_TEMP_MIN
@ AMDSMI_TEMP_MIN
Temperature min value.
Definition: amdsmi.h:357
AMDSMI_TEMP_HIGHEST
@ AMDSMI_TEMP_HIGHEST
Historical maximum temperature.
Definition: amdsmi.h:385
AMDSMI_TEMP_CRIT_MIN_HYST
@ AMDSMI_TEMP_CRIT_MIN_HYST
Definition: amdsmi.h:379
AMDSMI_TEMP_MIN_HYST
@ AMDSMI_TEMP_MIN_HYST
Definition: amdsmi.h:361
AMDSMI_TEMP_MAX_HYST
@ AMDSMI_TEMP_MAX_HYST
Definition: amdsmi.h:358
AMDSMI_TEMP_MAX
@ AMDSMI_TEMP_MAX
Temperature max value.
Definition: amdsmi.h:356
amdsmi_gpu_block_t
amdsmi_gpu_block_t
Definition: amdsmi.h:931
AMDSMI_GPU_BLOCK_XGMI_WAFL
@ AMDSMI_GPU_BLOCK_XGMI_WAFL
XGMI block.
Definition: amdsmi.h:943
AMDSMI_GPU_BLOCK_GFX
@ AMDSMI_GPU_BLOCK_GFX
GFX block.
Definition: amdsmi.h:938
AMDSMI_GPU_BLOCK_IH
@ AMDSMI_GPU_BLOCK_IH
IH block.
Definition: amdsmi.h:953
AMDSMI_GPU_BLOCK_VCN
@ AMDSMI_GPU_BLOCK_VCN
VCN block.
Definition: amdsmi.h:951
AMDSMI_GPU_BLOCK_INVALID
@ AMDSMI_GPU_BLOCK_INVALID
invalid block
Definition: amdsmi.h:932
AMDSMI_GPU_BLOCK_MP0
@ AMDSMI_GPU_BLOCK_MP0
MP0 block.
Definition: amdsmi.h:947
AMDSMI_GPU_BLOCK_HDP
@ AMDSMI_GPU_BLOCK_HDP
HDP block.
Definition: amdsmi.h:942
AMDSMI_GPU_BLOCK_MPIO
@ AMDSMI_GPU_BLOCK_MPIO
MPIO block.
Definition: amdsmi.h:954
AMDSMI_GPU_BLOCK_ATHUB
@ AMDSMI_GPU_BLOCK_ATHUB
ATHUB block.
Definition: amdsmi.h:940
AMDSMI_GPU_BLOCK_MP1
@ AMDSMI_GPU_BLOCK_MP1
MP1 block.
Definition: amdsmi.h:948
AMDSMI_GPU_BLOCK_PCIE_BIF
@ AMDSMI_GPU_BLOCK_PCIE_BIF
PCIE_BIF block.
Definition: amdsmi.h:941
AMDSMI_GPU_BLOCK_SDMA
@ AMDSMI_GPU_BLOCK_SDMA
SDMA block.
Definition: amdsmi.h:937
AMDSMI_GPU_BLOCK_JPEG
@ AMDSMI_GPU_BLOCK_JPEG
JPEG block.
Definition: amdsmi.h:952
AMDSMI_GPU_BLOCK_UMC
@ AMDSMI_GPU_BLOCK_UMC
UMC block.
Definition: amdsmi.h:936
AMDSMI_GPU_BLOCK_FUSE
@ AMDSMI_GPU_BLOCK_FUSE
Fuse block.
Definition: amdsmi.h:949
AMDSMI_GPU_BLOCK_DF
@ AMDSMI_GPU_BLOCK_DF
DF block.
Definition: amdsmi.h:944
AMDSMI_GPU_BLOCK_MMHUB
@ AMDSMI_GPU_BLOCK_MMHUB
MMHUB block.
Definition: amdsmi.h:939
AMDSMI_GPU_BLOCK_SMN
@ AMDSMI_GPU_BLOCK_SMN
SMN block.
Definition: amdsmi.h:945
AMDSMI_GPU_BLOCK_SEM
@ AMDSMI_GPU_BLOCK_SEM
SEM block.
Definition: amdsmi.h:946
AMDSMI_GPU_BLOCK_MCA
@ AMDSMI_GPU_BLOCK_MCA
MCA block.
Definition: amdsmi.h:950
amdsmi_get_gpu_cper_entries
amdsmi_status_t amdsmi_get_gpu_cper_entries(amdsmi_processor_handle processor_handle, uint32_t severity_mask, char *cper_data, uint64_t *buf_size, amdsmi_cper_hdr_t **cper_hdrs, uint64_t *entry_count, uint64_t *cursor)
Retrieve CPER entries cached in the driver.
amdsmi_temperature_type_t
amdsmi_temperature_type_t
This enumeration is used to indicate from which part of the processor a temperature reading should be...
Definition: amdsmi.h:336
amdsmi_socket_handle
void * amdsmi_socket_handle
opaque handler point to underlying implementation
Definition: amdsmi.h:147
amdsmi_set_gpu_accelerator_partition_profile
amdsmi_status_t amdsmi_set_gpu_accelerator_partition_profile(amdsmi_processor_handle processor_handle, uint32_t profile_index)
Sets accelerator partition setting based on profile_index from amdsmi_get_gpu_accelerator_partition_p...
amdsmi_get_gpu_memory_partition_config
amdsmi_status_t amdsmi_get_gpu_memory_partition_config(amdsmi_processor_handle processor_handle, amdsmi_memory_partition_config_t *config)
Returns current gpu memory partition config and mode capabilities.
amdsmi_get_gpu_accelerator_partition_profile_config
amdsmi_status_t amdsmi_get_gpu_accelerator_partition_profile_config(amdsmi_processor_handle processor_handle, amdsmi_accelerator_partition_profile_config_t *profile_config)
Returns gpu accelerator partition caps as currently configured in the system.
amdsmi_set_gpu_memory_partition_mode
amdsmi_status_t amdsmi_set_gpu_memory_partition_mode(amdsmi_processor_handle processor_handle, amdsmi_memory_partition_type_t mode)
Sets memory partition mode.
amdsmi_get_gpu_accelerator_partition_profile
amdsmi_status_t amdsmi_get_gpu_accelerator_partition_profile(amdsmi_processor_handle processor_handle, amdsmi_accelerator_partition_profile_t *profile, uint32_t *partition_id)
Returns current gpu accelerator partition cap.
amdsmi_get_fb_layout
amdsmi_status_t amdsmi_get_fb_layout(amdsmi_processor_handle processor_handle, amdsmi_pf_fb_info_t *info)
Returns the framebuffer info for the ASIC.
amdsmi_get_power_cap_info
amdsmi_status_t amdsmi_get_power_cap_info(amdsmi_processor_handle processor_handle, uint32_t sensor_ind, amdsmi_power_cap_info_t *info)
Returns the power caps as currently configured in the system.
amdsmi_get_pcie_info
amdsmi_status_t amdsmi_get_pcie_info(amdsmi_processor_handle processor_handle, amdsmi_pcie_info_t *info)
Returns the PCIe info for the GPU.
amdsmi_get_gpu_vram_info
amdsmi_status_t amdsmi_get_gpu_vram_info(amdsmi_processor_handle processor_handle, amdsmi_vram_info_t *info)
Returns vram info.
amdsmi_get_gpu_asic_info
amdsmi_status_t amdsmi_get_gpu_asic_info(amdsmi_processor_handle processor_handle, amdsmi_asic_info_t *info)
Returns the ASIC information for the processor.
amdsmi_get_processor_handles
amdsmi_status_t amdsmi_get_processor_handles(amdsmi_socket_handle socket_handle, uint32_t *processor_count, amdsmi_processor_handle *processor_handles)
Returns a list of AMD GPU devices in the system.
amdsmi_get_index_from_processor_handle
amdsmi_status_t amdsmi_get_index_from_processor_handle(amdsmi_processor_handle processor_handle, uint32_t *processor_index)
Returns the index of the given processor handle.
amdsmi_get_gpu_device_uuid
amdsmi_status_t amdsmi_get_gpu_device_uuid(amdsmi_processor_handle processor_handle, unsigned int *uuid_length, char *uuid)
Returns the UUID of the processor.
amdsmi_get_processor_type
amdsmi_status_t amdsmi_get_processor_type(amdsmi_processor_handle processor_handle, processor_type_t *processor_type)
Get the processor type.
amdsmi_get_socket_info
amdsmi_status_t amdsmi_get_socket_info(amdsmi_socket_handle socket_handle, size_t len, char *name)
Returns socket information about given socket handle NOT SUPPORTED YET, CURRENTLY HARDCODED TO RETURN...
amdsmi_get_gpu_virtualization_mode
amdsmi_status_t amdsmi_get_gpu_virtualization_mode(amdsmi_processor_handle processor_handle, amdsmi_virtualization_mode_t *mode)
Returns the virtualization mode for the target device.
amdsmi_get_processor_handle_from_uuid
amdsmi_status_t amdsmi_get_processor_handle_from_uuid(const char *uuid, amdsmi_processor_handle *processor_handle)
Returns the processor handle from the given UUID.
amdsmi_get_socket_handles
amdsmi_status_t amdsmi_get_socket_handles(uint32_t *socket_count, amdsmi_socket_handle *socket_handles)
Returns a list of socket handles in the system. NOT SUPPORTED YET, CURRENTLY HARDCODED TO RETURN EMPT...
amdsmi_get_vf_bdf
amdsmi_status_t amdsmi_get_vf_bdf(amdsmi_vf_handle_t vf_handle, amdsmi_bdf_t *bdf)
Returns BDF of the given device (VF).
amdsmi_get_vf_handle_from_bdf
amdsmi_status_t amdsmi_get_vf_handle_from_bdf(amdsmi_bdf_t bdf, amdsmi_vf_handle_t *vf_handle)
Returns VF handle from the given BDF.
amdsmi_get_processor_handle_from_bdf
amdsmi_status_t amdsmi_get_processor_handle_from_bdf(amdsmi_bdf_t bdf, amdsmi_processor_handle *processor_handle)
Returns processor handle (PF) from the given BDF.
amdsmi_get_vf_handle_from_vf_index
amdsmi_status_t amdsmi_get_vf_handle_from_vf_index(amdsmi_processor_handle processor_handle, uint32_t fcn_idx, amdsmi_vf_handle_t *vf_handle)
Returns the handle of a virtual function given its index.
amdsmi_get_vf_uuid
amdsmi_status_t amdsmi_get_vf_uuid(amdsmi_vf_handle_t processor_handle, unsigned int *uuid_length, char *uuid)
Returns the UUID of the VF.
amdsmi_get_gpu_device_bdf
amdsmi_status_t amdsmi_get_gpu_device_bdf(amdsmi_processor_handle processor_handle, amdsmi_bdf_t *bdf)
Returns BDF of the given processor (PF or VF).
amdsmi_get_vf_handle_from_uuid
amdsmi_status_t amdsmi_get_vf_handle_from_uuid(const char *uuid, amdsmi_vf_handle_t *vf_handle)
Returns the handle of a virtual function from the given UUID.
amdsmi_get_cpu_affinity_with_scope
amdsmi_status_t amdsmi_get_cpu_affinity_with_scope(amdsmi_processor_handle processor_handle, uint32_t cpu_set_size, uint64_t *cpu_set, amdsmi_affinity_scope_t scope)
Retrieves an array of uint64_t (sized to cpu_set_size) of bitmasks with the affinity within numa node...
amdsmi_get_processor_handle_from_index
amdsmi_status_t amdsmi_get_processor_handle_from_index(uint32_t processor_index, amdsmi_processor_handle *processor_handle)
Returns the processor handle from the given processor index.
amdsmi_get_gpu_total_ecc_count
amdsmi_status_t amdsmi_get_gpu_total_ecc_count(amdsmi_processor_handle processor_handle, amdsmi_error_count_t *ec)
Returns the number of ECC errors (correctable, uncorrectable and deferred) in the given GPU.
amdsmi_get_gpu_ecc_count
amdsmi_status_t amdsmi_get_gpu_ecc_count(amdsmi_processor_handle processor_handle, amdsmi_gpu_block_t block, amdsmi_error_count_t *ec)
Returns the number of ECC errors (correctable, uncorrectable and deferred) for the given GPU block.
amdsmi_get_gpu_ecc_enabled
amdsmi_status_t amdsmi_get_gpu_ecc_enabled(amdsmi_processor_handle processor_handle, uint64_t *enabled_blocks)
Returns the enabled ECC bitmask.
amdsmi_get_bad_page_threshold
amdsmi_status_t amdsmi_get_bad_page_threshold(amdsmi_processor_handle processor_handle, uint32_t *threshold)
Get the bad page threshold for a device.
amdsmi_get_gpu_ras_feature_info
amdsmi_status_t amdsmi_get_gpu_ras_feature_info(amdsmi_processor_handle processor_handle, amdsmi_ras_feature_t *ras_feature)
Returns RAS features info.
amdsmi_get_gpu_bad_page_info
amdsmi_status_t amdsmi_get_gpu_bad_page_info(amdsmi_processor_handle processor_handle, uint32_t *bad_page_size, amdsmi_eeprom_table_record_t *bad_pages)
Returns the bad page info.
amdsmi_event_destroy
amdsmi_status_t amdsmi_event_destroy(amdsmi_event_set set)
Destroys and frees an event set.
amdsmi_event_read
amdsmi_status_t amdsmi_event_read(amdsmi_event_set set, int64_t timeout_usec, amdsmi_event_entry_t *event)
The call blocks till timeout is expired to copy one event specified by the event set into the user pr...
amdsmi_event_create
amdsmi_status_t amdsmi_event_create(amdsmi_processor_handle *processor_list, uint32_t num_devices, uint64_t event_types, amdsmi_event_set *set)
Allocate a new event set notifier to monitor different types of issues with the GPU running virtualiz...
amdsmi_get_vf_partition_info
amdsmi_status_t amdsmi_get_vf_partition_info(amdsmi_processor_handle processor_handle, unsigned int vf_buffer_num, amdsmi_partition_info_t *info)
Returns the current framebuffer partitioning structure as currently configured by the driver.
amdsmi_get_num_vf
amdsmi_status_t amdsmi_get_num_vf(amdsmi_processor_handle processor_handle, uint32_t *num_vf_enabled, uint32_t *num_vf_supported)
Returns the number of VFs enabled by gpuv in the ASIC.
amdsmi_set_num_vf
amdsmi_status_t amdsmi_set_num_vf(amdsmi_processor_handle processor_handle, uint32_t num_vf)
Enable a given number of VF.
amdsmi_get_gpu_vbios_info
amdsmi_status_t amdsmi_get_gpu_vbios_info(amdsmi_processor_handle processor_handle, amdsmi_vbios_info_t *info)
Returns the static information for the vBIOS on the processor.
amdsmi_get_fw_info
amdsmi_status_t amdsmi_get_fw_info(amdsmi_processor_handle processor_handle, amdsmi_fw_info_t *info)
Returns the firmware versions running on PF of the processor.
amdsmi_get_gpu_board_info
amdsmi_status_t amdsmi_get_gpu_board_info(amdsmi_processor_handle processor_handle, amdsmi_board_info_t *info)
Returns the board part number and board information for the requested processor.
amdsmi_get_dfc_fw_table
amdsmi_status_t amdsmi_get_dfc_fw_table(amdsmi_processor_handle processor_handle, amdsmi_dfc_fw_t *info)
Returns the DFC fw table.
amdsmi_get_fw_error_records
amdsmi_status_t amdsmi_get_fw_error_records(amdsmi_processor_handle processor_handle, amdsmi_fw_error_record_t *records)
Gets firmware error records.
amdsmi_get_gpu_metrics
amdsmi_status_t amdsmi_get_gpu_metrics(amdsmi_processor_handle processor_handle, uint32_t *metrics_size, amdsmi_metric_t *metrics)
Returns metrics information.
amdsmi_get_power_info
amdsmi_status_t amdsmi_get_power_info(amdsmi_processor_handle processor_handle, uint32_t sensor_ind, amdsmi_power_info_t *info)
Returns the current power and voltage of the GPU.
amdsmi_get_temp_metric
amdsmi_status_t amdsmi_get_temp_metric(amdsmi_processor_handle processor_handle, amdsmi_temperature_type_t sensor_type, amdsmi_temperature_metric_t metric, int64_t *temperature)
Returns temperature measurements of the GPU. The results are in °C.
amdsmi_get_gpu_activity
amdsmi_status_t amdsmi_get_gpu_activity(amdsmi_processor_handle processor_handle, amdsmi_engine_usage_t *info)
Returns the current usage of the GPU engines (GFX, MM and MEM). Each usage is reported as a percentag...
amdsmi_get_clock_info
amdsmi_status_t amdsmi_get_clock_info(amdsmi_processor_handle processor_handle, amdsmi_clk_type_t clk_type, amdsmi_clk_info_t *info)
Returns the measurements of the clocks in the GPU for the GFX and multimedia engines and Memory....
amdsmi_set_power_cap
amdsmi_status_t amdsmi_set_power_cap(amdsmi_processor_handle processor_handle, uint32_t sensor_ind, uint64_t cap)
Sets GPU power cap.
amdsmi_get_soc_pstate
amdsmi_status_t amdsmi_get_soc_pstate(amdsmi_processor_handle processor_handle, amdsmi_dpm_policy_t *policy)
Returns the soc pstate policy for the processor.
amdsmi_set_soc_pstate
amdsmi_status_t amdsmi_set_soc_pstate(amdsmi_processor_handle processor_handle, uint32_t policy_id)
Set the soc pstate policy for the processor.
amdsmi_get_gpu_cache_info
amdsmi_status_t amdsmi_get_gpu_cache_info(amdsmi_processor_handle processor_handle, amdsmi_gpu_cache_info_t *info)
Returns gpu cache info.
amdsmi_is_gpu_power_management_enabled
amdsmi_status_t amdsmi_is_gpu_power_management_enabled(amdsmi_processor_handle processor_handle, bool *enabled)
Returns is power management enabled.
amdsmi_get_guest_data
amdsmi_status_t amdsmi_get_guest_data(amdsmi_vf_handle_t vf_handle, amdsmi_guest_data_t *info)
Returns guest OS information of the queried VF. The fw_info field from the amdsmi_guest_data structur...
amdsmi_get_partition_profile_info
amdsmi_status_t amdsmi_get_partition_profile_info(amdsmi_processor_handle processor_handle, amdsmi_profile_info_t *profile_info)
Return the list of supported profiles on the given GPU device.
amdsmi_get_vf_fw_info
amdsmi_status_t amdsmi_get_vf_fw_info(amdsmi_vf_handle_t vf_handle, amdsmi_fw_info_t *info)
Returns the firmware versions running on a VF. In case the VM is not started on the VF,...
amdsmi_shut_down
amdsmi_status_t amdsmi_shut_down(void)
The library frees all associated with the library on the current process.
amdsmi_init
amdsmi_status_t amdsmi_init(uint64_t init_flags)
Initializes the library and the internal software structures.
amdsmi_get_xgmi_fb_sharing_caps
amdsmi_status_t amdsmi_get_xgmi_fb_sharing_caps(amdsmi_processor_handle processor_handle, amdsmi_xgmi_fb_sharing_caps_t *caps)
Return XGMI capabilities.
amdsmi_set_xgmi_fb_sharing_mode_v2
amdsmi_status_t amdsmi_set_xgmi_fb_sharing_mode_v2(amdsmi_processor_handle *processor_list, uint32_t num_processors, amdsmi_xgmi_fb_sharing_mode_t mode)
Set XGMI framebuffer custom sharing mode.
amdsmi_get_xgmi_fb_sharing_mode_info
amdsmi_status_t amdsmi_get_xgmi_fb_sharing_mode_info(amdsmi_processor_handle processor_handle_src, amdsmi_processor_handle processor_handle_dst, amdsmi_xgmi_fb_sharing_mode_t mode, uint8_t *fb_sharing)
Return XGMI framebuffer sharing information between two GPUs.
amdsmi_get_link_topology
amdsmi_status_t amdsmi_get_link_topology(amdsmi_processor_handle processor_handle_src, amdsmi_processor_handle processor_handle_dst, amdsmi_link_topology_t *topology_info)
Return link topology information between two connected processors.
amdsmi_get_link_metrics
amdsmi_status_t amdsmi_get_link_metrics(amdsmi_processor_handle processor_handle, amdsmi_link_metrics_t *link_metrics)
Return link metric information.
amdsmi_topo_get_p2p_status
amdsmi_status_t amdsmi_topo_get_p2p_status(amdsmi_processor_handle processor_handle_src, amdsmi_processor_handle processor_handle_dst, amdsmi_link_type_t *type, amdsmi_p2p_capability_t *cap)
Retrieve connection type and P2P capabilities between 2 GPUs.
amdsmi_set_xgmi_fb_sharing_mode
amdsmi_status_t amdsmi_set_xgmi_fb_sharing_mode(amdsmi_processor_handle processor_handle, amdsmi_xgmi_fb_sharing_mode_t mode)
Set XGMI framebuffer sharing mode.
amdsmi_get_link_topology_nearest
amdsmi_status_t amdsmi_get_link_topology_nearest(amdsmi_processor_handle processor_handle, amdsmi_link_type_t link_type, amdsmi_topology_nearest_t *topology_nearest_info)
Retrieve the set of GPUs that are nearest to a given device at a specific interconnectivity level.
amdsmi_get_gpu_driver_info
amdsmi_status_t amdsmi_get_gpu_driver_info(amdsmi_processor_handle processor_handle, amdsmi_driver_info_t *info)
Returns the driver version information.
amdsmi_get_gpu_driver_model
amdsmi_status_t amdsmi_get_gpu_driver_model(amdsmi_processor_handle processor_handle, amdsmi_driver_model_type_t *model)
Returns the driver model information.
amdsmi_get_lib_version
amdsmi_status_t amdsmi_get_lib_version(amdsmi_version_t *version)
Get the build version information for the currently running build of AMDSMI.
amdsmi_get_vf_info
amdsmi_status_t amdsmi_get_vf_info(amdsmi_vf_handle_t vf_handle, amdsmi_vf_info_t *config)
Returns the configuration structure for a VF.
amdsmi_get_vf_data
amdsmi_status_t amdsmi_get_vf_data(amdsmi_vf_handle_t vf_handle, amdsmi_vf_data_t *info)
Returns the data structure for a VF.
amdsmi_clear_vf_fb
amdsmi_status_t amdsmi_clear_vf_fb(amdsmi_vf_handle_t vf_handle)
Clear the framebuffer of a VF. If trying to clear the framebuffer of an active function,...
amdsmi_accelerator_partition_profile_config_t
Definition: amdsmi.h:1593
amdsmi_accelerator_partition_profile_config_t::default_profile_index
uint32_t default_profile_index
The index of the default profile in the profiles array.
Definition: amdsmi.h:1597
amdsmi_accelerator_partition_profile_config_t::num_profiles
uint32_t num_profiles
The length of profiles array.
Definition: amdsmi.h:1594
amdsmi_accelerator_partition_profile_t
Definition: amdsmi.h:1575
amdsmi_accelerator_partition_profile_t::profile_index
uint32_t profile_index
The index in the profiles array in amdsmi_accelerator_partition_profile_t.
Definition: amdsmi.h:1579
amdsmi_accelerator_partition_profile_t::num_partitions
uint32_t num_partitions
On MI300X, SPX: 1, DPX: 2, QPX: 4, CPX: 8.
Definition: amdsmi.h:1577
amdsmi_accelerator_partition_profile_t::memory_caps
amdsmi_nps_caps_t memory_caps
Memory capabilities of the profile.
Definition: amdsmi.h:1578
amdsmi_accelerator_partition_profile_t::profile_type
amdsmi_accelerator_partition_type_t profile_type
SPX, DPX, QPX, CPX and so on.
Definition: amdsmi.h:1576
amdsmi_accelerator_partition_profile_t::num_resources
uint32_t num_resources
length of array resources
Definition: amdsmi.h:1580
amdsmi_accelerator_partition_resource_profile_t
Definition: amdsmi.h:1585
amdsmi_accelerator_partition_resource_profile_t::partition_resource
uint32_t partition_resource
The resources a partition can be used, which may be shared.
Definition: amdsmi.h:1588
amdsmi_accelerator_partition_resource_profile_t::num_partitions_share_resource
uint32_t num_partitions_share_resource
If it is greater than 1, then resource is shared.
Definition: amdsmi.h:1589
amdsmi_asic_info_t
Definition: amdsmi.h:1238
amdsmi_asic_info_t::vendor_id
uint32_t vendor_id
Use 32 bit to be compatible with other platform.
Definition: amdsmi.h:1243
amdsmi_asic_info_t::device_id
uint64_t device_id
The unique id of a GPU.
Definition: amdsmi.h:1245
amdsmi_asic_info_t::subvendor_id
uint32_t subvendor_id
The subsystem vendor id.
Definition: amdsmi.h:1244
amdsmi_asic_info_t::subsystem_id
uint32_t subsystem_id
The subsystem device id.
Definition: amdsmi.h:1250
amdsmi_bdf_t::bdf_
Definition: amdsmi.h:1164
amdsmi_board_info_t
Definition: amdsmi.h:1315
amdsmi_clk_info_t
Definition: amdsmi.h:1276
amdsmi_cper_guid_t
Definition: amdsmi.h:1629
amdsmi_cper_hdr_t
Definition: amdsmi.h:1663
amdsmi_cper_timestamp_t
Definition: amdsmi.h:1642
amdsmi_cper_valid_bits_t::valid_bits_
Definition: amdsmi.h:1654
amdsmi_dfc_fw_data_t
Definition: amdsmi.h:1433
amdsmi_dfc_fw_header_t
Definition: amdsmi.h:1416
amdsmi_dfc_fw_t
Definition: amdsmi.h:1445
amdsmi_dfc_fw_ta_uuid_t
Definition: amdsmi.h:1429
amdsmi_dfc_fw_white_list_t
Definition: amdsmi.h:1424
amdsmi_dpm_policy_entry_t
Definition: amdsmi.h:1602
amdsmi_dpm_policy_t
Definition: amdsmi.h:1608
amdsmi_dpm_policy_t::cur
uint32_t cur
Definition: amdsmi.h:1617
amdsmi_dpm_policy_t::num_supported
uint32_t num_supported
Definition: amdsmi.h:1612
amdsmi_driver_info_t
Definition: amdsmi.h:1254
amdsmi_eeprom_table_record_t
Definition: amdsmi.h:1450
amdsmi_eeprom_table_record_t::retired_page
uint64_t retired_page
Bad page frame address.
Definition: amdsmi.h:1451
amdsmi_engine_usage_t
Definition: amdsmi.h:1269
amdsmi_error_count_t
Definition: amdsmi.h:1285
amdsmi_error_count_t::uncorrectable_count
uint64_t uncorrectable_count
Accumulated uncorrectable errors.
Definition: amdsmi.h:1287
amdsmi_error_count_t::correctable_count
uint64_t correctable_count
Accumulated correctable errors.
Definition: amdsmi.h:1286
amdsmi_error_count_t::deferred_count
uint64_t deferred_count
Accumulated deferred errors.
Definition: amdsmi.h:1288
amdsmi_event_entry_t
Definition: amdsmi.h:1302
amdsmi_event_entry_t::timestamp
uint64_t timestamp
UTC microseconds.
Definition: amdsmi.h:1305
amdsmi_fw_error_record_t
Definition: amdsmi.h:1471
amdsmi_fw_info_t
Definition: amdsmi.h:1228
amdsmi_fw_load_error_record_t
Definition: amdsmi.h:1463
amdsmi_fw_load_error_record_t::timestamp
uint64_t timestamp
UTC microseconds.
Definition: amdsmi.h:1464
amdsmi_fw_load_error_record_t::status
uint16_t status
Definition: amdsmi.h:1467
amdsmi_gpu_cache_info_t::cache_
Definition: amdsmi.h:1217
amdsmi_gpu_cache_info_t
Definition: amdsmi.h:1215
amdsmi_guard_info_t
Definition: amdsmi.h:1346
amdsmi_guest_data_t
Definition: amdsmi.h:1410
amdsmi_guest_data_t::fb_usage
uint32_t fb_usage
Definition: amdsmi.h:1412
amdsmi_link_metrics_t::links_
Definition: amdsmi.h:1479
amdsmi_link_metrics_t::links_::write
uint64_t write
total data transfered for each link in KB
Definition: amdsmi.h:1485
amdsmi_link_metrics_t::links_::link_type
amdsmi_link_type_t link_type
type of the link
Definition: amdsmi.h:1483
amdsmi_link_metrics_t::links_::max_bandwidth
uint32_t max_bandwidth
max bandwidth of the link
Definition: amdsmi.h:1482
amdsmi_link_metrics_t::links_::bit_rate
uint32_t bit_rate
current link speed in Gb/s
Definition: amdsmi.h:1481
amdsmi_link_metrics_t::links_::read
uint64_t read
total data received for each link in KB
Definition: amdsmi.h:1484
amdsmi_link_metrics_t::links_::link_status
amdsmi_link_status_t link_status
HW status of the link.
Definition: amdsmi.h:1486
amdsmi_link_metrics_t
Definition: amdsmi.h:1477
amdsmi_link_metrics_t::num_links
uint32_t num_links
number of links
Definition: amdsmi.h:1478
amdsmi_link_topology_t
Definition: amdsmi.h:1492
amdsmi_link_topology_t::weight
uint64_t weight
link weight
Definition: amdsmi.h:1493
amdsmi_link_topology_t::link_type
amdsmi_link_type_t link_type
type of the link
Definition: amdsmi.h:1495
amdsmi_link_topology_t::num_hops
uint8_t num_hops
number of hops
Definition: amdsmi.h:1496
amdsmi_link_topology_t::link_status
amdsmi_link_status_t link_status
HW status of the link.
Definition: amdsmi.h:1494
amdsmi_link_topology_t::fb_sharing
uint8_t fb_sharing
framebuffer sharing flag
Definition: amdsmi.h:1497
amdsmi_memory_partition_config_t::numa_range_
Definition: amdsmi.h:1567
amdsmi_memory_partition_config_t
Definition: amdsmi.h:1563
amdsmi_metric_t
Definition: amdsmi.h:1527
amdsmi_metric_t::res_group
amdsmi_metric_res_group_t res_group
Resource group this metric belongs to.
Definition: amdsmi.h:1534
amdsmi_metric_t::res_subgroup
amdsmi_metric_res_subgroup_t res_subgroup
Resource subgroup this metric belongs to.
Definition: amdsmi.h:1535
amdsmi_metric_t::flags
uint32_t flags
used to determine type of the metric (amdsmi_metric_type_t)
Definition: amdsmi.h:1531
amdsmi_metric_t::res_instance
uint32_t res_instance
Resource instance this metric belongs to.
Definition: amdsmi.h:1536
amdsmi_metric_t::vf_mask
uint32_t vf_mask
Mask of all active VFs + PF that this metric applies to.
Definition: amdsmi.h:1532
amdsmi_nps_caps_t::nps_flags_
Definition: amdsmi.h:1553
amdsmi_p2p_capability_t
Definition: amdsmi.h:1699
amdsmi_p2p_capability_t::is_iolink_coherent
uint8_t is_iolink_coherent
1 = true, 0 = false, UINT8_MAX = Not defined.
Definition: amdsmi.h:1700
amdsmi_partition_info_t
Definition: amdsmi.h:1340
amdsmi_pcie_info_t::pcie_metric_
Definition: amdsmi.h:1182
amdsmi_pcie_info_t::pcie_metric_::pcie_nak_received_count
uint64_t pcie_nak_received_count
total number of NAKs issued on the PCIe link by the receiver
Definition: amdsmi.h:1190
amdsmi_pcie_info_t::pcie_metric_::pcie_replay_count
uint64_t pcie_replay_count
total number of the replays issued on the PCIe link
Definition: amdsmi.h:1186
amdsmi_pcie_info_t::pcie_metric_::pcie_width
uint16_t pcie_width
current PCIe width
Definition: amdsmi.h:1183
amdsmi_pcie_info_t::pcie_metric_::pcie_speed
uint32_t pcie_speed
current PCIe speed in MT/s
Definition: amdsmi.h:1184
amdsmi_pcie_info_t::pcie_metric_::pcie_bandwidth
uint32_t pcie_bandwidth
current PCIe bandwidth in Mb/s
Definition: amdsmi.h:1185
amdsmi_pcie_info_t::pcie_metric_::pcie_l0_to_recovery_count
uint64_t pcie_l0_to_recovery_count
total number of times the PCIe link transitioned from L0 to the recovery state
Definition: amdsmi.h:1187
amdsmi_pcie_info_t::pcie_metric_::pcie_nak_sent_count
uint64_t pcie_nak_sent_count
total number of NAKs issued on the PCIe link by the device
Definition: amdsmi.h:1189
amdsmi_pcie_info_t::pcie_metric_::pcie_replay_roll_over_count
uint64_t pcie_replay_roll_over_count
total number of replay rollovers issued on the PCIe link
Definition: amdsmi.h:1188
amdsmi_pcie_info_t::pcie_metric_::pcie_lc_perf_other_end_recovery_count
uint32_t pcie_lc_perf_other_end_recovery_count
PCIe other end recovery counter.
Definition: amdsmi.h:1191
amdsmi_pcie_info_t::pcie_static_
Definition: amdsmi.h:1174
amdsmi_pcie_info_t::pcie_static_::max_pcie_width
uint16_t max_pcie_width
maximum number of PCIe lanes
Definition: amdsmi.h:1175
amdsmi_pcie_info_t::pcie_static_::max_pcie_interface_version
uint32_t max_pcie_interface_version
maximum PCIe link generation
Definition: amdsmi.h:1179
amdsmi_pcie_info_t::pcie_static_::slot_type
amdsmi_card_form_factor_t slot_type
card form factor
Definition: amdsmi.h:1178
amdsmi_pcie_info_t::pcie_static_::max_pcie_speed
uint32_t max_pcie_speed
maximum PCIe speed
Definition: amdsmi.h:1176
amdsmi_pcie_info_t::pcie_static_::pcie_interface_version
uint32_t pcie_interface_version
PCIe interface version.
Definition: amdsmi.h:1177
amdsmi_pcie_info_t
Definition: amdsmi.h:1173
amdsmi_pf_fb_info_t
Definition: amdsmi.h:1324
amdsmi_pf_fb_info_t::pf_fb_reserved
uint32_t pf_fb_reserved
Definition: amdsmi.h:1326
amdsmi_pf_fb_info_t::min_vf_fb_usable
uint32_t min_vf_fb_usable
Definition: amdsmi.h:1330
amdsmi_pf_fb_info_t::fb_alignment
uint32_t fb_alignment
Definition: amdsmi.h:1328
amdsmi_pf_fb_info_t::total_fb_size
uint32_t total_fb_size
Definition: amdsmi.h:1325
amdsmi_pf_fb_info_t::max_vf_fb_usable
uint32_t max_vf_fb_usable
Definition: amdsmi.h:1329
amdsmi_pf_fb_info_t::pf_fb_offset
uint32_t pf_fb_offset
Definition: amdsmi.h:1327
amdsmi_power_cap_info_t
Definition: amdsmi.h:1198
amdsmi_power_info_t
Definition: amdsmi.h:1261
amdsmi_power_info_t::soc_voltage
uint64_t soc_voltage
SOC voltage measurement in mV.
Definition: amdsmi.h:1264
amdsmi_power_info_t::mem_voltage
uint64_t mem_voltage
MEM voltage measurement in mV.
Definition: amdsmi.h:1265
amdsmi_power_info_t::gfx_voltage
uint64_t gfx_voltage
GFX voltage measurement in mV.
Definition: amdsmi.h:1263
amdsmi_profile_caps_info_t
Definition: amdsmi.h:1391
amdsmi_profile_info_t
Definition: amdsmi.h:1400
amdsmi_ras_feature_t
Definition: amdsmi.h:1292
amdsmi_ras_feature_t::supported_ecc_correction_schema
uint32_t supported_ecc_correction_schema
ecc_correction_schema mask used with amdsmi_ecc_correction_schema_support_t flags
Definition: amdsmi.h:1294
amdsmi_sched_info_t
Definition: amdsmi.h:1366
amdsmi_sched_info_t::boot_up_time
uint64_t boot_up_time
in microseconds
Definition: amdsmi.h:1368
amdsmi_topology_nearest_t
Definition: amdsmi.h:1501
amdsmi_vbios_info_t
Definition: amdsmi.h:1207
amdsmi_version_t
This structure holds version information.
Definition: amdsmi.h:1543
amdsmi_version_t::minor
uint32_t minor
Minor version.
Definition: amdsmi.h:1545
amdsmi_version_t::major
uint32_t major
Major version.
Definition: amdsmi.h:1544
amdsmi_version_t::release
uint32_t release
Patch, build or stepping version.
Definition: amdsmi.h:1546
amdsmi_vf_data_t
Definition: amdsmi.h:1385
amdsmi_vf_fb_info_t
Definition: amdsmi.h:1334
amdsmi_vf_fb_info_t::fb_size
uint32_t fb_size
Definition: amdsmi.h:1336
amdsmi_vf_fb_info_t::fb_offset
uint32_t fb_offset
Definition: amdsmi.h:1335
amdsmi_vf_handle_t
Definition: amdsmi.h:1298
amdsmi_vf_info_t
Definition: amdsmi.h:1360
amdsmi_vf_info_t::gfx_timeslice
uint32_t gfx_timeslice
Definition: amdsmi.h:1362
amdsmi_vram_info_t
Definition: amdsmi.h:1519
amdsmi_vram_info_t::vram_size
uint32_t vram_size
vram size in MB
Definition: amdsmi.h:1522
amdsmi_xgmi_fb_sharing_caps_t::cap_
Definition: amdsmi.h:1508
amdsmi_bdf_t
AUX STRUCTURES.
Definition: amdsmi.h:1163
amdsmi_cper_valid_bits_t
Definition: amdsmi.h:1653
amdsmi_nps_caps_t
This union holds memory partition bitmask.
Definition: amdsmi.h:1552
amdsmi_xgmi_fb_sharing_caps_t
Definition: amdsmi.h:1507