amdsmi.h Source File

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amdsmi.h

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1 /* Copyright Advanced Micro Devices, Inc.

2  *

3  * SPDX-License-Identifier: MIT

4  */

5 

6 #ifndef __AMDSMI_H__

7 #define __AMDSMI_H__

8 

14 #ifdef __cplusplus

15 #include <cstdint>

16 extern "C" {

17 #else

18 #include <stdint.h>

19 #endif

20 

21 #include <stdbool.h>

22 #include <stddef.h>

23 #include <time.h>

24 

32 typedef enum {

33  AMDSMI_INIT_ALL_PROCESSORS = 0xFFFFFFFF,

34  AMDSMI_INIT_AMD_CPUS = (1 << 0),

35  AMDSMI_INIT_AMD_GPUS = (1 << 1),

36  AMDSMI_INIT_NON_AMD_CPUS = (1 << 2),

37  AMDSMI_INIT_NON_AMD_GPUS = (1 << 3),

38  AMDSMI_INIT_AMD_APUS = (AMDSMI_INIT_AMD_CPUS | AMDSMI_INIT_AMD_GPUS),

40  AMDSMI_INIT_AMD_NICS = (1 << 4)

41 } amdsmi_init_flags_t;

42 

48 typedef void *amdsmi_processor_handle;

49 typedef void *amdsmi_socket_handle;

50 

56 typedef enum {

57  AMDSMI_PROCESSOR_TYPE_UNKNOWN = 0,

58  AMDSMI_PROCESSOR_TYPE_AMD_GPU,

59  AMDSMI_PROCESSOR_TYPE_AMD_CPU,

60  AMDSMI_PROCESSOR_TYPE_NON_AMD_GPU,

61  AMDSMI_PROCESSOR_TYPE_NON_AMD_CPU,

62  AMDSMI_PROCESSOR_TYPE_AMD_CPU_CORE,

63  AMDSMI_PROCESSOR_TYPE_AMD_APU,

64  AMDSMI_PROCESSOR_TYPE_AMD_NIC,

65  AMDSMI_PROCESSOR_TYPE_BRCM_NIC,

66  AMDSMI_PROCESSOR_TYPE_BRCM_SWITCH

67 } amdsmi_processor_type_t;

68 

78 typedef amdsmi_processor_type_t processor_type_t;

79 

88 typedef enum {

89  AMDSMI_STATUS_SUCCESS = 0,

90  // Library usage errors

91  AMDSMI_STATUS_INVAL = 1,

92  AMDSMI_STATUS_NOT_SUPPORTED = 2,

93  AMDSMI_STATUS_NOT_YET_IMPLEMENTED = 3,

94  AMDSMI_STATUS_FAIL_LOAD_MODULE = 4,

95  AMDSMI_STATUS_FAIL_LOAD_SYMBOL = 5,

96  AMDSMI_STATUS_DRM_ERROR = 6,

97  AMDSMI_STATUS_API_FAILED = 7,

98  AMDSMI_STATUS_TIMEOUT = 8,

99  AMDSMI_STATUS_RETRY = 9,

100  AMDSMI_STATUS_NO_PERM = 10,

101  AMDSMI_STATUS_INTERRUPT = 11,

102  AMDSMI_STATUS_IO = 12,

103  AMDSMI_STATUS_ADDRESS_FAULT = 13,

104  AMDSMI_STATUS_FILE_ERROR = 14,

105  AMDSMI_STATUS_OUT_OF_RESOURCES = 15,

106  AMDSMI_STATUS_INTERNAL_EXCEPTION = 16,

107  AMDSMI_STATUS_INPUT_OUT_OF_BOUNDS = 17,

108  AMDSMI_STATUS_INIT_ERROR = 18,

109  AMDSMI_STATUS_REFCOUNT_OVERFLOW = 19,

110  AMDSMI_STATUS_DIRECTORY_NOT_FOUND = 20,

111  AMDSMI_STATUS_IPC_ERROR = 21,

112  // Processor related errors

113  AMDSMI_STATUS_BUSY = 30,

114  AMDSMI_STATUS_NOT_FOUND = 31,

115  AMDSMI_STATUS_NOT_INIT = 32,

116  AMDSMI_STATUS_NO_SLOT = 33,

117  AMDSMI_STATUS_DRIVER_NOT_LOADED = 34,

118  // Data and size errors

119  AMDSMI_STATUS_MORE_DATA = 39,

120  AMDSMI_STATUS_NO_DATA = 40,

121  AMDSMI_STATUS_INSUFFICIENT_SIZE = 41,

122  AMDSMI_STATUS_UNEXPECTED_SIZE = 42,

123  AMDSMI_STATUS_UNEXPECTED_DATA = 43,

124  //esmi errors

125  AMDSMI_STATUS_NON_AMD_CPU = 44,

126  AMDSMI_STATUS_NO_ENERGY_DRV = 45,

127  AMDSMI_STATUS_NO_MSR_DRV = 46,

128  AMDSMI_STATUS_NO_HSMP_DRV = 47,

129  AMDSMI_STATUS_NO_HSMP_SUP = 48,

130  AMDSMI_STATUS_NO_HSMP_MSG_SUP = 49,

131  AMDSMI_STATUS_HSMP_TIMEOUT = 50,

132  AMDSMI_STATUS_NO_DRV = 51,

133  AMDSMI_STATUS_FILE_NOT_FOUND = 52,

134  AMDSMI_STATUS_ARG_PTR_NULL = 53,

135  AMDSMI_STATUS_AMDGPU_RESTART_ERR = 54,

136  AMDSMI_STATUS_SETTING_UNAVAILABLE = 55,

137  AMDSMI_STATUS_CORRUPTED_EEPROM = 56,

138  // General errors

139  AMDSMI_STATUS_MAP_ERROR = 0xFFFFFFFE,

140  AMDSMI_STATUS_UNKNOWN_ERROR = 0xFFFFFFFF,

141 } amdsmi_status_t;

142 

148 #define AMDSMI_MAX_NUM_XGMI_PHYSICAL_LINK 64

149 #define AMDSMI_MAX_NUM_PM_POLICIES 32

150 #define AMDSMI_MAX_CONTAINER_TYPE 2

151 

157 #define AMDSMI_MAX_MM_IP_COUNT 8

158 #define AMDSMI_MAX_DEVICES 32

159 #define AMDSMI_MAX_STRING_LENGTH 256

160 #define AMDSMI_MAX_CACHE_TYPES 10

161 #define AMDSMI_MAX_CP_PROFILE_RESOURCES 32

162 #define AMDSMI_MAX_ACCELERATOR_PARTITIONS 8

163 #define AMDSMI_MAX_ACCELERATOR_PROFILE 32

164 #define AMDSMI_MAX_NUM_NUMA_NODES 32

165 #define AMDSMI_GPU_UUID_SIZE 38

166 

172 #define MAX_NUMBER_OF_AFIDS_PER_RECORD 12

173 

179 #define AMDSMI_MAX_VF_COUNT 32

180 #define AMDSMI_MAX_DRIVER_NUM 2

181 #define AMDSMI_DFC_FW_NUMBER_OF_ENTRIES 9

182 #define AMDSMI_MAX_WHITE_LIST_ELEMENTS 16

183 #define AMDSMI_MAX_BLACK_LIST_ELEMENTS 64

184 #define AMDSMI_MAX_UUID_ELEMENTS 16

185 #define AMDSMI_MAX_TA_WHITE_LIST_ELEMENTS 8

186 #define AMDSMI_MAX_ERR_RECORDS 10

187 #define AMDSMI_MAX_PROFILE_COUNT 16

188 #define AMDSMI_MAX_NUM_FREQUENCIES 33

189 

195 #define AMDSMI_TIME_FORMAT "%02d:%02d:%02d.%03d"

196 #define AMDSMI_DATE_FORMAT "%04d-%02d-%02d:%02d:%02d:%02d.%03d"

197 

203 typedef void *amdsmi_node_handle;

204 

210 typedef enum {

211  AMDSMI_MEMORY_PARTITION_UNKNOWN = 0,

212  AMDSMI_MEMORY_PARTITION_NPS1 = 1,

214  AMDSMI_MEMORY_PARTITION_NPS2 = 2,

217  AMDSMI_MEMORY_PARTITION_NPS4 = 4,

220  AMDSMI_MEMORY_PARTITION_NPS8 = 8,

225 } amdsmi_memory_partition_type_t;

226 

232 typedef enum {

233  AMDSMI_ACCELERATOR_PARTITION_INVALID = 0,

234  AMDSMI_ACCELERATOR_PARTITION_SPX,

236  AMDSMI_ACCELERATOR_PARTITION_DPX,

238  AMDSMI_ACCELERATOR_PARTITION_TPX,

240  AMDSMI_ACCELERATOR_PARTITION_QPX,

242  AMDSMI_ACCELERATOR_PARTITION_CPX,

244  AMDSMI_ACCELERATOR_PARTITION_MAX

245 } amdsmi_accelerator_partition_type_t;

246 

252 typedef enum {

253  AMDSMI_VRAM_TYPE_UNKNOWN = 0,

254  // HBM

255  AMDSMI_VRAM_TYPE_HBM = 1,

256  AMDSMI_VRAM_TYPE_HBM2 = 2,

257  AMDSMI_VRAM_TYPE_HBM2E = 3,

258  AMDSMI_VRAM_TYPE_HBM3 = 4,

259  AMDSMI_VRAM_TYPE_HBM3E = 5,

260  // DDR

261  AMDSMI_VRAM_TYPE_DDR2 = 10,

262  AMDSMI_VRAM_TYPE_DDR3 = 11,

263  AMDSMI_VRAM_TYPE_DDR4 = 12,

264  AMDSMI_VRAM_TYPE_DDR5 = 13,

265  // GDDR

266  AMDSMI_VRAM_TYPE_GDDR1 = 17,

267  AMDSMI_VRAM_TYPE_GDDR2 = 18,

268  AMDSMI_VRAM_TYPE_GDDR3 = 19,

269  AMDSMI_VRAM_TYPE_GDDR4 = 20,

270  AMDSMI_VRAM_TYPE_GDDR5 = 21,

271  AMDSMI_VRAM_TYPE_GDDR6 = 22,

272  AMDSMI_VRAM_TYPE_GDDR7 = 23,

273  // LPDDR

274  AMDSMI_VRAM_TYPE_LPDDR4 = 30,

275  AMDSMI_VRAM_TYPE_LPDDR5 = 31,

276  AMDSMI_VRAM_TYPE__MAX = AMDSMI_VRAM_TYPE_LPDDR5

277 } amdsmi_vram_type_t;

278 

284 typedef enum {

285  AMDSMI_ACCELERATOR_XCC,

286  AMDSMI_ACCELERATOR_ENCODER,

287  AMDSMI_ACCELERATOR_DECODER,

288  AMDSMI_ACCELERATOR_DMA,

289  AMDSMI_ACCELERATOR_JPEG,

290  AMDSMI_ACCELERATOR_MAX

291 } amdsmi_accelerator_partition_resource_type_t;

292 

298 typedef enum {

299  AMDSMI_CLK_TYPE_SYS = 0x0,

300  AMDSMI_CLK_TYPE_FIRST = AMDSMI_CLK_TYPE_SYS,

301  AMDSMI_CLK_TYPE_GFX = AMDSMI_CLK_TYPE_SYS,

302  AMDSMI_CLK_TYPE_DF,

304  AMDSMI_CLK_TYPE_DCEF,

306  AMDSMI_CLK_TYPE_SOC,

307  AMDSMI_CLK_TYPE_MEM,

308  AMDSMI_CLK_TYPE_PCIE,

309  AMDSMI_CLK_TYPE_VCLK0,

310  AMDSMI_CLK_TYPE_VCLK1,

311  AMDSMI_CLK_TYPE_DCLK0,

312  AMDSMI_CLK_TYPE_DCLK1,

313  AMDSMI_CLK_TYPE__MAX = AMDSMI_CLK_TYPE_DCLK1

314 } amdsmi_clk_type_t;

315 

322 typedef enum {

323  AMDSMI_TEMPERATURE_TYPE_EDGE,

324  AMDSMI_TEMPERATURE_TYPE_FIRST = AMDSMI_TEMPERATURE_TYPE_EDGE,

325  AMDSMI_TEMPERATURE_TYPE_HOTSPOT,

326  AMDSMI_TEMPERATURE_TYPE_JUNCTION = AMDSMI_TEMPERATURE_TYPE_HOTSPOT,

327  AMDSMI_TEMPERATURE_TYPE_VRAM,

328  AMDSMI_TEMPERATURE_TYPE_HBM_0,

329  AMDSMI_TEMPERATURE_TYPE_HBM_1,

330  AMDSMI_TEMPERATURE_TYPE_HBM_2,

331  AMDSMI_TEMPERATURE_TYPE_HBM_3,

332  AMDSMI_TEMPERATURE_TYPE_PLX,

333 

334  // GPU Board Node temperature

335  AMDSMI_TEMPERATURE_TYPE_GPUBOARD_NODE_FIRST = 100,

336  AMDSMI_TEMPERATURE_TYPE_GPUBOARD_NODE_RETIMER_X =

337  AMDSMI_TEMPERATURE_TYPE_GPUBOARD_NODE_FIRST,

338  AMDSMI_TEMPERATURE_TYPE_GPUBOARD_NODE_OAM_X_IBC,

339  AMDSMI_TEMPERATURE_TYPE_GPUBOARD_NODE_OAM_X_IBC_2,

340  AMDSMI_TEMPERATURE_TYPE_GPUBOARD_NODE_OAM_X_VDD18_VR,

341  AMDSMI_TEMPERATURE_TYPE_GPUBOARD_NODE_OAM_X_04_HBM_B_VR,

342  AMDSMI_TEMPERATURE_TYPE_GPUBOARD_NODE_OAM_X_04_HBM_D_VR,

343  AMDSMI_TEMPERATURE_TYPE_GPUBOARD_NODE_LAST = 149,

344 

345  // GPU Board VR (Voltage Regulator) temperature

346  AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VR_FIRST = 150,

347  AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDCR_VDD0

348  = AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VR_FIRST,

349  AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDCR_VDD1,

350  AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDCR_VDD2,

351  AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDCR_VDD3,

352  AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDCR_SOC_A,

353  AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDCR_SOC_C,

354  AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDCR_SOCIO_A,

355  AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDCR_SOCIO_C,

356  AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDD_085_HBM,

357  AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDCR_11_HBM_B,

358  AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDCR_11_HBM_D,

359  AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDD_USR,

360  AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDIO_11_E32,

361  AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VR_LAST = 199,

362 

363  // Baseboard System temperature

364  AMDSMI_TEMPERATURE_TYPE_BASEBOARD_FIRST = 200,

365  AMDSMI_TEMPERATURE_TYPE_BASEBOARD_UBB_FPGA = AMDSMI_TEMPERATURE_TYPE_BASEBOARD_FIRST,

366  AMDSMI_TEMPERATURE_TYPE_BASEBOARD_UBB_FRONT,

367  AMDSMI_TEMPERATURE_TYPE_BASEBOARD_UBB_BACK,

368  AMDSMI_TEMPERATURE_TYPE_BASEBOARD_UBB_OAM7,

369  AMDSMI_TEMPERATURE_TYPE_BASEBOARD_UBB_IBC,

370  AMDSMI_TEMPERATURE_TYPE_BASEBOARD_UBB_UFPGA,

371  AMDSMI_TEMPERATURE_TYPE_BASEBOARD_UBB_OAM1,

372  AMDSMI_TEMPERATURE_TYPE_BASEBOARD_OAM_0_1_HSC,

373  AMDSMI_TEMPERATURE_TYPE_BASEBOARD_OAM_2_3_HSC,

374  AMDSMI_TEMPERATURE_TYPE_BASEBOARD_OAM_4_5_HSC,

375  AMDSMI_TEMPERATURE_TYPE_BASEBOARD_OAM_6_7_HSC,

376  AMDSMI_TEMPERATURE_TYPE_BASEBOARD_UBB_FPGA_0V72_VR,

377  AMDSMI_TEMPERATURE_TYPE_BASEBOARD_UBB_FPGA_3V3_VR,

378  AMDSMI_TEMPERATURE_TYPE_BASEBOARD_RETIMER_0_1_2_3_1V2_VR,

379  AMDSMI_TEMPERATURE_TYPE_BASEBOARD_RETIMER_4_5_6_7_1V2_VR,

380  AMDSMI_TEMPERATURE_TYPE_BASEBOARD_RETIMER_0_1_0V9_VR,

381  AMDSMI_TEMPERATURE_TYPE_BASEBOARD_RETIMER_4_5_0V9_VR,

382  AMDSMI_TEMPERATURE_TYPE_BASEBOARD_RETIMER_2_3_0V9_VR,

383  AMDSMI_TEMPERATURE_TYPE_BASEBOARD_RETIMER_6_7_0V9_VR,

384  AMDSMI_TEMPERATURE_TYPE_BASEBOARD_OAM_0_1_2_3_3V3_VR,

385  AMDSMI_TEMPERATURE_TYPE_BASEBOARD_OAM_4_5_6_7_3V3_VR,

386  AMDSMI_TEMPERATURE_TYPE_BASEBOARD_IBC_HSC,

387  AMDSMI_TEMPERATURE_TYPE_BASEBOARD_IBC,

388  AMDSMI_TEMPERATURE_TYPE_BASEBOARD_LAST = 249,

389  AMDSMI_TEMPERATURE_TYPE__MAX = AMDSMI_TEMPERATURE_TYPE_BASEBOARD_LAST

390 } amdsmi_temperature_type_t;

391 

398 typedef enum {

399  AMDSMI_TEMP_CURRENT = 0x0,

400  AMDSMI_TEMP_FIRST = AMDSMI_TEMP_CURRENT,

401  AMDSMI_TEMP_MAX,

402  AMDSMI_TEMP_MIN,

403  AMDSMI_TEMP_MAX_HYST,

405  AMDSMI_TEMP_MIN_HYST,

407  AMDSMI_TEMP_CRITICAL,

409  AMDSMI_TEMP_CRITICAL_HYST,

411  AMDSMI_TEMP_EMERGENCY,

415  AMDSMI_TEMP_EMERGENCY_HYST,

417  AMDSMI_TEMP_CRIT_MIN,

419  AMDSMI_TEMP_CRIT_MIN_HYST,

421  AMDSMI_TEMP_OFFSET,

423  AMDSMI_TEMP_LOWEST,

424  AMDSMI_TEMP_HIGHEST,

425  AMDSMI_TEMP_SHUTDOWN,

426  AMDSMI_TEMP_LAST = AMDSMI_TEMP_SHUTDOWN

427 } amdsmi_temperature_metric_t;

428 

434 typedef enum {

435  AMDSMI_CARD_FORM_FACTOR_PCIE,

436  AMDSMI_CARD_FORM_FACTOR_OAM,

437  AMDSMI_CARD_FORM_FACTOR_CEM,

438  AMDSMI_CARD_FORM_FACTOR_UNKNOWN

439 } amdsmi_card_form_factor_t;

440 

446 typedef enum {

447  AMDSMI_LINK_TYPE_INTERNAL = 0,

448  AMDSMI_LINK_TYPE_PCIE = 1,

449  AMDSMI_LINK_TYPE_XGMI = 2,

450  AMDSMI_LINK_TYPE_NOT_APPLICABLE = 3,

451  AMDSMI_LINK_TYPE_UNKNOWN = 4,

452  AMDSMI_LINK_TYPE_NUMA = 5,

453  AMDSMI_LINK_TYPE_XNUMA = 6

454 } amdsmi_link_type_t;

455 

461 typedef enum {

462  AMDSMI_CACHE_PROPERTY_ENABLED = 0x00000001,

463  AMDSMI_CACHE_PROPERTY_DATA_CACHE = 0x00000002,

464  AMDSMI_CACHE_PROPERTY_INST_CACHE = 0x00000004,

465  AMDSMI_CACHE_PROPERTY_CPU_CACHE = 0x00000008,

466  AMDSMI_CACHE_PROPERTY_SIMD_CACHE = 0x00000010

467 } amdsmi_cache_property_type_t;

468 

474 typedef enum {

475  AMDSMI_GPU_BLOCK_INVALID = 0,

476  AMDSMI_GPU_BLOCK_FIRST = (1ULL << 0),

477  AMDSMI_GPU_BLOCK_UMC = AMDSMI_GPU_BLOCK_FIRST,

478  AMDSMI_GPU_BLOCK_SDMA = (1ULL << 1),

479  AMDSMI_GPU_BLOCK_GFX = (1ULL << 2),

480  AMDSMI_GPU_BLOCK_MMHUB = (1ULL << 3),

481  AMDSMI_GPU_BLOCK_ATHUB = (1ULL << 4),

482  AMDSMI_GPU_BLOCK_PCIE_BIF = (1ULL << 5),

483  AMDSMI_GPU_BLOCK_HDP = (1ULL << 6),

484  AMDSMI_GPU_BLOCK_XGMI_WAFL = (1ULL << 7),

485  AMDSMI_GPU_BLOCK_DF = (1ULL << 8),

486  AMDSMI_GPU_BLOCK_SMN = (1ULL << 9),

487  AMDSMI_GPU_BLOCK_SEM = (1ULL << 10),

488  AMDSMI_GPU_BLOCK_MP0 = (1ULL << 11),

489  AMDSMI_GPU_BLOCK_MP1 = (1ULL << 12),

490  AMDSMI_GPU_BLOCK_FUSE = (1ULL << 13),

491  AMDSMI_GPU_BLOCK_MCA = (1ULL << 14),

492  AMDSMI_GPU_BLOCK_VCN = (1ULL << 15),

493  AMDSMI_GPU_BLOCK_JPEG = (1ULL << 16),

494  AMDSMI_GPU_BLOCK_IH = (1ULL << 17),

495  AMDSMI_GPU_BLOCK_MPIO = (1ULL << 18),

496  AMDSMI_GPU_BLOCK_LAST = AMDSMI_GPU_BLOCK_MPIO,

497  AMDSMI_GPU_BLOCK_RESERVED = (1ULL << 63)

498 } amdsmi_gpu_block_t;

499 

506 typedef enum {

507  AMDSMI_FW_ID_SMU = 1,

509  AMDSMI_FW_ID_FIRST = AMDSMI_FW_ID_SMU,

510  AMDSMI_FW_ID_CP_CE,

511  AMDSMI_FW_ID_CP_PFP,

512  AMDSMI_FW_ID_CP_ME,

513  AMDSMI_FW_ID_CP_MEC_JT1,

514  AMDSMI_FW_ID_CP_MEC_JT2,

515  AMDSMI_FW_ID_CP_MEC1,

516  AMDSMI_FW_ID_CP_MEC2,

517  AMDSMI_FW_ID_RLC,

518  AMDSMI_FW_ID_SDMA0,

519  AMDSMI_FW_ID_SDMA1,

520  AMDSMI_FW_ID_SDMA2,

521  AMDSMI_FW_ID_SDMA3,

522  AMDSMI_FW_ID_SDMA4,

523  AMDSMI_FW_ID_SDMA5,

524  AMDSMI_FW_ID_SDMA6,

525  AMDSMI_FW_ID_SDMA7,

526  AMDSMI_FW_ID_VCN,

527  AMDSMI_FW_ID_UVD,

528  AMDSMI_FW_ID_VCE,

529  AMDSMI_FW_ID_ISP,

530  AMDSMI_FW_ID_DMCU_ERAM,

531  AMDSMI_FW_ID_DMCU_ISR,

532  AMDSMI_FW_ID_RLC_RESTORE_LIST_GPM_MEM,

533  AMDSMI_FW_ID_RLC_RESTORE_LIST_SRM_MEM,

534  AMDSMI_FW_ID_RLC_RESTORE_LIST_CNTL,

535  AMDSMI_FW_ID_RLC_V,

536  AMDSMI_FW_ID_MMSCH,

537  AMDSMI_FW_ID_PSP_SYSDRV,

538  AMDSMI_FW_ID_PSP_SOSDRV,

539  AMDSMI_FW_ID_PSP_TOC,

540  AMDSMI_FW_ID_PSP_KEYDB,

541  AMDSMI_FW_ID_DFC,

542  AMDSMI_FW_ID_PSP_SPL,

543  AMDSMI_FW_ID_DRV_CAP,

544  AMDSMI_FW_ID_MC,

545  AMDSMI_FW_ID_PSP_BL,

546  AMDSMI_FW_ID_CP_PM4,

547  AMDSMI_FW_ID_RLC_P,

548  AMDSMI_FW_ID_SEC_POLICY_STAGE2,

549  AMDSMI_FW_ID_REG_ACCESS_WHITELIST,

550  AMDSMI_FW_ID_IMU_DRAM,

551  AMDSMI_FW_ID_IMU_IRAM,

552  AMDSMI_FW_ID_SDMA_TH0,

553  AMDSMI_FW_ID_SDMA_TH1,

554  AMDSMI_FW_ID_CP_MES,

555  AMDSMI_FW_ID_MES_KIQ,

556  AMDSMI_FW_ID_MES_STACK,

557  AMDSMI_FW_ID_MES_THREAD1,

558  AMDSMI_FW_ID_MES_THREAD1_STACK,

559  AMDSMI_FW_ID_RLX6,

560  AMDSMI_FW_ID_RLX6_DRAM_BOOT,

561  AMDSMI_FW_ID_RS64_ME,

562  AMDSMI_FW_ID_RS64_ME_P0_DATA,

563  AMDSMI_FW_ID_RS64_ME_P1_DATA,

564  AMDSMI_FW_ID_RS64_PFP,

565  AMDSMI_FW_ID_RS64_PFP_P0_DATA,

566  AMDSMI_FW_ID_RS64_PFP_P1_DATA,

567  AMDSMI_FW_ID_RS64_MEC,

568  AMDSMI_FW_ID_RS64_MEC_P0_DATA,

569  AMDSMI_FW_ID_RS64_MEC_P1_DATA,

570  AMDSMI_FW_ID_RS64_MEC_P2_DATA,

571  AMDSMI_FW_ID_RS64_MEC_P3_DATA,

572  AMDSMI_FW_ID_PPTABLE,

573  AMDSMI_FW_ID_PSP_SOC,

574  AMDSMI_FW_ID_PSP_DBG,

575  AMDSMI_FW_ID_PSP_INTF,

576  AMDSMI_FW_ID_RLX6_CORE1,

577  AMDSMI_FW_ID_RLX6_DRAM_BOOT_CORE1,

578  AMDSMI_FW_ID_RLCV_LX7,

579  AMDSMI_FW_ID_RLC_SAVE_RESTORE_LIST,

580  AMDSMI_FW_ID_ASD,

581  AMDSMI_FW_ID_TA_RAS,

582  AMDSMI_FW_ID_TA_XGMI,

583  AMDSMI_FW_ID_XGMI,

584  AMDSMI_FW_ID_RLC_SRLG,

585  AMDSMI_FW_ID_RLC_SRLS,

586  AMDSMI_FW_ID_PM,

587  AMDSMI_FW_ID_SMC,

588  AMDSMI_FW_ID_DMCU,

589  AMDSMI_FW_ID_PSP_RAS,

590  AMDSMI_FW_ID_P2S_TABLE,

591  AMDSMI_FW_ID_PLDM_BUNDLE,

592  AMDSMI_FW_ID__MAX

593 } amdsmi_fw_block_t;

594 

603 typedef enum {

604  AMDSMI_VIRTUALIZATION_MODE_UNKNOWN = 0,

605  AMDSMI_VIRTUALIZATION_MODE_BAREMETAL,

606  AMDSMI_VIRTUALIZATION_MODE_HOST,

607  AMDSMI_VIRTUALIZATION_MODE_GUEST,

608  AMDSMI_VIRTUALIZATION_MODE_PASSTHROUGH

609 } amdsmi_virtualization_mode_t;

610 

616 typedef enum {

617  AMDSMI_AFFINITY_SCOPE_NODE,

618  AMDSMI_AFFINITY_SCOPE_SOCKET

619 } amdsmi_affinity_scope_t;

620 

626 typedef enum {

627  AMDSMI_NPM_STATUS_DISABLED,

628  AMDSMI_NPM_STATUS_ENABLED

629 } amdsmi_npm_status_t;

630 

636 typedef enum {

637  AMDSMI_LINK_STATUS_ENABLED = 0,

638  AMDSMI_LINK_STATUS_DISABLED = 1,

639  AMDSMI_LINK_STATUS_INACTIVE = 2,

640  AMDSMI_LINK_STATUS_ERROR = 3

641 } amdsmi_link_status_t;

642 

651 typedef enum {

652  AMDSMI_PTL_DATA_FORMAT_I8 = 0x0,

653  AMDSMI_PTL_DATA_FORMAT_F16 = 0x1,

654  AMDSMI_PTL_DATA_FORMAT_BF16 = 0x2,

655  AMDSMI_PTL_DATA_FORMAT_F32 = 0x3,

656  AMDSMI_PTL_DATA_FORMAT_F64 = 0x4,

657  AMDSMI_PTL_DATA_FORMAT_F8 = 0x5,

658  AMDSMI_PTL_DATA_FORMAT_VECTOR = 0x6,

659  AMDSMI_PTL_DATA_FORMAT_INVALID = 0xFFFFFFFF

660 } amdsmi_ptl_data_format_t;

661 

667 typedef union {

668  struct bdf_ {

669  uint64_t function_number : 3;

670  uint64_t device_number : 5;

671  uint64_t bus_number : 8;

672  uint64_t domain_number : 48;

673  } bdf;

674  struct {

675  uint64_t function_number : 3;

676  uint64_t device_number : 5;

677  uint64_t bus_number : 8;

678  uint64_t domain_number : 48;

679  };

680  uint64_t as_uint;

681 } amdsmi_bdf_t;

682 

688 typedef struct {

689  struct pcie_static_ {

690  uint16_t max_pcie_width;

691  uint32_t max_pcie_speed;

692  uint32_t pcie_interface_version;

693  amdsmi_card_form_factor_t slot_type;

694  uint32_t max_pcie_interface_version;

695  uint64_t reserved[9];

696  } pcie_static;

697  struct pcie_metric_ {

698  uint16_t pcie_width;

699  uint32_t pcie_speed;

700  uint32_t pcie_bandwidth;

701  uint64_t pcie_replay_count;

702  uint64_t pcie_l0_to_recovery_count;

703  uint64_t pcie_replay_roll_over_count;

704  uint64_t pcie_nak_sent_count;

705  uint64_t pcie_nak_received_count;

706  uint32_t pcie_lc_perf_other_end_recovery_count;

707  uint64_t reserved[12];

708  } pcie_metric;

709  uint64_t reserved[32];

710 } amdsmi_pcie_info_t;

711 

717 typedef struct {

718  bool has_deep_sleep;

719  uint32_t num_supported;

720  uint32_t current;

721  uint64_t frequency[AMDSMI_MAX_NUM_FREQUENCIES];

723 } amdsmi_frequencies_t;

724 

734 typedef struct {

735  amdsmi_frequencies_t transfer_rate;

736  uint32_t lanes[AMDSMI_MAX_NUM_FREQUENCIES];

737 } amdsmi_pcie_bandwidth_t;

738 

744 typedef struct {

745  uint32_t num_links;

746  struct _links {

747  amdsmi_bdf_t bdf;

748  uint32_t bit_rate;

749  uint32_t max_bandwidth;

750  amdsmi_link_type_t link_type;

751  uint64_t read;

752  uint64_t write;

753  amdsmi_link_status_t link_status;

754  uint64_t reserved[1];

755  } links[AMDSMI_MAX_NUM_XGMI_PHYSICAL_LINK];

756  uint64_t reserved[7];

757 } amdsmi_link_metrics_t;

758 

764 typedef struct {

765  uint64_t power_cap;

766  uint64_t default_power_cap;

767  uint64_t dpm_cap;

768  uint64_t min_power_cap;

769  uint64_t max_power_cap;

770  uint64_t reserved[3];

771 } amdsmi_power_cap_info_t;

772 

778 typedef enum {

779  AMDSMI_POWER_CAP_TYPE_PPT0,

780  AMDSMI_POWER_CAP_TYPE_PPT1,

781 } amdsmi_power_cap_type_t;

782 

788 typedef struct {

789  char name[AMDSMI_MAX_STRING_LENGTH];

790  char build_date[AMDSMI_MAX_STRING_LENGTH];

791  char part_number[AMDSMI_MAX_STRING_LENGTH];

792  char version[AMDSMI_MAX_STRING_LENGTH];

793  char boot_firmware[AMDSMI_MAX_STRING_LENGTH];

794  uint64_t reserved[36];

795 } amdsmi_vbios_info_t;

796 

802 typedef struct {

803  char market_name[AMDSMI_MAX_STRING_LENGTH];

804  uint32_t vendor_id;

805  char vendor_name[AMDSMI_MAX_STRING_LENGTH];

806  uint32_t subvendor_id;

807  uint64_t device_id;

808  uint32_t rev_id;

809  char asic_serial[AMDSMI_MAX_STRING_LENGTH];

810  uint32_t oam_id;

811  uint32_t num_of_compute_units;

812  uint64_t target_graphics_version;

813  uint32_t subsystem_id;

814  uint64_t flags;

815  uint32_t reserved[18];

816 } amdsmi_asic_info_t;

817 

825 typedef struct {

826  uint64_t socket_power;

827  uint32_t current_socket_power;

828  uint32_t average_socket_power;

829  uint64_t gfx_voltage;

830  uint64_t soc_voltage;

831  uint64_t mem_voltage;

832  uint32_t power_limit;

833  uint32_t ubb_power;

834  uint64_t reserved[18];

835 } amdsmi_power_info_t;

836 

842 typedef struct {

843  char driver_version[AMDSMI_MAX_STRING_LENGTH];

844  char driver_date[AMDSMI_MAX_STRING_LENGTH];

845  char driver_name[AMDSMI_MAX_STRING_LENGTH];

846  uint64_t reserved[64];

847 } amdsmi_driver_info_t;

848 

854 typedef struct {

855  amdsmi_vram_type_t vram_type;

856  char vram_vendor[AMDSMI_MAX_STRING_LENGTH];

857  uint64_t vram_size;

858  uint32_t vram_bit_width;

859  uint64_t vram_max_bandwidth;

860  uint64_t reserved[37];

861 } amdsmi_vram_info_t;

862 

872 typedef struct {

873  uint32_t gfx_activity;

874  uint32_t umc_activity;

875  uint32_t mm_activity;

876  uint32_t reserved[13];

877 } amdsmi_engine_usage_t;

878 

884 typedef struct {

885  uint32_t clk;

886  uint32_t min_clk;

887  uint32_t max_clk;

888  uint8_t clk_locked;

889  uint8_t clk_deep_sleep;

890  uint32_t reserved[4];

891 } amdsmi_clk_info_t;

892 

898 typedef struct {

899  uint64_t correctable_count;

900  uint64_t uncorrectable_count;

901  uint64_t deferred_count;

902  uint64_t reserved[5];

903 } amdsmi_error_count_t;

904 

910 typedef union {

911  struct nps_flags_ {

912  uint32_t nps1_cap :1;

913  uint32_t nps2_cap :1;

914  uint32_t nps4_cap :1;

915  uint32_t nps8_cap :1;

916  uint32_t reserved :28;

917  } nps_flags;

918  uint32_t nps_cap_mask;

919 } amdsmi_nps_caps_t;

920 

927 typedef struct {

928  amdsmi_nps_caps_t partition_caps;

929  amdsmi_memory_partition_type_t mp_mode;

930  uint32_t num_numa_ranges;

931  struct numa_range_ {

932  amdsmi_vram_type_t memory_type;

933  uint64_t start;

934  uint64_t end;

935  } numa_range[AMDSMI_MAX_NUM_NUMA_NODES];

936  uint64_t reserved[11];

937 } amdsmi_memory_partition_config_t;

938 

944 typedef struct {

945  amdsmi_accelerator_partition_type_t profile_type;

946  uint32_t num_partitions;

947  amdsmi_nps_caps_t memory_caps;

948  uint32_t profile_index;

949  uint32_t num_resources;

950  uint32_t resources[AMDSMI_MAX_ACCELERATOR_PARTITIONS][AMDSMI_MAX_CP_PROFILE_RESOURCES];

951  uint64_t reserved[13];

952 } amdsmi_accelerator_partition_profile_t;

953 

960 typedef struct {

961  uint32_t profile_index;

962  amdsmi_accelerator_partition_resource_type_t resource_type;

963  uint32_t partition_resource;

964  uint32_t num_partitions_share_resource;

965  uint64_t reserved[6];

966 } amdsmi_accelerator_partition_resource_profile_t;

967 

973 typedef struct {

974  uint32_t num_profiles;

975  uint32_t num_resource_profiles;

976  amdsmi_accelerator_partition_resource_profile_t

977  resource_profiles[AMDSMI_MAX_CP_PROFILE_RESOURCES];

978  uint32_t default_profile_index;

979  amdsmi_accelerator_partition_profile_t profiles[AMDSMI_MAX_ACCELERATOR_PROFILE];

980  uint64_t reserved[30];

981 } amdsmi_accelerator_partition_profile_config_t;

982 

988 typedef struct {

989  char model_number[AMDSMI_MAX_STRING_LENGTH];

990  char product_serial[AMDSMI_MAX_STRING_LENGTH];

991  char fru_id[AMDSMI_MAX_STRING_LENGTH];

992  char product_name[AMDSMI_MAX_STRING_LENGTH];

993  char manufacturer_name[AMDSMI_MAX_STRING_LENGTH];

994  uint64_t reserved[64];

995 } amdsmi_board_info_t;

996 

1002 typedef struct {

1003  uint8_t is_iolink_coherent;

1004  uint8_t is_iolink_atomics_32bit;

1005  uint8_t is_iolink_atomics_64bit;

1006  uint8_t is_iolink_dma;

1007  uint8_t is_iolink_bi_directional;

1008 } amdsmi_p2p_capability_t;

1009 

1015 typedef struct {

1016  amdsmi_npm_status_t status;

1017  uint64_t limit;

1018  uint32_t ubb_power_threshold;

1019  uint64_t reserved[5];

1020 } amdsmi_npm_info_t;

1021 

1027 typedef struct {

1028  uint32_t num_cache_types;

1029  struct cache_ {

1030  uint32_t cache_properties;

1031  uint32_t cache_size;

1032  uint32_t cache_level;

1033  uint32_t max_num_cu_shared;

1034  uint32_t num_cache_instance;

1035  uint32_t reserved[3];

1036  } cache[AMDSMI_MAX_CACHE_TYPES];

1037  uint32_t reserved[15];

1038 } amdsmi_gpu_cache_info_t;

1039 

1045 typedef struct {

1046  uint8_t num_fw_info;

1047  struct fw_info_list_ {

1048  amdsmi_fw_block_t fw_id;

1049  uint64_t fw_version;

1050  uint64_t reserved[2];

1051  } fw_info_list[AMDSMI_FW_ID__MAX];

1052  uint32_t reserved[7];

1053 } amdsmi_fw_info_t;

1054 

1060 typedef struct {

1061  uint32_t policy_id;

1062  char policy_description[AMDSMI_MAX_STRING_LENGTH];

1063 } amdsmi_dpm_policy_entry_t;

1064 

1072 typedef struct {

1073  uint32_t num_supported;

1074  uint32_t current;

1075  amdsmi_dpm_policy_entry_t policies[AMDSMI_MAX_NUM_PM_POLICIES];

1076 } amdsmi_dpm_policy_t;

1077 

1083 typedef struct {

1084  uint32_t ras_eeprom_version;

1086  uint32_t ecc_correction_schema_flag;

1089  struct ras_info_ {

1090  uint32_t dram_ecc : 1;

1091  uint32_t sram_ecc : 1;

1092  uint32_t poisoning : 1;

1093  uint32_t rsvd : 29;

1094  } ras_info;

1095  bool needs_reboot;

1096 } amdsmi_ras_feature_t;

1097 

1103 typedef enum {

1104  AMDSMI_CPER_SEV_NON_FATAL_UNCORRECTED = 0,

1105  AMDSMI_CPER_SEV_FATAL = 1,

1106  AMDSMI_CPER_SEV_NON_FATAL_CORRECTED = 2,

1107  AMDSMI_CPER_SEV_NUM = 3,

1108  AMDSMI_CPER_SEV_UNUSED = 10

1109 } amdsmi_cper_sev_t;

1110 

1116 typedef enum {

1117  AMDSMI_CPER_NOTIFY_TYPE_CMC = 0x450eBDD72DCE8BB1,

1118  AMDSMI_CPER_NOTIFY_TYPE_CPE = 0x4a55D8434E292F96,

1119  AMDSMI_CPER_NOTIFY_TYPE_MCE = 0x4cc5919CE8F56FFE,

1120  AMDSMI_CPER_NOTIFY_TYPE_PCIE = 0x4dfc1A16CF93C01F,

1121  AMDSMI_CPER_NOTIFY_TYPE_INIT = 0x454a9308CC5263E8,

1122  AMDSMI_CPER_NOTIFY_TYPE_NMI = 0x42c9B7E65BAD89FF,

1123  AMDSMI_CPER_NOTIFY_TYPE_BOOT = 0x409aAB403D61A466,

1124  AMDSMI_CPER_NOTIFY_TYPE_DMAR = 0x4c27C6B3667DD791,

1125  AMDSMI_CPER_NOTIFY_TYPE_SEA = 0x11E4BBE89A78788A,

1126  AMDSMI_CPER_NOTIFY_TYPE_SEI = 0x4E87B0AE5C284C81,

1127  AMDSMI_CPER_NOTIFY_TYPE_PEI = 0x4214520409A9D5AC,

1128  AMDSMI_CPER_NOTIFY_TYPE_CXL_COMPONENT = 0x49A341DF69293BC9

1130 } amdsmi_cper_notify_type_t;

1131 

1137 typedef struct {

1138  uint16_t dram_non_critical_region_threshold;

1139  uint16_t dram_critical_region_threshold;

1140 } amdsmi_gpu_ras_policy_v4_0_t;

1141 

1148 typedef struct {

1149  uint8_t major_version;

1150  uint8_t minor_version;

1151  union policy_data_ {

1152  amdsmi_gpu_ras_policy_v4_0_t v4_0;

1153  uint64_t info[5];

1154  } policy_data;

1155 } amdsmi_gpu_ras_policy_info_t;

1156 

1157 #pragma pack(push, 1)

1158 

1164 typedef struct {

1165  unsigned char b[16];

1166 } amdsmi_cper_guid_t;

1167 

1168 typedef struct {

1169  uint8_t seconds;

1170  uint8_t minutes;

1171  uint8_t hours;

1172  uint8_t flag;

1173  uint8_t day;

1174  uint8_t month;

1175  uint8_t year;

1176  uint8_t century;

1177 } amdsmi_cper_timestamp_t;

1178 

1179 typedef union {

1180  struct valid_bits_ {

1181  uint32_t platform_id : 1;

1182  uint32_t timestamp : 1;

1183  uint32_t partition_id : 1;

1184  uint32_t reserved : 29;

1185  } valid_bits;

1186  uint32_t valid_mask;

1187 } amdsmi_cper_valid_bits_t;

1188 

1189 typedef struct {

1190  char signature[4];

1191  uint16_t revision;

1192  uint32_t signature_end;

1193  uint16_t sec_cnt;

1194  amdsmi_cper_sev_t error_severity;

1195  amdsmi_cper_valid_bits_t cper_valid_bits;

1196  uint32_t record_length;

1197  amdsmi_cper_timestamp_t timestamp;

1198  char platform_id[16];

1199  amdsmi_cper_guid_t partition_id;

1200  char creator_id[16];

1201  amdsmi_cper_guid_t notify_type;

1202  char record_id[8];

1203  uint32_t flags;

1204  uint64_t persistence_info;

1205  uint8_t reserved[12];

1206 } amdsmi_cper_hdr_t;

1207 

1208 #pragma pack(pop)

1209 

1215 #define SMI_VERSION_ALPHA_0 0x00000002

1216 #define SMI_VERSION_BETA_0 0x00000003

1217 #define SMI_VERSION_BETA_1 0x00000004

1218 #define SMI_VERSION_BETA_2 0x00000005

1219 #define SMI_VERSION_BETA_3 0x00000006

1220 #define SMI_VERSION_BETA_4 0x00000007

1221 

1229 #define AMDSMI_MASK_ALL (~0ULL)

1230 

1232 #define AMDSMI_MASK_DEFAULT ((1ULL << 62) - 1)

1233 

1235 #define AMDSMI_MASK_INIT (0ULL)

1236 

1238 #define AMDSMI_MASK_HIGH_AND_MED_SEVERITY (~((1ULL << 61) - 1))

1239 

1245 #define AMDSMI_MASK_HIGH_ERROR_SEVERITY_ONLY(mask) (mask & ((1ULL << 60) - 1))

1246 #define AMDSMI_MASK_INCLUDE_MED_ERROR_SEVERITY(mask) (mask | (1ULL << 60))

1247 #define AMDSMI_MASK_INCLUDE_LOW_ERROR_SEVERITY(mask) (mask | (1ULL << 61))

1248 #define AMDSMI_MASK_INCLUDE_WARN_SEVERITY(mask) (mask | (1ULL << 62))

1249 #define AMDSMI_MASK_INCLUDE_INFO_SEVERITY(mask) (mask | (1ULL << 63))

1250 

1256 #define AMDSMI_MASK_HIGH_SEVERITY_ONLY(mask) (mask & ((1ULL << 62) - 1))

1257 #define AMDSMI_MASK_INCLUDE_MED_SEVERITY(mask) AMDSMI_MASK_INCLUDE_WARN_SEVERITY(mask)

1258 #define AMDSMI_MASK_INCLUDE_LOW_SEVERITY(mask) AMDSMI_MASK_INCLUDE_INFO_SEVERITY(mask)

1259 

1260 #define AMDSMI_MASK_INCLUDE_CATEGORY(mask, cate) (mask | (1ULL << cate))

1261 #define AMDSMI_MASK_EXCLUDE_CATEGORY(mask, cate) (mask & (~(1ULL << cate)))

1262 

1263 #define AMDSMI_MAX_FB_SHARING_GROUPS 64

1264 #define AMDSMI_MAX_NUM_CONNECTED_NODES 64

1265 

1266 #define AMDSMI_MAX_NUM_METRICS_V1 255

1267 #define AMDSMI_MAX_NUM_METRICS_V2 512

1268 #define AMDSMI_MAX_NUM_METRICS AMDSMI_MAX_NUM_METRICS_V2

1269 

1270 #define AMDSMI_MAX_BAD_PAGE_RECORD_V1 512

1271 #define AMDSMI_MAX_BAD_PAGE_RECORD_V2 16384

1272 #define AMDSMI_MAX_BAD_PAGE_RECORD AMDSMI_MAX_BAD_PAGE_RECORD_V2

1273 

1274 #define AMDSMI_FABRIC_PPOD_ID_SIZE 16

1275 

1282 #define AMDSMI_FABRIC_VERSION_MAJOR(v) ((uint16_t)(((v) >> 16) & 0xFFFFu))

1283 #define AMDSMI_FABRIC_VERSION_MINOR(v) ((uint16_t)((v) & 0xFFFFu))

1284 

1290 #define AMDSMI_MAX_DATE_STRING_LENGTH 32

1291 

1297 typedef void *amdsmi_event_set;

1298 

1304 typedef enum {

1305  AMDSMI_EVENT_CATEGORY_NON_USED = 0,

1306  AMDSMI_EVENT_CATEGORY_DRIVER = 1,

1307  AMDSMI_EVENT_CATEGORY_RESET = 2,

1308  AMDSMI_EVENT_CATEGORY_SCHED = 3,

1309  AMDSMI_EVENT_CATEGORY_VBIOS = 4,

1310  AMDSMI_EVENT_CATEGORY_ECC = 5,

1311  AMDSMI_EVENT_CATEGORY_PP = 6,

1312  AMDSMI_EVENT_CATEGORY_IOV = 7,

1313  AMDSMI_EVENT_CATEGORY_VF = 8,

1314  AMDSMI_EVENT_CATEGORY_FW = 9,

1315  AMDSMI_EVENT_CATEGORY_GPU = 10,

1316  AMDSMI_EVENT_CATEGORY_GUARD = 11,

1317  AMDSMI_EVENT_CATEGORY_GPUMON = 12,

1318  AMDSMI_EVENT_CATEGORY_MMSCH = 13,

1319  AMDSMI_EVENT_CATEGORY_XGMI = 14,

1320  AMDSMI_EVENT_CATEGORY__MAX

1321 } amdsmi_event_category_t;

1322 

1328 typedef enum {

1329  AMDSMI_EVENT_GPU_DEVICE_LOST = 0,

1330  AMDSMI_EVENT_GPU_NOT_SUPPORTED,

1331  AMDSMI_EVENT_GPU_RMA,

1332  AMDSMI_EVENT_GPU_NOT_INITIALIZED,

1333  AMDSMI_EVENT_GPU_MMSCH_ABNORMAL_STATE,

1334  AMDSMI_EVENT_GPU_RLCV_ABNORMAL_STATE,

1335  AMDSMI_EVENT_GPU_SDMA_ENGINE_BUSY,

1336  AMDSMI_EVENT_GPU_RLC_ENGINE_BUSY,

1337  AMDSMI_EVENT_GPU_GC_ENGINE_BUSY,

1338  AMDSMI_EVENT_GPU__MAX

1339 } amdsmi_event_gpu_t;

1340 

1346 typedef enum {

1347  AMDSMI_EVENT_DRIVER_SPIN_LOCK_BUSY = 0,

1348  AMDSMI_EVENT_DRIVER_ALLOC_SYSTEM_MEM_FAIL,

1349  AMDSMI_EVENT_DRIVER_CREATE_GFX_WORKQUEUE_FAIL,

1350  AMDSMI_EVENT_DRIVER_CREATE_MM_WORKQUEUE_FAIL,

1351  AMDSMI_EVENT_DRIVER_BUFFER_OVERFLOW,

1352 

1353  AMDSMI_EVENT_DRIVER_DEV_INIT_FAIL,

1354  AMDSMI_EVENT_DRIVER_CREATE_THREAD_FAIL,

1355  AMDSMI_EVENT_DRIVER_NO_ACCESS_PCI_REGION,

1356  AMDSMI_EVENT_DRIVER_MMIO_FAIL,

1357  AMDSMI_EVENT_DRIVER_INTERRUPT_INIT_FAIL,

1358 

1359  AMDSMI_EVENT_DRIVER_INVALID_VALUE,

1360  AMDSMI_EVENT_DRIVER_CREATE_MUTEX_FAIL,

1361  AMDSMI_EVENT_DRIVER_CREATE_TIMER_FAIL,

1362  AMDSMI_EVENT_DRIVER_CREATE_EVENT_FAIL,

1363  AMDSMI_EVENT_DRIVER_CREATE_SPIN_LOCK_FAIL,

1364 

1365  AMDSMI_EVENT_DRIVER_ALLOC_FB_MEM_FAIL,

1366  AMDSMI_EVENT_DRIVER_ALLOC_DMA_MEM_FAIL,

1367  AMDSMI_EVENT_DRIVER_NO_FB_MANAGER,

1368  AMDSMI_EVENT_DRIVER_HW_INIT_FAIL,

1369  AMDSMI_EVENT_DRIVER_SW_INIT_FAIL,

1370 

1371  AMDSMI_EVENT_DRIVER_INIT_CONFIG_ERROR,

1372  AMDSMI_EVENT_DRIVER_ERROR_LOGGING_FAILED,

1373  AMDSMI_EVENT_DRIVER_CREATE_RWLOCK_FAIL,

1374  AMDSMI_EVENT_DRIVER_CREATE_RWSEMA_FAIL,

1375  AMDSMI_EVENT_DRIVER_GET_READ_LOCK_FAIL,

1376 

1377  AMDSMI_EVENT_DRIVER_GET_WRITE_LOCK_FAIL,

1378  AMDSMI_EVENT_DRIVER_GET_READ_SEMA_FAIL,

1379  AMDSMI_EVENT_DRIVER_GET_WRITE_SEMA_FAIL,

1380 

1381  AMDSMI_EVENT_DRIVER_DIAG_DATA_INIT_FAIL,

1382  AMDSMI_EVENT_DRIVER_DIAG_DATA_MEM_REQ_FAIL,

1383  AMDSMI_EVENT_DRIVER_DIAG_DATA_VADDR_REQ_FAIL,

1384  AMDSMI_EVENT_DRIVER_DIAG_DATA_BUS_ADDR_REQ_FAIL,

1385 

1386  AMDSMI_EVENT_DRIVER_REMOTE_DEBUG_INIT_FAIL,

1387  AMDSMI_EVENT_DRIVER_REMOTE_DEBUG_MEM_REQ_FAIL,

1388  AMDSMI_EVENT_DRIVER_REMOTE_DEBUG_VADDR_REQ_FAIL,

1389  AMDSMI_EVENT_DRIVER_REMOTE_DEBUG_BUS_ADDR_REQ_FAIL,

1390 

1391  AMDSMI_EVENT_DRIVER_HRTIMER_START_FAIL,

1392  AMDSMI_EVENT_DRIVER_CREATE_DRIVER_FILE_FAIL,

1393  AMDSMI_EVENT_DRIVER_CREATE_DEVICE_FILE_FAIL,

1394  AMDSMI_EVENT_DRIVER_CREATE_DEBUGFS_FILE_FAIL,

1395  AMDSMI_EVENT_DRIVER_CREATE_DEBUGFS_DIR_FAIL,

1396 

1397  AMDSMI_EVENT_DRIVER_PCI_ENABLE_DEVICE_FAIL,

1398  AMDSMI_EVENT_DRIVER_FB_MAP_FAIL,

1399  AMDSMI_EVENT_DRIVER_DOORBELL_MAP_FAIL,

1400  AMDSMI_EVENT_DRIVER_PCI_REGISTER_DRIVER_FAIL,

1401 

1402  AMDSMI_EVENT_DRIVER_ALLOC_IOVA_ALIGN_FAIL,

1403 

1404  AMDSMI_EVENT_DRIVER_ROM_MAP_FAIL,

1405  AMDSMI_EVENT_DRIVER_FULL_ACCESS_TIMEOUT,

1406 

1407  AMDSMI_EVENT_DRIVER__MAX

1408 } amdsmi_event_driver_t;

1409 

1415 typedef enum {

1416  AMDSMI_EVENT_FW_CMD_ALLOC_BUF_FAIL = 0,

1417  AMDSMI_EVENT_FW_CMD_BUF_PREP_FAIL,

1418  AMDSMI_EVENT_FW_RING_INIT_FAIL,

1419  AMDSMI_EVENT_FW_FW_APPLY_SECURITY_POLICY_FAIL,

1420  AMDSMI_EVENT_FW_START_RING_FAIL,

1421 

1422  AMDSMI_EVENT_FW_FW_LOAD_FAIL,

1423  AMDSMI_EVENT_FW_EXIT_FAIL,

1424  AMDSMI_EVENT_FW_INIT_FAIL,

1425  AMDSMI_EVENT_FW_CMD_SUBMIT_FAIL,

1426  AMDSMI_EVENT_FW_CMD_FENCE_WAIT_FAIL,

1427 

1428  AMDSMI_EVENT_FW_TMR_LOAD_FAIL,

1429  AMDSMI_EVENT_FW_TOC_LOAD_FAIL,

1430  AMDSMI_EVENT_FW_RAS_LOAD_FAIL,

1431  AMDSMI_EVENT_FW_RAS_UNLOAD_FAIL,

1432  AMDSMI_EVENT_FW_RAS_TA_INVOKE_FAIL,

1433  AMDSMI_EVENT_FW_RAS_TA_ERR_INJECT_FAIL,

1434 

1435  AMDSMI_EVENT_FW_ASD_LOAD_FAIL,

1436  AMDSMI_EVENT_FW_ASD_UNLOAD_FAIL,

1437  AMDSMI_EVENT_FW_AUTOLOAD_FAIL,

1438  AMDSMI_EVENT_FW_VFGATE_FAIL,

1439 

1440  AMDSMI_EVENT_FW_XGMI_LOAD_FAIL,

1441  AMDSMI_EVENT_FW_XGMI_UNLOAD_FAIL,

1442  AMDSMI_EVENT_FW_XGMI_TA_INVOKE_FAIL,

1443 

1444  AMDSMI_EVENT_FW_TMR_INIT_FAIL,

1445  AMDSMI_EVENT_FW_NOT_SUPPORTED_FEATURE,

1446  AMDSMI_EVENT_FW_GET_PSP_TRACELOG_FAIL,

1447 

1448  AMDSMI_EVENT_FW_SET_SNAPSHOT_ADDR_FAIL,

1449  AMDSMI_EVENT_FW_SNAPSHOT_TRIGGER_FAIL,

1450 

1451  AMDSMI_EVENT_FW_MIGRATION_GET_PSP_INFO_FAIL,

1452  AMDSMI_EVENT_FW_MIGRATION_EXPORT_FAIL,

1453  AMDSMI_EVENT_FW_MIGRATION_IMPORT_FAIL,

1454 

1455  AMDSMI_EVENT_FW_BL_FAIL,

1456  AMDSMI_EVENT_FW_RAS_BOOT_FAIL,

1457  AMDSMI_EVENT_FW_MAILBOX_ERROR,

1458 

1459  AMDSMI_EVENT_FW__MAX

1460 } amdsmi_event_fw_t;

1461 

1462 #define AMDSMI_EVENT_FW_FW_INIT_FAIL AMDSMI_EVENT_FW_RING_INIT_FAIL

1463 

1469 typedef enum {

1470  AMDSMI_EVENT_RESET_GPU = 0,

1471  AMDSMI_EVENT_RESET_GPU_FAILED,

1472  AMDSMI_EVENT_RESET_FLR,

1473  AMDSMI_EVENT_RESET_FLR_FAILED,

1474  AMDSMI_EVENT_RESET__MAX

1475 } amdsmi_event_reset_t;

1476 

1482 typedef enum {

1483  AMDSMI_EVENT_IOV_NO_GPU_IOV_CAP = 0,

1484  AMDSMI_EVENT_IOV_ASIC_NO_SRIOV_SUPPORT,

1485  AMDSMI_EVENT_IOV_ENABLE_SRIOV_FAIL,

1486  AMDSMI_EVENT_IOV_CMD_TIMEOUT,

1487  AMDSMI_EVENT_IOV_CMD_ERROR,

1488 

1489  AMDSMI_EVENT_IOV_INIT_IV_RING_FAIL,

1490  AMDSMI_EVENT_IOV_SRIOV_STRIDE_ERROR,

1491  AMDSMI_EVENT_IOV_WS_SAVE_TIMEOUT,

1492  AMDSMI_EVENT_IOV_WS_IDLE_TIMEOUT,

1493  AMDSMI_EVENT_IOV_WS_RUN_TIMEOUT,

1494  AMDSMI_EVENT_IOV_WS_LOAD_TIMEOUT,

1495  AMDSMI_EVENT_IOV_WS_SHUTDOWN_TIMEOUT,

1496  AMDSMI_EVENT_IOV_WS_ALREADY_SHUTDOWN,

1497  AMDSMI_EVENT_IOV_WS_INFINITE_LOOP,

1498  AMDSMI_EVENT_IOV_WS_REENTRANT_ERROR,

1499  AMDSMI_EVENT_IOV__MAX

1500 } amdsmi_event_iov_t;

1501 

1507 typedef enum {

1508  AMDSMI_EVENT_ECC_UCE = 0,

1509  AMDSMI_EVENT_ECC_CE,

1510  AMDSMI_EVENT_ECC_IN_PF_FB,

1511  AMDSMI_EVENT_ECC_IN_CRI_REG,

1512  AMDSMI_EVENT_ECC_IN_VF_CRI,

1513  AMDSMI_EVENT_ECC_REACH_THD,

1514  AMDSMI_EVENT_ECC_VF_CE,

1515  AMDSMI_EVENT_ECC_VF_UE,

1516  AMDSMI_EVENT_ECC_IN_SAME_ROW,

1517  AMDSMI_EVENT_ECC_UMC_UE,

1518  AMDSMI_EVENT_ECC_GFX_CE,

1519  AMDSMI_EVENT_ECC_GFX_UE,

1520  AMDSMI_EVENT_ECC_SDMA_CE,

1521  AMDSMI_EVENT_ECC_SDMA_UE,

1522  AMDSMI_EVENT_ECC_GFX_CE_TOTAL,

1523  AMDSMI_EVENT_ECC_GFX_UE_TOTAL,

1524  AMDSMI_EVENT_ECC_SDMA_CE_TOTAL,

1525  AMDSMI_EVENT_ECC_SDMA_UE_TOTAL,

1526  AMDSMI_EVENT_ECC_UMC_CE_TOTAL,

1527  AMDSMI_EVENT_ECC_UMC_UE_TOTAL,

1528  AMDSMI_EVENT_ECC_MMHUB_CE,

1529  AMDSMI_EVENT_ECC_MMHUB_UE,

1530  AMDSMI_EVENT_ECC_MMHUB_CE_TOTAL,

1531  AMDSMI_EVENT_ECC_MMHUB_UE_TOTAL,

1532  AMDSMI_EVENT_ECC_XGMI_WAFL_CE,

1533  AMDSMI_EVENT_ECC_XGMI_WAFL_UE,

1534  AMDSMI_EVENT_ECC_XGMI_WAFL_CE_TOTAL,

1535  AMDSMI_EVENT_ECC_XGMI_WAFL_UE_TOTAL,

1536  AMDSMI_EVENT_ECC_FATAL_ERROR,

1537  AMDSMI_EVENT_ECC_POISON_CONSUMPTION,

1538  AMDSMI_EVENT_ECC_ACA_DUMP,

1539  AMDSMI_EVENT_ECC_WRONG_SOCKET_ID,

1540  AMDSMI_EVENT_ECC_ACA_UNKNOWN_BLOCK_INSTANCE,

1541  AMDSMI_EVENT_ECC_UNKNOWN_CHIPLET_CE,

1542  AMDSMI_EVENT_ECC_UNKNOWN_CHIPLET_UE,

1543  AMDSMI_EVENT_ECC_UMC_CHIPLET_CE,

1544  AMDSMI_EVENT_ECC_UMC_CHIPLET_UE,

1545  AMDSMI_EVENT_ECC_GFX_CHIPLET_CE,

1546  AMDSMI_EVENT_ECC_GFX_CHIPLET_UE,

1547  AMDSMI_EVENT_ECC_SDMA_CHIPLET_CE,

1548  AMDSMI_EVENT_ECC_SDMA_CHIPLET_UE,

1549  AMDSMI_EVENT_ECC_MMHUB_CHIPLET_CE,

1550  AMDSMI_EVENT_ECC_MMHUB_CHIPLET_UE,

1551  AMDSMI_EVENT_ECC_XGMI_WAFL_CHIPLET_CE,

1552  AMDSMI_EVENT_ECC_XGMI_WAFL_CHIPLET_UE,

1553  AMDSMI_EVENT_ECC_EEPROM_ENTRIES_FOUND,

1554  AMDSMI_EVENT_ECC_UMC_DE,

1555  AMDSMI_EVENT_ECC_UMC_DE_TOTAL,

1556  AMDSMI_EVENT_ECC_UNKNOWN,

1557  AMDSMI_EVENT_ECC_EEPROM_REACH_THD,

1558  AMDSMI_EVENT_ECC_UMC_CHIPLET_DE,

1559  AMDSMI_EVENT_ECC_UNKNOWN_CHIPLET_DE,

1560  AMDSMI_EVENT_ECC_EEPROM_CHK_MISMATCH,

1561  AMDSMI_EVENT_ECC_EEPROM_RESET,

1562  AMDSMI_EVENT_ECC_EEPROM_RESET_FAILED,

1563  AMDSMI_EVENT_ECC_EEPROM_APPEND,

1564  AMDSMI_EVENT_ECC_THD_CHANGED,

1565  AMDSMI_EVENT_ECC_DUP_ENTRIES,

1566  AMDSMI_EVENT_ECC_EEPROM_WRONG_HDR,

1567  AMDSMI_EVENT_ECC_EEPROM_WRONG_VER,

1568  AMDSMI_EVENT_ECC__MAX

1569 } amdsmi_event_ecc_t;

1570 

1576 typedef enum {

1577  AMDSMI_EVENT_PP_SET_DPM_POLICY_FAIL = 0,

1578  AMDSMI_EVENT_PP_ACTIVATE_DPM_POLICY_FAIL,

1579  AMDSMI_EVENT_PP_I2C_SLAVE_NOT_PRESENT,

1580  AMDSMI_EVENT_PP_THROTTLER_EVENT,

1581  AMDSMI_EVENT_PP__MAX

1582 } amdsmi_event_pp_t;

1583 

1589 typedef enum {

1590  AMDSMI_EVENT_SCHED_WORLD_SWITCH_FAIL = 0,

1591  AMDSMI_EVENT_SCHED_DISABLE_AUTO_HW_SWITCH_FAIL,

1592  AMDSMI_EVENT_SCHED_ENABLE_AUTO_HW_SWITCH_FAIL,

1593  AMDSMI_EVENT_SCHED_GFX_SAVE_REG_FAIL,

1594  AMDSMI_EVENT_SCHED_GFX_IDLE_REG_FAIL,

1595 

1596  AMDSMI_EVENT_SCHED_GFX_RUN_REG_FAIL,

1597  AMDSMI_EVENT_SCHED_GFX_LOAD_REG_FAIL,

1598  AMDSMI_EVENT_SCHED_GFX_INIT_REG_FAIL,

1599  AMDSMI_EVENT_SCHED_MM_SAVE_REG_FAIL,

1600  AMDSMI_EVENT_SCHED_MM_IDLE_REG_FAIL,

1601 

1602  AMDSMI_EVENT_SCHED_MM_RUN_REG_FAIL,

1603  AMDSMI_EVENT_SCHED_MM_LOAD_REG_FAIL,

1604  AMDSMI_EVENT_SCHED_MM_INIT_REG_FAIL,

1605  AMDSMI_EVENT_SCHED_INIT_GPU_FAIL,

1606  AMDSMI_EVENT_SCHED_RUN_GPU_FAIL,

1607 

1608  AMDSMI_EVENT_SCHED_SAVE_GPU_STATE_FAIL,

1609  AMDSMI_EVENT_SCHED_LOAD_GPU_STATE_FAIL,

1610  AMDSMI_EVENT_SCHED_IDLE_GPU_FAIL,

1611  AMDSMI_EVENT_SCHED_FINI_GPU_FAIL,

1612  AMDSMI_EVENT_SCHED_DEAD_VF,

1613 

1614  AMDSMI_EVENT_SCHED_EVENT_QUEUE_FULL,

1615  AMDSMI_EVENT_SCHED_SHUTDOWN_VF_FAIL,

1616  AMDSMI_EVENT_SCHED_RESET_VF_NUM_FAIL,

1617  AMDSMI_EVENT_SCHED_IGNORE_EVENT,

1618  AMDSMI_EVENT_SCHED_PF_SWITCH_FAIL,

1619  AMDSMI_EVENT_SCHED__MAX

1620 } amdsmi_event_sched_t;

1621 

1627 typedef enum {

1628  AMDSMI_EVENT_VF_ATOMBIOS_INIT_FAIL = 0,

1629  AMDSMI_EVENT_VF_NO_VBIOS,

1630  AMDSMI_EVENT_VF_GPU_POST_ERROR,

1631  AMDSMI_EVENT_VF_ATOMBIOS_GET_CLOCK_FAIL,

1632  AMDSMI_EVENT_VF_FENCE_INIT_FAIL,

1633  AMDSMI_EVENT_VF_AMDGPU_INIT_FAIL,

1634  AMDSMI_EVENT_VF_IB_INIT_FAIL,

1635  AMDSMI_EVENT_VF_AMDGPU_LATE_INIT_FAIL,

1636  AMDSMI_EVENT_VF_ASIC_RESUME_FAIL,

1637  AMDSMI_EVENT_VF_GPU_RESET_FAIL,

1638  AMDSMI_EVENT_VF__MAX

1639 } amdsmi_event_vf_max_t;

1640 

1646 typedef enum {

1647  AMDSMI_EVENT_VBIOS_INVALID = 0,

1648  AMDSMI_EVENT_VBIOS_IMAGE_MISSING,

1649  AMDSMI_EVENT_VBIOS_CHECKSUM_ERR,

1650  AMDSMI_EVENT_VBIOS_POST_FAIL,

1651  AMDSMI_EVENT_VBIOS_READ_FAIL,

1652 

1653  AMDSMI_EVENT_VBIOS_READ_IMG_HEADER_FAIL,

1654  AMDSMI_EVENT_VBIOS_READ_IMG_SIZE_FAIL,

1655  AMDSMI_EVENT_VBIOS_GET_FW_INFO_FAIL,

1656  AMDSMI_EVENT_VBIOS_GET_TBL_REVISION_FAIL,

1657  AMDSMI_EVENT_VBIOS_PARSER_TBL_FAIL,

1658 

1659  AMDSMI_EVENT_VBIOS_IP_DISCOVERY_FAIL,

1660  AMDSMI_EVENT_VBIOS_TIMEOUT,

1661  AMDSMI_EVENT_VBIOS_HASH_INVALID,

1662  AMDSMI_EVENT_VBIOS_HASH_UPDATED,

1663  AMDSMI_EVENT_VBIOS_IP_DISCOVERY_BINARY_CHECKSUM_FAIL,

1664  AMDSMI_EVENT_VBIOS_IP_DISCOVERY_TABLE_CHECKSUM_FAIL,

1665  AMDSMI_EVENT_VBIOS__MAX

1666 } amdsmi_event_vbios_t;

1667 

1673 typedef enum {

1674  AMDSMI_EVENT_GUARD_RESET_FAIL = 0,

1675  AMDSMI_EVENT_GUARD_EVENT_OVERFLOW,

1676  AMDSMI_EVENT_GUARD__MAX

1677 } amdsmi_event_guard_t;

1678 

1684 typedef enum {

1685  AMDSMI_EVENT_GPUMON_INVALID_OPTION = 0,

1686  AMDSMI_EVENT_GPUMON_INVALID_VF_INDEX,

1687  AMDSMI_EVENT_GPUMON_INVALID_FB_SIZE,

1688  AMDSMI_EVENT_GPUMON_NO_SUITABLE_SPACE,

1689  AMDSMI_EVENT_GPUMON_NO_AVAILABLE_SLOT,

1690 

1691  AMDSMI_EVENT_GPUMON_OVERSIZE_ALLOCATION,

1692  AMDSMI_EVENT_GPUMON_OVERLAPPING_FB,

1693  AMDSMI_EVENT_GPUMON_INVALID_GFX_TIMESLICE,

1694  AMDSMI_EVENT_GPUMON_INVALID_MM_TIMESLICE,

1695  AMDSMI_EVENT_GPUMON_INVALID_GFX_PART,

1696 

1697  AMDSMI_EVENT_GPUMON_VF_BUSY,

1698  AMDSMI_EVENT_GPUMON_INVALID_VF_NUM,

1699  AMDSMI_EVENT_GPUMON_NOT_SUPPORTED,

1700  AMDSMI_EVENT_GPUMON__MAX

1701 } amdsmi_event_gpumon_t;

1702 

1708 typedef enum {

1709  AMDSMI_EVENT_MMSCH_IGNORED_JOB = 0,

1710  AMDSMI_EVENT_MMSCH_UNSUPPORTED_VCN_FW,

1711  AMDSMI_EVENT_MMSCH__MAX

1712 } amdsmi_event_mmsch_t;

1713 

1719 typedef enum {

1720  AMDSMI_EVENT_XGMI_TOPOLOGY_UPDATE_FAILED = 0,

1721  AMDSMI_EVENT_XGMI_TOPOLOGY_HW_INIT_UPDATE,

1722  AMDSMI_EVENT_XGMI_TOPOLOGY_UPDATE_DONE,

1723  AMDSMI_EVENT_XGMI_FB_SHARING_SETTING_ERROR,

1724  AMDSMI_EVENT_XGMI_FB_SHARING_SETTING_RESET,

1725  AMDSMI_EVENT_XGMI__MAX

1726 } amdsmi_event_xgmi_t;

1727 

1733 typedef enum {

1734  AMDSMI_EVENT_THROTTLER_PROCHOT = 0,

1735  AMDSMI_EVENT_THROTTLER_SOCKET,

1736  AMDSMI_EVENT_THROTTLER_VR,

1737  AMDSMI_EVENT_THROTTLER_HBM

1738 } amdsmi_pp_throttler_type_t;

1739 

1745 typedef enum {

1746  AMDSMI_RAS_ECC_SUPPORT_PARITY = (1 << 0),

1747  AMDSMI_RAS_ECC_SUPPORT_CORRECTABLE = (1 << 1),

1748  AMDSMI_RAS_ECC_SUPPORT_UNCORRECTABLE = (1 << 2),

1749  AMDSMI_RAS_ECC_SUPPORT_POISON = (1 << 3)

1750 } amdsmi_ecc_correction_schema_support_t;

1751 

1757 typedef enum {

1758  AMDSMI_GUEST_FW_ID_VCE = 0,

1759  AMDSMI_GUEST_FW_ID_UVD,

1760  AMDSMI_GUEST_FW_ID_MC,

1761  AMDSMI_GUEST_FW_ID_ME,

1762  AMDSMI_GUEST_FW_ID_PFP,

1763  AMDSMI_GUEST_FW_ID_CE,

1764  AMDSMI_GUEST_FW_ID_RLC,

1765  AMDSMI_GUEST_FW_ID_RLC_SRLC,

1766  AMDSMI_GUEST_FW_ID_RLC_SRLG,

1767  AMDSMI_GUEST_FW_ID_RLC_SRLS,

1768  AMDSMI_GUEST_FW_ID_MEC,

1769  AMDSMI_GUEST_FW_ID_MEC2,

1770  AMDSMI_GUEST_FW_ID_SOS,

1771  AMDSMI_GUEST_FW_ID_ASD,

1772  AMDSMI_GUEST_FW_ID_TA_RAS,

1773  AMDSMI_GUEST_FW_ID_TA_XGMI,

1774  AMDSMI_GUEST_FW_ID_SMC,

1775  AMDSMI_GUEST_FW_ID_SDMA,

1776  AMDSMI_GUEST_FW_ID_SDMA2,

1777  AMDSMI_GUEST_FW_ID_VCN,

1778  AMDSMI_GUEST_FW_ID_DMCU,

1779  AMDSMI_GUEST_FW_ID__MAX

1780 } amdsmi_guest_fw_engine_id_t;

1781 

1787 typedef enum {

1788  AMDSMI_VF_CONFIG_FB_SIZE_SET = 0,

1789  AMDSMI_VF_CONFIG_FB_OFFSET_SET,

1790  AMDSMI_VF_CONFIG_GFX_TIMESLICE_US_SET,

1791  AMDSMI_VF_CONFIG_ENG_COMPUTE_BW_SET,

1792  AMDSMI_VF_CONFIG_GUARD_THRESHOLD_FLR_SET,

1793  AMDSMI_VF_CONFIG_GUARD_THRESHOLD_EXCL_MOD_SET,

1794  AMDSMI_VF_CONFIG_GUARD_THRESHOLD_EXCL_TIMEOUT_SET,

1795  AMDSMI_VF_CONFIG_GUARD_THRESHOLD_ALL_INT_SET,

1796  AMDSMI_VF_CONFIG_ENG_ENCODE_BW_UVD_SET,

1797  AMDSMI_VF_CONFIG_ENG_ENCODE_BW_VCE_SET,

1798  AMDSMI_VF_CONFIG_ENG_ENCODE_BW_UVD1_SET,

1799  AMDSMI_VF_CONFIG_ENG_ENCODE_BW_VCN_SET,

1800  AMDSMI_VF_CONFIG_ENG_ENCODE_BW_VCN1_SET,

1801  AMDSMI_VF_CONFIG__MAX

1802 } amdsmi_vf_config_flags_t;

1803 

1809 typedef enum {

1810  AMDSMI_VF_STATE_UNAVAILABLE,

1811  AMDSMI_VF_STATE_AVAILABLE,

1812  AMDSMI_VF_STATE_ACTIVE,

1813  AMDSMI_VF_STATE_SUSPENDED,

1814  AMDSMI_VF_STATE_FULLACCESS,

1815  AMDSMI_VF_STATE_DEFAULT_AVAILABLE,

1816 } amdsmi_vf_sched_state_t;

1817 

1823 typedef enum {

1824  AMDSMI_GUARD_EVENT_FLR,

1825  AMDSMI_GUARD_EVENT_EXCLUSIVE_MOD,

1826  AMDSMI_GUARD_EVENT_EXCLUSIVE_TIMEOUT,

1827  AMDSMI_GUARD_EVENT_ALL_INT,

1828  AMDSMI_GUARD_EVENT_RAS_ERR_COUNT,

1829  AMDSMI_GUARD_EVENT_RAS_CPER_DUMP,

1830  AMDSMI_GUARD_EVENT_RAS_BAD_PAGES,

1831  AMDSMI_GUARD_EVENT__MAX

1832 } amdsmi_guard_type_t;

1833 

1839 typedef enum {

1840  AMDSMI_DRIVER_LIBGV,

1841  AMDSMI_DRIVER_KMD,

1842  AMDSMI_DRIVER_AMDGPUV,

1843  AMDSMI_DRIVER_AMDGPU,

1844  AMDSMI_DRIVER_VMWGPUV,

1845  AMDSMI_DRIVER__MAX,

1846 } amdsmi_driver_t;

1847 

1853 typedef enum {

1854  AMDSMI_GUARD_STATE_NORMAL = 0,

1855  AMDSMI_GUARD_STATE_FULL = 1,

1856  AMDSMI_GUARD_STATE_OVERFLOW = 2,

1857 } amdsmi_guard_state_t;

1858 

1864 typedef enum {

1865  AMDSMI_SCHED_BLOCK_GFX = 0x0,

1866  AMDSMI_SCHED_BLOCK_UVD = 0x1,

1867  AMDSMI_SCHED_BLOCK_VCE = 0x2,

1868  AMDSMI_SCHED_BLOCK_UVD1 = 0x3,

1869  AMDSMI_SCHED_BLOCK_VCN = 0x4,

1870  AMDSMI_SCHED_BLOCK_VCN1 = 0x5,

1871 } amdsmi_sched_block_t;

1872 

1878 typedef enum {

1879  AMDSMI_GUEST_FW_LOAD_STATUS_OK = 0,

1880  AMDSMI_GUEST_FW_LOAD_STATUS_OBSOLETE_FW = 1,

1881  AMDSMI_GUEST_FW_LOAD_STATUS_BAD_SIG = 2,

1882  AMDSMI_GUEST_FW_LOAD_STATUS_FW_LOAD_FAIL = 3,

1883  AMDSMI_GUEST_FW_LOAD_STATUS_ERR_GENERIC = 4

1884 } amdsmi_guest_fw_load_status_t;

1885 

1891 typedef enum {

1892  AMDSMI_XGMI_FB_SHARING_MODE_CUSTOM = 0,

1893  AMDSMI_XGMI_FB_SHARING_MODE_1 = 1,

1894  AMDSMI_XGMI_FB_SHARING_MODE_2 = 2,

1895  AMDSMI_XGMI_FB_SHARING_MODE_4 = 4,

1896  AMDSMI_XGMI_FB_SHARING_MODE_8 = 8,

1897  AMDSMI_XGMI_FB_SHARING_MODE_UNKNOWN = 0xFFFFFFFF

1898 } amdsmi_xgmi_fb_sharing_mode_t;

1899 

1905 typedef enum {

1906  AMDSMI_PROFILE_CAPABILITY_MEMORY = 0,

1907  AMDSMI_PROFILE_CAPABILITY_ENCODE = 1,

1908  AMDSMI_PROFILE_CAPABILITY_DECODE = 2,

1909  AMDSMI_PROFILE_CAPABILITY_COMPUTE = 3,

1910  AMDSMI_PROFILE_CAPABILITY__MAX,

1911 } amdsmi_profile_capability_type_t;

1912 

1918 typedef enum {

1919  AMDSMI_METRIC_CATEGORY_ACC_COUNTER,

1920  AMDSMI_METRIC_CATEGORY_FREQUENCY,

1921  AMDSMI_METRIC_CATEGORY_ACTIVITY,

1922  AMDSMI_METRIC_CATEGORY_TEMPERATURE,

1923  AMDSMI_METRIC_CATEGORY_POWER,

1924  AMDSMI_METRIC_CATEGORY_ENERGY,

1925  AMDSMI_METRIC_CATEGORY_THROTTLE,

1926  AMDSMI_METRIC_CATEGORY_PCIE,

1927  AMDSMI_METRIC_CATEGORY_STATIC,

1928  AMDSMI_METRIC_CATEGORY_SYS_ACC_COUNTER,

1929  AMDSMI_METRIC_CATEGORY_SYS_BASEBOARD_TEMP,

1930  AMDSMI_METRIC_CATEGORY_SYS_GPUBOARD_TEMP,

1931  AMDSMI_METRIC_CATEGORY_SYS_BASEBOARD_POWER,

1932  AMDSMI_METRIC_CATEGORY_STATIC_FREQUENCY,

1933  AMDSMI_METRIC_CATEGORY_STATIC_TEMPERATURE,

1934  AMDSMI_METRIC_CATEGORY_STATIC_THROTTLE,

1935  AMDSMI_METRIC_CATEGORY_UNKNOWN

1936 } amdsmi_metric_category_t;

1937 

1943 typedef enum {

1944  AMDSMI_METRIC_NAME_METRIC_ACC_COUNTER,

1945  AMDSMI_METRIC_NAME_FW_TIMESTAMP,

1946  AMDSMI_METRIC_NAME_CLK_GFX,

1947  AMDSMI_METRIC_NAME_CLK_SOC,

1948  AMDSMI_METRIC_NAME_CLK_MEM,

1949  AMDSMI_METRIC_NAME_CLK_VCLK,

1950  AMDSMI_METRIC_NAME_CLK_DCLK,

1951 

1952  AMDSMI_METRIC_NAME_USAGE_GFX,

1953  AMDSMI_METRIC_NAME_USAGE_MEM,

1954  AMDSMI_METRIC_NAME_USAGE_MM,

1955  AMDSMI_METRIC_NAME_USAGE_VCN,

1956  AMDSMI_METRIC_NAME_USAGE_JPEG,

1957 

1958  AMDSMI_METRIC_NAME_VOLT_GFX,

1959  AMDSMI_METRIC_NAME_VOLT_SOC,

1960  AMDSMI_METRIC_NAME_VOLT_MEM,

1961 

1962  AMDSMI_METRIC_NAME_TEMP_HOTSPOT_CURR,

1963  AMDSMI_METRIC_NAME_TEMP_HOTSPOT_LIMIT,

1964  AMDSMI_METRIC_NAME_TEMP_MEM_CURR,

1965  AMDSMI_METRIC_NAME_TEMP_MEM_LIMIT,

1966  AMDSMI_METRIC_NAME_TEMP_VR_CURR,

1967  AMDSMI_METRIC_NAME_TEMP_SHUTDOWN,

1968 

1969  AMDSMI_METRIC_NAME_POWER_CURR,

1970  AMDSMI_METRIC_NAME_POWER_LIMIT,

1971 

1972  AMDSMI_METRIC_NAME_ENERGY_SOCKET,

1973  AMDSMI_METRIC_NAME_ENERGY_CCD,

1974  AMDSMI_METRIC_NAME_ENERGY_XCD,

1975  AMDSMI_METRIC_NAME_ENERGY_AID,

1976  AMDSMI_METRIC_NAME_ENERGY_MEM,

1977 

1978  AMDSMI_METRIC_NAME_THROTTLE_SOCKET_ACTIVE,

1979  AMDSMI_METRIC_NAME_THROTTLE_VR_ACTIVE,

1980  AMDSMI_METRIC_NAME_THROTTLE_MEM_ACTIVE,

1981  AMDSMI_METRIC_NAME_THROTTLE_PROCHOT_ACTIVE,

1982  AMDSMI_METRIC_NAME_THROTTLE_PPT_ACTIVE,

1983 

1984  AMDSMI_METRIC_NAME_PCIE_BANDWIDTH,

1985  AMDSMI_METRIC_NAME_PCIE_L0_TO_RECOVERY_COUNT,

1986  AMDSMI_METRIC_NAME_PCIE_REPLAY_COUNT,

1987  AMDSMI_METRIC_NAME_PCIE_REPLAY_ROLLOVER_COUNT,

1988  AMDSMI_METRIC_NAME_PCIE_NAK_SENT_COUNT,

1989  AMDSMI_METRIC_NAME_PCIE_NAK_RECEIVED_COUNT,

1990 

1991  AMDSMI_METRIC_NAME_CLK_GFX_MAX_LIMIT,

1992  AMDSMI_METRIC_NAME_CLK_SOC_MAX_LIMIT,

1993  AMDSMI_METRIC_NAME_CLK_MEM_MAX_LIMIT,

1994  AMDSMI_METRIC_NAME_CLK_VCLK_MAX_LIMIT,

1995  AMDSMI_METRIC_NAME_CLK_DCLK_MAX_LIMIT,

1996 

1997  AMDSMI_METRIC_NAME_CLK_GFX_MIN_LIMIT,

1998  AMDSMI_METRIC_NAME_CLK_SOC_MIN_LIMIT,

1999  AMDSMI_METRIC_NAME_CLK_MEM_MIN_LIMIT,

2000  AMDSMI_METRIC_NAME_CLK_VCLK_MIN_LIMIT,

2001  AMDSMI_METRIC_NAME_CLK_DCLK_MIN_LIMIT,

2002 

2003  AMDSMI_METRIC_NAME_CLK_GFX_LOCKED,

2004 

2005  AMDSMI_METRIC_NAME_CLK_GFX_DS_DISABLED,

2006  AMDSMI_METRIC_NAME_CLK_MEM_DS_DISABLED,

2007  AMDSMI_METRIC_NAME_CLK_SOC_DS_DISABLED,

2008  AMDSMI_METRIC_NAME_CLK_VCLK_DS_DISABLED,

2009  AMDSMI_METRIC_NAME_CLK_DCLK_DS_DISABLED,

2010 

2011  AMDSMI_METRIC_NAME_PCIE_LINK_SPEED,

2012  AMDSMI_METRIC_NAME_PCIE_LINK_WIDTH,

2013 

2014  AMDSMI_METRIC_NAME_DRAM_BANDWIDTH,

2015  AMDSMI_METRIC_NAME_MAX_DRAM_BANDWIDTH,

2016 

2017  AMDSMI_METRIC_NAME_GFX_CLK_BELOW_HOST_LIMIT_PPT,

2018  AMDSMI_METRIC_NAME_GFX_CLK_BELOW_HOST_LIMIT_THM,

2019  AMDSMI_METRIC_NAME_GFX_CLK_BELOW_HOST_LIMIT_TOTAL,

2020  AMDSMI_METRIC_NAME_GFX_CLK_LOW_UTILIZATION,

2021  AMDSMI_METRIC_NAME_INPUT_TELEMETRY_VOLTAGE,

2022  AMDSMI_METRIC_NAME_PLDM_VERSION,

2023  AMDSMI_METRIC_NAME_TEMP_XCD,

2024  AMDSMI_METRIC_NAME_TEMP_AID,

2025  AMDSMI_METRIC_NAME_TEMP_HBM,

2026 

2027  AMDSMI_METRIC_NAME_SYS_METRIC_ACC_COUNTER,

2028  AMDSMI_METRIC_NAME_SYSTEM_TEMP_UBB_FPGA,

2029  AMDSMI_METRIC_NAME_SYSTEM_TEMP_UBB_FRONT,

2030  AMDSMI_METRIC_NAME_SYSTEM_TEMP_UBB_BACK,

2031  AMDSMI_METRIC_NAME_SYSTEM_TEMP_UBB_OAM7,

2032  AMDSMI_METRIC_NAME_SYSTEM_TEMP_UBB_IBC,

2033  AMDSMI_METRIC_NAME_SYSTEM_TEMP_UBB_UFPGA,

2034  AMDSMI_METRIC_NAME_SYSTEM_TEMP_UBB_OAM1,

2035  AMDSMI_METRIC_NAME_SYSTEM_TEMP_OAM_0_1_HSC,

2036  AMDSMI_METRIC_NAME_SYSTEM_TEMP_OAM_2_3_HSC,

2037  AMDSMI_METRIC_NAME_SYSTEM_TEMP_OAM_4_5_HSC,

2038  AMDSMI_METRIC_NAME_SYSTEM_TEMP_OAM_6_7_HSC,

2039  AMDSMI_METRIC_NAME_SYSTEM_TEMP_UBB_FPGA_0V72_VR,

2040  AMDSMI_METRIC_NAME_SYSTEM_TEMP_UBB_FPGA_3V3_VR,

2041  AMDSMI_METRIC_NAME_SYSTEM_TEMP_RETIMER_0_1_2_3_1V2_VR,

2042  AMDSMI_METRIC_NAME_SYSTEM_TEMP_RETIMER_4_5_6_7_1V2_VR,

2043  AMDSMI_METRIC_NAME_SYSTEM_TEMP_RETIMER_0_1_0V9_VR,

2044  AMDSMI_METRIC_NAME_SYSTEM_TEMP_RETIMER_4_5_0V9_VR,

2045  AMDSMI_METRIC_NAME_SYSTEM_TEMP_RETIMER_2_3_0V9_VR,

2046  AMDSMI_METRIC_NAME_SYSTEM_TEMP_RETIMER_6_7_0V9_VR,

2047  AMDSMI_METRIC_NAME_SYSTEM_TEMP_OAM_0_1_2_3_3V3_VR,

2048  AMDSMI_METRIC_NAME_SYSTEM_TEMP_OAM_4_5_6_7_3V3_VR,

2049  AMDSMI_METRIC_NAME_SYSTEM_TEMP_IBC_HSC,

2050  AMDSMI_METRIC_NAME_SYSTEM_TEMP_IBC,

2051  AMDSMI_METRIC_NAME_NODE_TEMP_RETIMER,

2052  AMDSMI_METRIC_NAME_NODE_TEMP_IBC_TEMP,

2053  AMDSMI_METRIC_NAME_NODE_TEMP_IBC_2_TEMP,

2054  AMDSMI_METRIC_NAME_NODE_TEMP_VDD18_VR_TEMP,

2055  AMDSMI_METRIC_NAME_NODE_TEMP_04_HBM_B_VR_TEMP,

2056  AMDSMI_METRIC_NAME_NODE_TEMP_04_HBM_D_VR_TEMP,

2057  AMDSMI_METRIC_NAME_VR_TEMP_VDDCR_VDD0,

2058  AMDSMI_METRIC_NAME_VR_TEMP_VDDCR_VDD1,

2059  AMDSMI_METRIC_NAME_VR_TEMP_VDDCR_VDD2,

2060  AMDSMI_METRIC_NAME_VR_TEMP_VDDCR_VDD3,

2061  AMDSMI_METRIC_NAME_VR_TEMP_VDDCR_SOC_A,

2062  AMDSMI_METRIC_NAME_VR_TEMP_VDDCR_SOC_C,

2063  AMDSMI_METRIC_NAME_VR_TEMP_VDDCR_SOCIO_A,

2064  AMDSMI_METRIC_NAME_VR_TEMP_VDDCR_SOCIO_C,

2065  AMDSMI_METRIC_NAME_VR_TEMP_VDD_085_HBM,

2066  AMDSMI_METRIC_NAME_VR_TEMP_VDDCR_11_HBM_B,

2067  AMDSMI_METRIC_NAME_VR_TEMP_VDDCR_11_HBM_D,

2068  AMDSMI_METRIC_NAME_VR_TEMP_VDD_USR,

2069  AMDSMI_METRIC_NAME_VR_TEMP_VDDIO_11_E32,

2070 

2071  AMDSMI_METRIC_NAME_TEMP_MID,

2072  AMDSMI_METRIC_NAME_CLK_FCLK,

2073  AMDSMI_METRIC_NAME_CLK_FCLK_MAX_LIMIT,

2074  AMDSMI_METRIC_NAME_CLK_FCLK_MIN_LIMIT,

2075  AMDSMI_METRIC_NAME_CLK_FCLK_DS_DISABLED,

2076  AMDSMI_METRIC_NAME_CLK_LCLK,

2077  AMDSMI_METRIC_NAME_CLK_LCLK_MAX_LIMIT,

2078  AMDSMI_METRIC_NAME_CLK_LCLK_MIN_LIMIT,

2079  AMDSMI_METRIC_NAME_CLK_LCLK_DS_DISABLED,

2080  AMDSMI_METRIC_NAME_PCIE_OTHER_END_RECOVERY_COUNT,

2081  AMDSMI_METRIC_NAME_TEMP_SHUTDOWN_XCD,

2082  AMDSMI_METRIC_NAME_TEMP_SHUTDOWN_AID,

2083  AMDSMI_METRIC_NAME_TEMP_SHUTDOWN_MID,

2084  AMDSMI_METRIC_NAME_TEMP_SHUTDOWN_HBM,

2085  AMDSMI_METRIC_NAME_TEMP_THROTTLE_XCD,

2086  AMDSMI_METRIC_NAME_TEMP_THROTTLE_AID,

2087  AMDSMI_METRIC_NAME_TEMP_THROTTLE_MID,

2088  AMDSMI_METRIC_NAME_TEMP_THROTTLE_HBM,

2089  AMDSMI_METRIC_NAME_SVI_PLANE_VDDCR_X0_TEMP,

2090  AMDSMI_METRIC_NAME_SVI_PLANE_VDDCR_X1_TEMP,

2091  AMDSMI_METRIC_NAME_SVI_PLANE_VDDIO_HBM_B_TEMP,

2092  AMDSMI_METRIC_NAME_SVI_PLANE_VDDIO_HBM_D_TEMP,

2093  AMDSMI_METRIC_NAME_SVI_PLANE_VDDIO_04_HBM_B_TEMP,

2094  AMDSMI_METRIC_NAME_SVI_PLANE_VDDIO_04_HBM_D_TEMP,

2095  AMDSMI_METRIC_NAME_SVI_PLANE_VDDCR_HBM_B_TEMP,

2096  AMDSMI_METRIC_NAME_SVI_PLANE_VDDCR_HBM_D_TEMP,

2097  AMDSMI_METRIC_NAME_SVI_PLANE_VDDCR_075_HBM_B_TEMP,

2098  AMDSMI_METRIC_NAME_SVI_PLANE_VDDCR_075_HBM_D_TEMP,

2099  AMDSMI_METRIC_NAME_SVI_PLANE_VDDIO_11_GTA_A_TEMP,

2100  AMDSMI_METRIC_NAME_SVI_PLANE_VDDIO_11_GTA_C_TEMP,

2101  AMDSMI_METRIC_NAME_SVI_PLANE_VDDAN_075_GTA_A_TEMP,

2102  AMDSMI_METRIC_NAME_SVI_PLANE_VDDAN_075_GTA_C_TEMP,

2103  AMDSMI_METRIC_NAME_SVI_PLANE_VDDCR_075_UCIE_TEMP,

2104  AMDSMI_METRIC_NAME_SVI_PLANE_VDDIO_065_UCIEAA_TEMP,

2105  AMDSMI_METRIC_NAME_SVI_PLANE_VDDIO_065_UCIEAM_A_TEMP,

2106  AMDSMI_METRIC_NAME_SVI_PLANE_VDDIO_065_UCIEAM_C_TEMP,

2107  AMDSMI_METRIC_NAME_SVI_PLANE_VDDCR_SOCIO_A_TEMP,

2108  AMDSMI_METRIC_NAME_SVI_PLANE_VDDCR_SOCIO_C_TEMP,

2109  AMDSMI_METRIC_NAME_SVI_PLANE_VDDAN_075_TEMP,

2110  AMDSMI_METRIC_NAME_SYSTEM_POWER_UBB_POWER,

2111  AMDSMI_METRIC_NAME_SYSTEM_POWER_UBB_POWER_THRESHOLD,

2112 

2113  AMDSMI_METRIC_NAME_UNKNOWN

2114 } amdsmi_metric_name_t;

2115 

2121 typedef enum {

2122  AMDSMI_METRIC_UNIT_COUNTER,

2123  AMDSMI_METRIC_UNIT_UINT,

2124  AMDSMI_METRIC_UNIT_BOOL,

2125  AMDSMI_METRIC_UNIT_MHZ,

2126  AMDSMI_METRIC_UNIT_PERCENT,

2127  AMDSMI_METRIC_UNIT_MILLIVOLT,

2128  AMDSMI_METRIC_UNIT_CELSIUS,

2129  AMDSMI_METRIC_UNIT_WATT,

2130  AMDSMI_METRIC_UNIT_JOULE,

2131  AMDSMI_METRIC_UNIT_GBPS,

2132  AMDSMI_METRIC_UNIT_MBITPS,

2133  AMDSMI_METRIC_UNIT_PCIE_GEN,

2134  AMDSMI_METRIC_UNIT_PCIE_LANES,

2135  AMDSMI_METRIC_UNIT_15_625_MILLIJOULE,

2136  AMDSMI_METRIC_UNIT_UNKNOWN

2137 } amdsmi_metric_unit_t;

2138 

2144 typedef enum {

2145  AMDSMI_METRIC_TYPE_COUNTER = (1 << 0),

2146  AMDSMI_METRIC_TYPE_CHIPLET = (1 << 1),

2147  AMDSMI_METRIC_TYPE_INST = (1 << 2),

2148  AMDSMI_METRIC_TYPE_ACC = (1 << 3)

2149 } amdsmi_metric_type_t;

2150 

2151 typedef enum {

2152  AMDSMI_METRIC_RES_GROUP_UNKNOWN,

2153  AMDSMI_METRIC_RES_GROUP_NA,

2154  AMDSMI_METRIC_RES_GROUP_GPU,

2155  AMDSMI_METRIC_RES_GROUP_XCP,

2156  AMDSMI_METRIC_RES_GROUP_AID,

2157  AMDSMI_METRIC_RES_GROUP_MID,

2158  AMDSMI_METRIC_RES_GROUP_SYSTEM

2159 } amdsmi_metric_res_group_t;

2160 

2161 typedef enum {

2162  AMDSMI_METRIC_RES_SUBGROUP_UNKNOWN,

2163  AMDSMI_METRIC_RES_SUBGROUP_NA,

2164  AMDSMI_METRIC_RES_SUBGROUP_XCC,

2165  AMDSMI_METRIC_RES_SUBGROUP_ENGINE,

2166  AMDSMI_METRIC_RES_SUBGROUP_HBM,

2167  AMDSMI_METRIC_RES_SUBGROUP_BASEBOARD,

2168  AMDSMI_METRIC_RES_SUBGROUP_GPUBOARD

2169 } amdsmi_metric_res_subgroup_t;

2170 

2171 typedef enum {

2172  AMDSMI_VF_MODE_1 = (1U << 1),

2173  AMDSMI_VF_MODE_2 = (1U << 2),

2174  AMDSMI_VF_MODE_4 = (1U << 4),

2175  AMDSMI_VF_MODE_8 = (1U << 8),

2176  AMDSMI_VF_MODE_ALL = (AMDSMI_VF_MODE_1 | AMDSMI_VF_MODE_2 | AMDSMI_VF_MODE_4 | AMDSMI_VF_MODE_8)

2177 } amdsmi_vf_mode_t;

2178 

2184 typedef enum {

2185  AMDSMI_DRIVER_MODEL_TYPE_WDDM = 0,

2186  AMDSMI_DRIVER_MODEL_TYPE_WDM = 1,

2187  AMDSMI_DRIVER_MODEL_TYPE_MCDM = 2,

2188  AMDSMI_DRIVER_MODEL_TYPE__MAX = 3,

2189 } amdsmi_driver_model_type_t;

2190 

2191 #define AMDSMI_FABRIC_ACTIVE_ACCELERATORS_BITMAP_SIZE 32

2192 #define AMDSMI_FABRIC_MAX_LOCAL_GPUS 8

2193 

2199 typedef enum {

2200  AMDSMI_FABRIC_TYPE_UALOE,

2201  AMDSMI_FABRIC_TYPE_UALINK,

2202  AMDSMI_FABRIC_TYPE_UNKNOWN

2203 } amdsmi_fabric_type_t;

2204 

2210 typedef enum {

2211  AMDSMI_FABRIC_NPA_ADDRESS_MODE_SOURCE_ALIASING,

2212  AMDSMI_FABRIC_NPA_ADDRESS_MODE_SOURCE_IDENTIFICATION,

2213  AMDSMI_FABRIC_NPA_ADDRESS_MODE_UNKNOWN,

2214 } amdsmi_fabric_npa_address_mode_t;

2215 

2221 typedef enum {

2222  AMDSMI_FABRIC_ACCELERATOR_VPOD_STATE_UNCONFIGURED,

2223  AMDSMI_FABRIC_ACCELERATOR_VPOD_STATE_CONFIGURED,

2224  AMDSMI_FABRIC_ACCELERATOR_VPOD_STATE_READY,

2225  AMDSMI_FABRIC_ACCELERATOR_VPOD_STATE_ACTIVE,

2226  AMDSMI_FABRIC_ACCELERATOR_VPOD_STATE_ERROR,

2227  AMDSMI_FABRIC_ACCELERATOR_VPOD_STATE_UNKNOWN,

2228 } amdsmi_fabric_accelerator_vpod_state_t;

2229 

2235 typedef enum {

2236  AMDSMI_TDI_STATE_UNLOCKED,

2237  AMDSMI_TDI_STATE_LOCKED,

2238  AMDSMI_TDI_STATE_RUN,

2239  AMDSMI_TDI_STATE_ERROR

2240 } amdsmi_tdi_state_t;

2241 

2247  typedef enum {

2248  AMDSMI_CC_MODE_OFF,

2249  AMDSMI_CC_MODE_ON,

2250  AMDSMI_CC_MODE_DEV,

2251 } amdsmi_cc_mode_t;

2252 

2258 typedef struct {

2259  uint64_t handle;

2260 } amdsmi_vf_handle_t;

2261 

2267 typedef struct {

2268  amdsmi_vf_handle_t fcn_id;

2269  uint64_t dev_id;

2270  uint64_t timestamp;

2271  uint64_t data;

2272  uint32_t category;

2273  uint32_t subcode;

2274  uint32_t level;

2275  char date[AMDSMI_MAX_DATE_STRING_LENGTH];

2276  char message[AMDSMI_MAX_STRING_LENGTH];

2277  amdsmi_processor_handle processor_handle;

2278  uint64_t reserved[37];

2279 } amdsmi_event_entry_t;

2280 

2286 typedef struct {

2287  uint32_t version;

2288 } amdsmi_handshake_t;

2289 

2295 typedef struct {

2296  uint32_t total_fb_size;

2297  uint32_t pf_fb_reserved;

2298  uint32_t pf_fb_offset;

2299  uint32_t fb_alignment;

2300  uint32_t max_vf_fb_usable;

2301  uint32_t min_vf_fb_usable;

2302  uint64_t reserved[5];

2303 } amdsmi_pf_fb_info_t;

2304 

2310 typedef struct {

2311  uint32_t fb_offset;

2312  uint32_t fb_size;

2313  uint64_t reserved[3];

2314 } amdsmi_vf_fb_info_t;

2315 

2321 typedef struct {

2322  amdsmi_vf_handle_t id;

2323  amdsmi_vf_fb_info_t fb;

2324  uint64_t reserved[3];

2325 } amdsmi_partition_info_t;

2326 

2332 typedef struct {

2333  uint8_t enabled;

2334  struct {

2335  amdsmi_guard_state_t state;

2336  /* amount of monitor event after enabled */

2337  uint32_t amount;

2338  /* threshold of events in the interval(seconds) */

2339  uint64_t interval;

2340  uint32_t threshold;

2341  /* current number of events in the interval*/

2342  uint32_t active;

2343  uint32_t reserved[4];

2344  } guard[AMDSMI_GUARD_EVENT__MAX];

2345  uint32_t reserved[6];

2346 } amdsmi_guard_info_t;

2347 

2353 typedef struct {

2354  amdsmi_vf_fb_info_t fb;

2355  uint32_t gfx_timeslice;

2356  uint64_t reserved[27];

2357 } amdsmi_vf_info_t;

2358 

2364 typedef struct {

2365  uint64_t phy_addr;

2366  uint64_t phy_size;

2367  uint32_t numa_id;

2368  char name[AMDSMI_MAX_STRING_LENGTH];

2369  uint64_t reserved[29];

2370 } amdsmi_vf_hbm_info_t;

2371 

2377 typedef struct {

2378  uint64_t flr_count;

2379  uint64_t boot_up_time;

2380  uint64_t shutdown_time;

2381  uint64_t reset_time;

2382  amdsmi_vf_sched_state_t state;

2383  char last_boot_start[AMDSMI_MAX_STRING_LENGTH];

2384  char last_boot_end[AMDSMI_MAX_STRING_LENGTH];

2385  char last_shutdown_start[AMDSMI_MAX_STRING_LENGTH];

2386  char last_shutdown_end[AMDSMI_MAX_STRING_LENGTH];

2387  char last_reset_start[AMDSMI_MAX_STRING_LENGTH];

2388  char last_reset_end[AMDSMI_MAX_STRING_LENGTH];

2389  char current_active_time[AMDSMI_MAX_STRING_LENGTH];

2390  char current_running_time[AMDSMI_MAX_STRING_LENGTH];

2391  char total_active_time[AMDSMI_MAX_STRING_LENGTH];

2392  char total_running_time[AMDSMI_MAX_STRING_LENGTH];

2393  uint64_t reserved[11];

2394 } amdsmi_sched_info_t;

2395 

2401 typedef struct {

2402  amdsmi_sched_info_t sched;

2403  amdsmi_guard_info_t guard;

2404  uint64_t reserved[8];

2405 } amdsmi_vf_data_t;

2406 

2412 typedef struct {

2413  uint64_t total;

2414  uint64_t available;

2415  uint64_t optimal;

2416  uint64_t min_value;

2417  uint64_t max_value;

2418  uint64_t reserved[2];

2419 } amdsmi_profile_caps_info_t;

2420 

2426 typedef struct {

2427  uint8_t profile_count;

2428  uint8_t current_profile_index;

2429  struct {

2430  uint32_t vf_count;

2431  amdsmi_profile_caps_info_t profile_caps[AMDSMI_PROFILE_CAPABILITY__MAX];

2432  } profiles[AMDSMI_MAX_PROFILE_COUNT];

2433  uint32_t reserved[6];

2434 } amdsmi_profile_info_t;

2435 

2441 typedef struct {

2442  char driver_version[AMDSMI_MAX_STRING_LENGTH];

2443  uint32_t fb_usage;

2444  uint64_t reserved[23];

2445 } amdsmi_guest_data_t;

2446 

2452 typedef struct {

2453  uint32_t dfc_fw_version;

2454  uint32_t dfc_fw_total_entries;

2455  uint32_t dfc_gart_wr_guest_min;

2456  uint32_t dfc_gart_wr_guest_max;

2457  uint32_t reserved[12];

2458 } amdsmi_dfc_fw_header_t;

2459 

2465 typedef struct {

2466  uint32_t oldest;

2467  uint32_t latest;

2468 } amdsmi_dfc_fw_white_list_t;

2469 

2475 typedef struct {

2476  uint8_t ta_uuid[AMDSMI_MAX_UUID_ELEMENTS];

2477 } amdsmi_dfc_fw_ta_uuid_t;

2478 

2484 typedef struct {

2485  uint32_t dfc_fw_type;

2486  uint32_t verification_enabled;

2487  uint32_t customer_ordinal;

2488  uint32_t reserved[13];

2489  union {

2490  amdsmi_dfc_fw_white_list_t white_list[AMDSMI_MAX_WHITE_LIST_ELEMENTS];

2491  amdsmi_dfc_fw_ta_uuid_t ta_white_list[AMDSMI_MAX_TA_WHITE_LIST_ELEMENTS];

2492  };

2493  uint32_t black_list[AMDSMI_MAX_BLACK_LIST_ELEMENTS];

2494 } amdsmi_dfc_fw_data_t;

2495 

2501 typedef struct {

2502  amdsmi_dfc_fw_header_t header;

2503  amdsmi_dfc_fw_data_t data[AMDSMI_DFC_FW_NUMBER_OF_ENTRIES];

2504 } amdsmi_dfc_fw_t;

2505 

2515 typedef struct {

2516  uint64_t retired_page;

2517  uint64_t ts;

2518  unsigned char err_type;

2519  union {

2520  unsigned char bank;

2521  unsigned char cu;

2522  };

2523  unsigned char mem_channel;

2524  unsigned char mcumc_id;

2525  uint32_t reserved[3];

2526 } amdsmi_eeprom_table_record_t;

2527 

2533 typedef struct {

2534  uint64_t timestamp;

2535  uint32_t vf_idx;

2536  uint32_t fw_id;

2537  uint16_t status;

2538  uint32_t reserved[3];

2539 } amdsmi_fw_load_error_record_t;

2540 

2546 typedef struct {

2547  uint8_t num_err_records;

2548  amdsmi_fw_load_error_record_t err_records[AMDSMI_MAX_ERR_RECORDS];

2549  uint64_t reserved[7];

2550 } amdsmi_fw_error_record_t;

2551 

2557 typedef struct {

2558  uint64_t weight;

2559  amdsmi_link_status_t link_status;

2560  amdsmi_link_type_t link_type;

2561  uint8_t num_hops;

2562  uint8_t fb_sharing;

2563  uint32_t reserved[10];

2564 } amdsmi_link_topology_t;

2565 

2571 typedef struct {

2572  uint32_t count;

2573  amdsmi_processor_handle processor_list[AMDSMI_MAX_DEVICES];

2574  uint64_t reserved[15];

2575 } amdsmi_topology_nearest_t;

2576 

2582 typedef union {

2583  struct cap_ {

2584  uint32_t mode_custom_cap :1;

2585  uint32_t mode_1_cap :1;

2586  uint32_t mode_2_cap :1;

2587  uint32_t mode_4_cap :1;

2588  uint32_t mode_8_cap :1;

2589  uint32_t reserved :27;

2590  } cap;

2591  uint32_t xgmi_fb_sharing_cap_mask;

2592 } amdsmi_xgmi_fb_sharing_caps_t;

2593 

2599 typedef struct {

2600  amdsmi_metric_unit_t unit;

2601  amdsmi_metric_name_t name;

2602  amdsmi_metric_category_t category;

2603  uint32_t flags;

2604  uint32_t vf_mask;

2605  uint64_t val;

2606  amdsmi_metric_res_group_t res_group;

2607  amdsmi_metric_res_subgroup_t res_subgroup;

2608  uint32_t res_instance;

2609  uint32_t reserved[5];

2610 } amdsmi_metric_t;

2611 

2617 typedef struct {

2618  uint32_t major;

2619  uint32_t minor;

2620  uint32_t release;

2621 } amdsmi_version_t;

2622 

2623 typedef struct {

2624  amdsmi_accelerator_partition_profile_t profile;

2625  uint32_t vf_mode;

2626  uint64_t reserved[6];

2627 } amdsmi_accelerator_partition_profile_global_t;

2628 

2629 typedef struct {

2630  uint32_t num_profiles;

2631  uint32_t num_resource_profiles;

2632  amdsmi_accelerator_partition_resource_profile_t resource_profiles[AMDSMI_MAX_CP_PROFILE_RESOURCES];

2633  uint32_t default_profile_index;

2634  amdsmi_accelerator_partition_profile_global_t profiles[AMDSMI_MAX_ACCELERATOR_PROFILE];

2635  uint64_t reserved[30];

2636 } amdsmi_accelerator_partition_profile_config_global_t;

2637 

2643 typedef enum {

2644  AMDSMI_FABRIC_TELEMETRY_CATEGORY_UALOE = 0,

2645  AMDSMI_FABRIC_TELEMETRY_CATEGORY_SWITCH = 1,

2646  AMDSMI_FABRIC_TELEMETRY_CATEGORY_CRYPTO = 2,

2647  AMDSMI_FABRIC_TELEMETRY_CATEGORY_PFC = 3,

2648  AMDSMI_FABRIC_TELEMETRY_CATEGORY_NETPORT = 4,

2649  AMDSMI_FABRIC_TELEMETRY_CATEGORY_DERIVED_UALOE = 5,

2650  AMDSMI_FABRIC_TELEMETRY_CATEGORY_DERIVED_NETPORT = 6,

2651  AMDSMI_FABRIC_TELEMETRY_CATEGORY_MAX = 7,

2652  AMDSMI_FABRIC_TELEMETRY_CATEGORY_INVALID = 0xFFFFFFFF,

2653 } amdsmi_fabric_telemetry_category_t;

2654 

2660 #define AMDSMI_FABRIC_TELEMETRY_CATEGORY_MASK_UALOE (1U << AMDSMI_FABRIC_TELEMETRY_CATEGORY_UALOE)

2661 #define AMDSMI_FABRIC_TELEMETRY_CATEGORY_MASK_SWITCH (1U << AMDSMI_FABRIC_TELEMETRY_CATEGORY_SWITCH)

2662 #define AMDSMI_FABRIC_TELEMETRY_CATEGORY_MASK_CRYPTO (1U << AMDSMI_FABRIC_TELEMETRY_CATEGORY_CRYPTO)

2663 #define AMDSMI_FABRIC_TELEMETRY_CATEGORY_MASK_PFC (1U << AMDSMI_FABRIC_TELEMETRY_CATEGORY_PFC)

2664 #define AMDSMI_FABRIC_TELEMETRY_CATEGORY_MASK_NETPORT (1U << AMDSMI_FABRIC_TELEMETRY_CATEGORY_NETPORT)

2665 #define AMDSMI_FABRIC_TELEMETRY_CATEGORY_MASK_DERIVED_UALOE (1U << AMDSMI_FABRIC_TELEMETRY_CATEGORY_DERIVED_UALOE)

2666 #define AMDSMI_FABRIC_TELEMETRY_CATEGORY_MASK_DERIVED_NETPORT (1U << AMDSMI_FABRIC_TELEMETRY_CATEGORY_DERIVED_NETPORT)

2667 

2673 typedef struct {

2674  uint64_t id;

2675  uint64_t value;

2676 } amdsmi_fabric_telemetry_item_t;

2677 

2685 typedef struct {

2686  char text[32];

2687 } amdsmi_fabric_label_t;

2688 

2696 typedef struct {

2697  amdsmi_fabric_label_t name;

2698  unsigned logical_idx;

2699  unsigned item_count;

2700  amdsmi_fabric_telemetry_item_t *items;

2701 } amdsmi_fabric_telemetry_instance_t;

2702 

2710 typedef struct {

2711  amdsmi_fabric_telemetry_category_t category;

2712  uint64_t generation_count;

2713  struct timespec timestamp;

2714  unsigned instance_count;

2715  amdsmi_fabric_telemetry_instance_t *instances;

2716 } amdsmi_fabric_telemetry_dataset_t;

2717 

2727 typedef struct {

2728  amdsmi_fabric_telemetry_dataset_t *datasets[AMDSMI_FABRIC_TELEMETRY_CATEGORY_MAX];

2729 } amdsmi_fabric_telemetry_t;

2730 

2736 typedef struct {

2737  uint32_t accelerator_id;

2738  amdsmi_fabric_type_t fabric_type;

2739  uint32_t bandwidth;

2740  uint32_t latency;

2741  uint8_t ppod_id[AMDSMI_FABRIC_PPOD_ID_SIZE];

2742  uint32_t ppod_size;

2743  uint32_t vpod_id;

2744  uint32_t vpod_size;

2745  uint32_t vpod_active_accelerators[AMDSMI_FABRIC_ACTIVE_ACCELERATORS_BITMAP_SIZE];

2746  uint32_t local_accelerators[AMDSMI_FABRIC_MAX_LOCAL_GPUS];

2747  amdsmi_fabric_npa_address_mode_t addr_mode;

2748  amdsmi_fabric_accelerator_vpod_state_t accel_state;

2749 } amdsmi_fabric_info_v1_t;

2750 

2751 typedef struct {

2752  uint32_t version;

2753  union {

2754  amdsmi_fabric_info_v1_t v1;

2755  } fabric_info;

2756 } amdsmi_fabric_info_ver_t;

2757 

2762 typedef struct {

2763  amdsmi_bdf_t bdf;

2764  amdsmi_fabric_info_ver_t info;

2765  uint32_t reserved[15];

2766 } amdsmi_fabric_info_t;

2767 

2773 #define AMDSMI_MAX_NIC_PORTS 32

2774 #define AMDSMI_MAX_NIC_RDMA_DEV 32

2775 #define AMDSMI_MAX_NIC_FW 64

2776 

2782 typedef enum {

2783  AMDSMI_NIC_FW_VERSION_TYPE_FIXED,

2784  AMDSMI_NIC_FW_VERSION_TYPE_RUNNING,

2785  AMDSMI_NIC_FW_VERSION_TYPE_STORED

2786 } amdsmi_nic_fw_version_type_t;

2787 

2795 typedef struct {

2796  char name[AMDSMI_MAX_STRING_LENGTH];

2797  uint64_t value;

2798 } amdsmi_nic_stat_t;

2799 

2805 typedef struct {

2806  uint16_t vendor_id;

2807  uint16_t subvendor_id;

2808  uint16_t device_id;

2809  uint16_t subsystem_id;

2810  uint8_t revision;

2811  char permanent_address[AMDSMI_MAX_STRING_LENGTH];

2812  char product_name[AMDSMI_MAX_STRING_LENGTH];

2813  char part_number[AMDSMI_MAX_STRING_LENGTH];

2814  char serial_number[AMDSMI_MAX_STRING_LENGTH];

2815  char vendor_name[AMDSMI_MAX_STRING_LENGTH];

2816 } amdsmi_nic_asic_info_t;

2817 

2823 typedef struct {

2824  amdsmi_bdf_t bdf;

2825  uint8_t max_pcie_width;

2826  uint32_t max_pcie_speed;

2827  char pcie_interface_version[AMDSMI_MAX_STRING_LENGTH];

2828  char slot_type[AMDSMI_MAX_STRING_LENGTH];

2829 } amdsmi_nic_bus_info_t;

2830 

2836 typedef struct {

2837  uint8_t node;

2838  char affinity[AMDSMI_MAX_STRING_LENGTH];

2839 } amdsmi_nic_numa_info_t;

2840 

2846 typedef struct {

2847  char name[AMDSMI_MAX_STRING_LENGTH];

2848  char version[AMDSMI_MAX_STRING_LENGTH];

2849 } amdsmi_nic_fw_t;

2850 

2856 typedef struct {

2857  amdsmi_nic_fw_version_type_t type;

2858  amdsmi_nic_fw_t fw;

2859 } amdsmi_nic_fw_entry_t;

2860 

2866 typedef struct {

2867  uint32_t num_fw;

2868  amdsmi_nic_fw_entry_t fw[AMDSMI_MAX_NIC_FW];

2869 } amdsmi_nic_fw_info_t;

2870 

2897 typedef struct {

2898  amdsmi_bdf_t bdf;

2899  uint32_t port_num;

2900  char type[AMDSMI_MAX_STRING_LENGTH];

2901  char flavour[AMDSMI_MAX_STRING_LENGTH];

2902  char netdev[AMDSMI_MAX_STRING_LENGTH];

2903  uint8_t ifindex;

2904  char mac_address[AMDSMI_MAX_STRING_LENGTH];

2905  uint8_t carrier;

2906  uint16_t mtu;

2907  char link_state[AMDSMI_MAX_STRING_LENGTH];

2908  uint32_t link_speed;

2909  uint32_t active_fec;

2910  char autoneg[AMDSMI_MAX_STRING_LENGTH];

2911  char pause_autoneg[AMDSMI_MAX_STRING_LENGTH];

2912  char pause_rx[AMDSMI_MAX_STRING_LENGTH];

2913  char pause_tx[AMDSMI_MAX_STRING_LENGTH];

2914 } amdsmi_nic_port_t;

2915 

2921 typedef struct {

2922  uint32_t num_ports;

2923  amdsmi_nic_port_t ports[AMDSMI_MAX_NIC_PORTS];

2924 } amdsmi_nic_port_info_t;

2925 

2931 typedef struct {

2932  char name[AMDSMI_MAX_STRING_LENGTH];

2933  char version[AMDSMI_MAX_STRING_LENGTH];

2934 } amdsmi_nic_driver_info_t;

2935 

2946 typedef struct {

2947  char netdev[AMDSMI_MAX_STRING_LENGTH];

2948  char state[AMDSMI_MAX_STRING_LENGTH];

2949  uint8_t rdma_port;

2950  uint16_t max_mtu;

2951  uint16_t active_mtu;

2952 } amdsmi_nic_rdma_port_info_t;

2953 

2959 typedef struct {

2960  char rdma_dev[AMDSMI_MAX_STRING_LENGTH];

2961  char node_guid[AMDSMI_MAX_STRING_LENGTH];

2962  char node_type[AMDSMI_MAX_STRING_LENGTH];

2963  char sys_image_guid[AMDSMI_MAX_STRING_LENGTH];

2964  char fw_ver[AMDSMI_MAX_STRING_LENGTH];

2965  uint8_t num_rdma_ports;

2966  amdsmi_nic_rdma_port_info_t rdma_port_info[AMDSMI_MAX_NIC_PORTS];

2967 } amdsmi_nic_rdma_dev_info_t;

2968 

2974 typedef struct {

2975  uint8_t num_rdma_dev;

2976  amdsmi_nic_rdma_dev_info_t rdma_dev_info[AMDSMI_MAX_NIC_RDMA_DEV];

2977 } amdsmi_nic_rdma_devices_info_t;

2978 

2979 /*****************************************************************************/

3008 amdsmi_status_t amdsmi_init(uint64_t init_flags);

3009 

3024 amdsmi_status_t amdsmi_shut_down(void);

3025 

3028 /*****************************************************************************/

3061 amdsmi_status_t amdsmi_get_processor_handles_by_type(amdsmi_socket_handle socket_handle,

3062  processor_type_t processor_type,

3063  amdsmi_processor_handle *processor_handles,

3064  uint32_t *processor_count);

3065 

3085 amdsmi_status_t amdsmi_get_processor_type(amdsmi_processor_handle processor_handle,

3086  processor_type_t *processor_type);

3087 

3119 amdsmi_status_t amdsmi_get_socket_handles(uint32_t *socket_count, amdsmi_socket_handle *socket_handles);

3120 

3162 amdsmi_status_t amdsmi_get_processor_handles(amdsmi_socket_handle socket_handle,

3163  uint32_t *processor_count,

3164  amdsmi_processor_handle *processor_handles);

3165 

3185 amdsmi_status_t amdsmi_get_socket_info(amdsmi_socket_handle socket_handle, size_t len, char *name);

3186 

3204 amdsmi_status_t amdsmi_get_processor_handle_from_bdf(amdsmi_bdf_t bdf, amdsmi_processor_handle *processor_handle);

3205 

3220 amdsmi_status_t amdsmi_get_gpu_device_bdf(amdsmi_processor_handle processor_handle, amdsmi_bdf_t *bdf);

3221 

3241 amdsmi_status_t amdsmi_get_gpu_device_uuid(amdsmi_processor_handle processor_handle, unsigned int *uuid_length, char *uuid);

3242 

3260  amdsmi_status_t amdsmi_get_gpu_virtualization_mode(amdsmi_processor_handle processor_handle, amdsmi_virtualization_mode_t *mode);

3261 

3287 amdsmi_status_t amdsmi_get_cpu_affinity_with_scope(amdsmi_processor_handle processor_handle,

3288  uint32_t cpu_set_size, uint64_t *cpu_set, amdsmi_affinity_scope_t scope);

3289 

3310 amdsmi_status_t amdsmi_get_node_handle(amdsmi_processor_handle processor_handle, amdsmi_node_handle *node_handle);

3311 

3326 amdsmi_status_t amdsmi_get_index_from_processor_handle(amdsmi_processor_handle processor_handle, uint32_t *processor_index);

3327 

3344 amdsmi_status_t amdsmi_get_processor_handle_from_index(uint32_t processor_index, amdsmi_processor_handle *processor_handle);

3345 

3359 amdsmi_status_t amdsmi_get_processor_bdf(amdsmi_processor_handle processor_handle, amdsmi_bdf_t *bdf);

3360 

3375 amdsmi_status_t amdsmi_get_processor_handle_from_uuid(const char *uuid, amdsmi_processor_handle *processor_handle);

3376 

3391 amdsmi_status_t amdsmi_get_vf_handle_from_bdf(amdsmi_bdf_t bdf, amdsmi_vf_handle_t *vf_handle);

3392 

3407 amdsmi_status_t amdsmi_get_vf_handle_from_uuid(const char *uuid, amdsmi_vf_handle_t *vf_handle);

3408 

3424 amdsmi_status_t amdsmi_get_vf_handle_from_vf_index(amdsmi_processor_handle processor_handle, uint32_t fcn_idx, amdsmi_vf_handle_t *vf_handle);

3425 

3439 amdsmi_status_t amdsmi_get_vf_bdf(amdsmi_vf_handle_t vf_handle, amdsmi_bdf_t *bdf);

3440 

3459 amdsmi_status_t amdsmi_get_vf_uuid(amdsmi_vf_handle_t processor_handle, unsigned int *uuid_length, char *uuid);

3460 

3496 amdsmi_status_t amdsmi_get_nic_processor_handles(amdsmi_socket_handle socket_handle,

3497  uint32_t *processor_count,

3498  amdsmi_processor_handle *processor_handles);

3499 

3513 amdsmi_status_t amdsmi_get_nic_device_bdf(amdsmi_processor_handle processor_handle, amdsmi_bdf_t *bdf);

3514 

3517 /*****************************************************************************/

3538 amdsmi_status_t amdsmi_get_lib_version(amdsmi_version_t *version);

3539 

3542 /*****************************************************************************/

3567 amdsmi_status_t amdsmi_status_code_to_string(amdsmi_status_t status, const char **status_string);

3568 

3571 /*****************************************************************************/

3591 amdsmi_status_t amdsmi_get_gpu_driver_info(amdsmi_processor_handle processor_handle, amdsmi_driver_info_t *info);

3592 

3606 amdsmi_status_t amdsmi_get_gpu_driver_model(amdsmi_processor_handle processor_handle, amdsmi_driver_model_type_t *model);

3607 

3610 /*****************************************************************************/

3637 amdsmi_status_t amdsmi_get_gpu_asic_info(amdsmi_processor_handle processor_handle, amdsmi_asic_info_t *info);

3638 

3657 amdsmi_status_t

3658 amdsmi_get_power_cap_info(amdsmi_processor_handle processor_handle, uint32_t sensor_ind,

3659  amdsmi_power_cap_info_t *info);

3660 

3675 amdsmi_status_t amdsmi_get_pcie_info(amdsmi_processor_handle processor_handle, amdsmi_pcie_info_t *info);

3676 

3698 amdsmi_status_t amdsmi_get_gpu_pci_bandwidth(amdsmi_processor_handle processor_handle, amdsmi_pcie_bandwidth_t *bandwidth);

3699 

3714 amdsmi_status_t amdsmi_get_gpu_vram_info(amdsmi_processor_handle processor_handle, amdsmi_vram_info_t *info);

3715 

3730 amdsmi_status_t amdsmi_get_gpu_board_info(amdsmi_processor_handle processor_handle, amdsmi_board_info_t *info);

3731 

3746 amdsmi_status_t amdsmi_get_fb_layout(amdsmi_processor_handle processor_handle, amdsmi_pf_fb_info_t *info);

3747 

3750 /*****************************************************************************/

3769 amdsmi_status_t

3770 amdsmi_get_fw_info(amdsmi_processor_handle processor_handle, amdsmi_fw_info_t *info);

3771 

3787 amdsmi_status_t

3788 amdsmi_get_gpu_vbios_info(amdsmi_processor_handle processor_handle, amdsmi_vbios_info_t *info);

3789 

3804 amdsmi_status_t amdsmi_get_fw_error_records(amdsmi_processor_handle processor_handle, amdsmi_fw_error_record_t *records);

3805 

3819 amdsmi_status_t amdsmi_get_dfc_fw_table(amdsmi_processor_handle processor_handle, amdsmi_dfc_fw_t *info);

3820 

3823 /*****************************************************************************/

3842 amdsmi_status_t amdsmi_get_gpu_activity(amdsmi_processor_handle processor_handle, amdsmi_engine_usage_t *info);

3843 

3861 amdsmi_status_t amdsmi_get_power_info(amdsmi_processor_handle processor_handle, amdsmi_power_info_t *info);

3862 

3876 amdsmi_status_t

3877 amdsmi_is_gpu_power_management_enabled(amdsmi_processor_handle processor_handle, bool *enabled);

3878 

3898 amdsmi_status_t amdsmi_get_clock_info(amdsmi_processor_handle processor_handle, amdsmi_clk_type_t clk_type, amdsmi_clk_info_t *info);

3899 

3929 amdsmi_status_t amdsmi_get_temp_metric(amdsmi_processor_handle processor_handle, amdsmi_temperature_type_t sensor_type,

3930  amdsmi_temperature_metric_t metric, int64_t *temperature);

3931 

3953 amdsmi_status_t amdsmi_get_gpu_metrics(amdsmi_processor_handle processor_handle, uint32_t *metrics_size,

3954  amdsmi_metric_t *metrics);

3955 

3958 /*****************************************************************************/

3977  amdsmi_status_t

3978  amdsmi_get_gpu_memory_partition_config(amdsmi_processor_handle processor_handle,

3979  amdsmi_memory_partition_config_t *config);

3980 

4004 amdsmi_status_t

4005 amdsmi_set_gpu_memory_partition_mode(amdsmi_processor_handle processor_handle,

4006  amdsmi_memory_partition_type_t mode);

4007 

4010 /*****************************************************************************/

4032 amdsmi_status_t

4033 amdsmi_get_gpu_accelerator_partition_profile_config(amdsmi_processor_handle processor_handle,

4034  amdsmi_accelerator_partition_profile_config_t *profile_config);

4035 

4056 amdsmi_status_t

4057 amdsmi_get_gpu_accelerator_partition_profile(amdsmi_processor_handle processor_handle,

4058  amdsmi_accelerator_partition_profile_t *profile,

4059  uint32_t *partition_id);

4060 

4078 amdsmi_status_t

4079 amdsmi_set_gpu_accelerator_partition_profile(amdsmi_processor_handle processor_handle,

4080  uint32_t profile_index);

4081 

4104 amdsmi_status_t

4105 amdsmi_get_gpu_accelerator_partition_profile_config_global(amdsmi_processor_handle processor_handle,

4106  amdsmi_accelerator_partition_profile_config_global_t *config);

4107 

4110 /*****************************************************************************/

4129 amdsmi_status_t amdsmi_get_link_metrics(amdsmi_processor_handle processor_handle, amdsmi_link_metrics_t *link_metrics);

4130 

4158 amdsmi_status_t

4159 amdsmi_get_link_topology_nearest(amdsmi_processor_handle processor_handle,

4160  amdsmi_link_type_t link_type,

4161  amdsmi_topology_nearest_t* topology_nearest_info);

4162 

4189 amdsmi_status_t amdsmi_topo_get_p2p_status(amdsmi_processor_handle processor_handle_src,

4190  amdsmi_processor_handle processor_handle_dst,

4191  amdsmi_link_type_t *type, amdsmi_p2p_capability_t *cap);

4192 

4212 amdsmi_status_t amdsmi_topo_get_numa_node_number(amdsmi_processor_handle processor_handle, uint32_t *numa_node);

4213 

4256 amdsmi_status_t amdsmi_topo_get_link_type(amdsmi_processor_handle processor_handle_src,

4257  amdsmi_processor_handle processor_handle_dst,

4258  uint64_t *hops, amdsmi_link_type_t *type);

4259 

4285 amdsmi_status_t amdsmi_get_link_topology(amdsmi_processor_handle processor_handle_src,

4286  amdsmi_processor_handle processor_handle_dst,

4287  amdsmi_link_topology_t *topology_info);

4288 

4303 amdsmi_status_t amdsmi_get_xgmi_fb_sharing_caps(amdsmi_processor_handle processor_handle,

4304  amdsmi_xgmi_fb_sharing_caps_t *caps);

4305 

4324 amdsmi_status_t amdsmi_get_xgmi_fb_sharing_mode_info(amdsmi_processor_handle processor_handle_src,

4325  amdsmi_processor_handle processor_handle_dst,

4326  amdsmi_xgmi_fb_sharing_mode_t mode,

4327  uint8_t *fb_sharing);

4328 

4342 amdsmi_status_t amdsmi_set_xgmi_fb_sharing_mode(amdsmi_processor_handle processor_handle,

4343  amdsmi_xgmi_fb_sharing_mode_t mode);

4344 

4362 amdsmi_status_t amdsmi_set_xgmi_fb_sharing_mode_v2(amdsmi_processor_handle *processor_list,

4363  uint32_t num_processors,

4364  amdsmi_xgmi_fb_sharing_mode_t mode);

4365 

4368 /*****************************************************************************/

4394 amdsmi_status_t amdsmi_get_soc_pstate(amdsmi_processor_handle processor_handle,

4395  amdsmi_dpm_policy_t* policy);

4396 

4418 amdsmi_status_t amdsmi_set_soc_pstate(amdsmi_processor_handle processor_handle,

4419  uint32_t policy_id);

4420 

4440 amdsmi_status_t amdsmi_get_xgmi_plpd(amdsmi_processor_handle processor_handle,

4441  amdsmi_dpm_policy_t *xgmi_plpd);

4442 

4464 amdsmi_status_t amdsmi_set_xgmi_plpd(amdsmi_processor_handle processor_handle,

4465  uint32_t policy_id);

4466 

4469 /*****************************************************************************/

4496 amdsmi_status_t amdsmi_set_power_cap(amdsmi_processor_handle processor_handle,

4497  uint32_t sensor_ind, uint64_t cap);

4498 

4518 amdsmi_status_t amdsmi_get_supported_power_cap(amdsmi_processor_handle processor_handle,

4519  uint32_t *sensor_count,

4520  uint32_t *sensor_inds,

4521  amdsmi_power_cap_type_t *sensor_types);

4522 

4525 /*****************************************************************************/

4546 amdsmi_status_t amdsmi_get_gpu_cache_info(amdsmi_processor_handle processor_handle, amdsmi_gpu_cache_info_t *info);

4547 

4550 /*****************************************************************************/

4580 amdsmi_status_t amdsmi_get_gpu_ecc_count(amdsmi_processor_handle processor_handle,

4581  amdsmi_gpu_block_t block, amdsmi_error_count_t *ec);

4582 

4610 amdsmi_status_t amdsmi_get_gpu_ecc_enabled(amdsmi_processor_handle processor_handle,

4611  uint64_t *enabled_blocks);

4612 

4629 amdsmi_status_t

4630 amdsmi_get_gpu_total_ecc_count(amdsmi_processor_handle processor_handle, amdsmi_error_count_t *ec);

4631 

4634 /*****************************************************************************/

4675 amdsmi_status_t

4676 amdsmi_get_gpu_cper_entries(amdsmi_processor_handle processor_handle, uint32_t severity_mask, char *cper_data,

4677  uint64_t *buf_size, amdsmi_cper_hdr_t** cper_hdrs, uint64_t *entry_count, uint64_t *cursor);

4678 

4704 amdsmi_status_t amdsmi_get_afids_from_cper(char *cper_buffer, uint32_t buf_size, uint64_t *afids, uint32_t *num_afids);

4705 

4720 amdsmi_status_t amdsmi_get_gpu_ras_feature_info(amdsmi_processor_handle processor_handle, amdsmi_ras_feature_t *ras_feature);

4721 

4740 amdsmi_status_t amdsmi_get_gpu_bad_page_info(amdsmi_processor_handle processor_handle, uint32_t *bad_page_size,

4741  amdsmi_eeprom_table_record_t *bad_pages);

4742 

4759 amdsmi_status_t amdsmi_get_gpu_ras_policy_info(amdsmi_processor_handle processor_handle,

4760  amdsmi_gpu_ras_policy_info_t *info);

4761 

4785 amdsmi_status_t amdsmi_get_bad_page_threshold(amdsmi_processor_handle processor_handle, uint32_t *threshold);

4786 

4820 amdsmi_status_t

4821 amdsmi_get_fabric_cper_entries(amdsmi_processor_handle processor_handle, uint32_t severity_mask, char *cper_data,

4822  uint64_t *buf_size, amdsmi_cper_hdr_t** cper_hdrs, uint64_t *entry_count, uint64_t *cursor);

4823 

4826 /*****************************************************************************/

4851 amdsmi_status_t amdsmi_reset_gpu(amdsmi_processor_handle processor_handle);

4852 

4876 amdsmi_status_t amdsmi_get_npm_info(amdsmi_node_handle node_handle, amdsmi_npm_info_t *info);

4877 

4880 /*****************************************************************************/

4905 amdsmi_status_t

4906 amdsmi_get_gpu_ptl_state(amdsmi_processor_handle processor_handle, bool *enabled);

4907 

4926 amdsmi_status_t amdsmi_set_gpu_ptl_state(amdsmi_processor_handle processor_handle, bool enable);

4927 

4950 amdsmi_status_t

4951 amdsmi_get_gpu_ptl_formats(amdsmi_processor_handle processor_handle,

4952  amdsmi_ptl_data_format_t *data_format1,

4953  amdsmi_ptl_data_format_t *data_format2);

4954 

4979 amdsmi_status_t

4980 amdsmi_set_gpu_ptl_formats(amdsmi_processor_handle processor_handle,

4981  amdsmi_ptl_data_format_t data_format1,

4982  amdsmi_ptl_data_format_t data_format2);

4983 

4986 /*****************************************************************************/

5008 amdsmi_status_t

5009 amdsmi_get_num_vf(amdsmi_processor_handle processor_handle, uint32_t *num_vf_enabled,

5010  uint32_t *num_vf_supported);

5011 

5030 amdsmi_status_t

5031 amdsmi_get_vf_partition_info(amdsmi_processor_handle processor_handle, unsigned int vf_buffer_num,

5032  amdsmi_partition_info_t *info);

5033 

5048 amdsmi_status_t

5049 amdsmi_get_partition_profile_info(amdsmi_processor_handle processor_handle,

5050  amdsmi_profile_info_t *profile_info);

5051 

5054 /*****************************************************************************/

5073 amdsmi_status_t

5074 amdsmi_get_vf_info(amdsmi_vf_handle_t vf_handle, amdsmi_vf_info_t *config);

5075 

5090 amdsmi_status_t

5091 amdsmi_get_vf_data(amdsmi_vf_handle_t vf_handle, amdsmi_vf_data_t *info);

5092 

5106 amdsmi_status_t amdsmi_get_vf_hbm_info(amdsmi_vf_handle_t vf_handle, amdsmi_vf_hbm_info_t *info);

5107 

5110 /*****************************************************************************/

5150 amdsmi_status_t

5151 amdsmi_event_create(amdsmi_processor_handle *processor_list, uint32_t num_devices,

5152  uint64_t event_types, amdsmi_event_set *set);

5153 

5185 amdsmi_status_t

5186 amdsmi_event_read(amdsmi_event_set set, int64_t timeout_usec, amdsmi_event_entry_t *event);

5187 

5199 amdsmi_status_t

5200 amdsmi_event_destroy(amdsmi_event_set set);

5201 

5204 /*****************************************************************************/

5226 amdsmi_status_t

5227 amdsmi_get_guest_data(amdsmi_vf_handle_t vf_handle, amdsmi_guest_data_t *info);

5228 

5244 amdsmi_status_t

5245 amdsmi_get_vf_fw_info(amdsmi_vf_handle_t vf_handle, amdsmi_fw_info_t *info);

5246 

5249 /*****************************************************************************/

5266 amdsmi_status_t amdsmi_clear_vf_fb(amdsmi_vf_handle_t vf_handle);

5267 

5281 amdsmi_status_t amdsmi_set_num_vf(amdsmi_processor_handle processor_handle, uint32_t num_vf);

5282 

5285 /*****************************************************************************/

5303 amdsmi_status_t amdsmi_get_tdi_state(amdsmi_vf_handle_t vf_handle, amdsmi_tdi_state_t *state);

5304 

5318 amdsmi_status_t amdsmi_get_cc_mode(amdsmi_processor_handle processor_handle, amdsmi_cc_mode_t *mode);

5319 

5333 amdsmi_status_t amdsmi_set_cc_mode(amdsmi_processor_handle processor_handle, amdsmi_cc_mode_t mode);

5334 

5337 /*****************************************************************************/

5359 amdsmi_status_t amdsmi_get_gpu_fabric_info(amdsmi_processor_handle processor_handle,

5360  amdsmi_fabric_info_t *info);

5361 

5382 amdsmi_status_t amdsmi_alloc_fabric_telemetry(amdsmi_processor_handle processor_handle,

5383  uint32_t category_mask, amdsmi_fabric_telemetry_t **telemetry);

5384 

5401 amdsmi_status_t amdsmi_get_fabric_telemetry_data(amdsmi_processor_handle processor_handle,

5402  amdsmi_fabric_telemetry_t *telemetry);

5403 

5419 amdsmi_status_t amdsmi_free_fabric_telemetry(amdsmi_processor_handle processor_handle,

5420  amdsmi_fabric_telemetry_t *telemetry);

5421 

5424 /*****************************************************************************/

5443 amdsmi_status_t amdsmi_get_nic_driver_info(amdsmi_processor_handle processor_handle, amdsmi_nic_driver_info_t *info);

5444 

5462 amdsmi_status_t amdsmi_get_nic_fw_info(amdsmi_processor_handle processor_handle, amdsmi_nic_fw_info_t *info);

5463 

5478 amdsmi_status_t amdsmi_get_nic_asic_info(amdsmi_processor_handle processor_handle, amdsmi_nic_asic_info_t *info);

5479 

5494 amdsmi_status_t amdsmi_get_nic_bus_info(amdsmi_processor_handle processor_handle, amdsmi_nic_bus_info_t *info);

5495 

5510 amdsmi_status_t amdsmi_get_nic_numa_info(amdsmi_processor_handle processor_handle, amdsmi_nic_numa_info_t *info);

5511 

5526 amdsmi_status_t amdsmi_get_nic_port_info(amdsmi_processor_handle processor_handle, amdsmi_nic_port_info_t *info);

5527 

5542 amdsmi_status_t amdsmi_get_nic_rdma_dev_info(amdsmi_processor_handle processor_handle, amdsmi_nic_rdma_devices_info_t *info);

5543 

5566 amdsmi_status_t amdsmi_get_nic_port_statistics(amdsmi_processor_handle processor_handle, uint32_t port_index,

5567  uint32_t *num_stats, amdsmi_nic_stat_t *stats);

5568 

5595 amdsmi_status_t amdsmi_get_nic_vendor_statistics(amdsmi_processor_handle processor_handle, uint32_t port_index,

5596  uint32_t *num_stats, amdsmi_nic_stat_t *stats);

5597 

5620 amdsmi_status_t amdsmi_get_nic_rdma_port_statistics(amdsmi_processor_handle processor_handle, uint32_t rdma_port_index,

5621  uint32_t *num_stats, amdsmi_nic_stat_t *stats);

5622 

5625 #ifdef __cplusplus

5626 }

5627 #endif

5628 

5629 #endif // __AMDSMI_H__

5630 

amdsmi_event_reset_t

amdsmi_event_reset_t

Event Reset.

Definition: amdsmi.h:1469

amdsmi_vf_mode_t

amdsmi_vf_mode_t

Definition: amdsmi.h:2171

AMDSMI_VF_MODE_ALL

@ AMDSMI_VF_MODE_ALL

All VF counts supported.

Definition: amdsmi.h:2176

AMDSMI_MAX_ACCELERATOR_PROFILE

#define AMDSMI_MAX_ACCELERATOR_PROFILE

Maximum number of accelerator profiles.

Definition: amdsmi.h:163

AMDSMI_MAX_WHITE_LIST_ELEMENTS

#define AMDSMI_MAX_WHITE_LIST_ELEMENTS

Maximum number of white list elements for device access control.

Definition: amdsmi.h:182

amdsmi_event_fw_t

amdsmi_event_fw_t

Event Firmware.

Definition: amdsmi.h:1415

amdsmi_metric_category_t

amdsmi_metric_category_t

Metric Category.

Definition: amdsmi.h:1918

amdsmi_npm_status_t

amdsmi_npm_status_t

NPM status.

Definition: amdsmi.h:626

amdsmi_link_type_t

amdsmi_link_type_t

Link type.

Definition: amdsmi.h:446

AMDSMI_LINK_TYPE_NOT_APPLICABLE

@ AMDSMI_LINK_TYPE_NOT_APPLICABLE

Not Applicable Link Type.

Definition: amdsmi.h:450

AMDSMI_LINK_TYPE_INTERNAL

@ AMDSMI_LINK_TYPE_INTERNAL

Internal Link Type, within chip.

Definition: amdsmi.h:447

AMDSMI_LINK_TYPE_UNKNOWN

@ AMDSMI_LINK_TYPE_UNKNOWN

Unknown Link Type.

Definition: amdsmi.h:451

AMDSMI_LINK_TYPE_XNUMA

@ AMDSMI_LINK_TYPE_XNUMA

Two processors connect via different PCIe switches on different CPUs (NIC-to-GPU only)

Definition: amdsmi.h:453

AMDSMI_LINK_TYPE_NUMA

@ AMDSMI_LINK_TYPE_NUMA

Two processors connect via different PCIe switches but on the same CPU (NIC-to-GPU only)

Definition: amdsmi.h:452

AMDSMI_LINK_TYPE_PCIE

@ AMDSMI_LINK_TYPE_PCIE

Peripheral Component Interconnect Express Link Type.

Definition: amdsmi.h:448

AMDSMI_LINK_TYPE_XGMI

@ AMDSMI_LINK_TYPE_XGMI

GPU Memory Interconnect (multi GPU communication)

Definition: amdsmi.h:449

amdsmi_event_xgmi_t

amdsmi_event_xgmi_t

Event XGMI.

Definition: amdsmi.h:1719

AMDSMI_MAX_PROFILE_COUNT

#define AMDSMI_MAX_PROFILE_COUNT

Maximum number of profiles supported.

Definition: amdsmi.h:187

amdsmi_event_ecc_t

amdsmi_event_ecc_t

Event ECC.

Definition: amdsmi.h:1507

amdsmi_cc_mode_t

amdsmi_cc_mode_t

CC mode enumeration.

Definition: amdsmi.h:2247

AMDSMI_CC_MODE_OFF

@ AMDSMI_CC_MODE_OFF

Confidential Compute disabled.

Definition: amdsmi.h:2248

AMDSMI_CC_MODE_DEV

@ AMDSMI_CC_MODE_DEV

Confidential Compute enabled in developer mode.

Definition: amdsmi.h:2250

AMDSMI_CC_MODE_ON

@ AMDSMI_CC_MODE_ON

Confidential Compute enabled.

Definition: amdsmi.h:2249

amdsmi_event_gpumon_t

amdsmi_event_gpumon_t

Event GPU Monitor.

Definition: amdsmi.h:1684

amdsmi_accelerator_partition_type_t

amdsmi_accelerator_partition_type_t

Accelerator Partition.

Definition: amdsmi.h:232

AMDSMI_ACCELERATOR_PARTITION_DPX

@ AMDSMI_ACCELERATOR_PARTITION_DPX

Definition: amdsmi.h:236

AMDSMI_ACCELERATOR_PARTITION_QPX

@ AMDSMI_ACCELERATOR_PARTITION_QPX

Definition: amdsmi.h:240

AMDSMI_ACCELERATOR_PARTITION_INVALID

@ AMDSMI_ACCELERATOR_PARTITION_INVALID

Invalid accelerator partition type.

Definition: amdsmi.h:233

AMDSMI_ACCELERATOR_PARTITION_SPX

@ AMDSMI_ACCELERATOR_PARTITION_SPX

Definition: amdsmi.h:234

AMDSMI_ACCELERATOR_PARTITION_TPX

@ AMDSMI_ACCELERATOR_PARTITION_TPX

Definition: amdsmi.h:238

AMDSMI_ACCELERATOR_PARTITION_CPX

@ AMDSMI_ACCELERATOR_PARTITION_CPX

Definition: amdsmi.h:242

amdsmi_event_guard_t

amdsmi_event_guard_t

Event Guard.

Definition: amdsmi.h:1673

amdsmi_vf_config_flags_t

amdsmi_vf_config_flags_t

VF Config Flags.

Definition: amdsmi.h:1787

amdsmi_power_cap_type_t

amdsmi_power_cap_type_t

Power Cap Package Power Tracking (PPT) type.

Definition: amdsmi.h:778

AMDSMI_POWER_CAP_TYPE_PPT1

@ AMDSMI_POWER_CAP_TYPE_PPT1

PPT1 power cap; higher limit, raw input.

Definition: amdsmi.h:780

AMDSMI_POWER_CAP_TYPE_PPT0

@ AMDSMI_POWER_CAP_TYPE_PPT0

PPT0 power cap; lower limit, filtered input.

Definition: amdsmi.h:779

amdsmi_clk_type_t

amdsmi_clk_type_t

Clock types.

Definition: amdsmi.h:298

AMDSMI_CLK_TYPE_DCLK1

@ AMDSMI_CLK_TYPE_DCLK1

Display 2 clock, timing signals for display output.

Definition: amdsmi.h:312

AMDSMI_CLK_TYPE_MEM

@ AMDSMI_CLK_TYPE_MEM

Memory clock speed, system operating frequency.

Definition: amdsmi.h:307

AMDSMI_CLK_TYPE_SYS

@ AMDSMI_CLK_TYPE_SYS

System clock.

Definition: amdsmi.h:299

AMDSMI_CLK_TYPE_SOC

@ AMDSMI_CLK_TYPE_SOC

System On Chip clock, integrated circuit frequency.

Definition: amdsmi.h:306

AMDSMI_CLK_TYPE_GFX

@ AMDSMI_CLK_TYPE_GFX

Graphics clock.

Definition: amdsmi.h:301

AMDSMI_CLK_TYPE_DCLK0

@ AMDSMI_CLK_TYPE_DCLK0

Display 1 clock, timing signals for display output.

Definition: amdsmi.h:311

AMDSMI_CLK_TYPE_DCEF

@ AMDSMI_CLK_TYPE_DCEF

Definition: amdsmi.h:304

AMDSMI_CLK_TYPE_VCLK1

@ AMDSMI_CLK_TYPE_VCLK1

Video 1 clock, video processing units.

Definition: amdsmi.h:310

AMDSMI_CLK_TYPE_DF

@ AMDSMI_CLK_TYPE_DF

Definition: amdsmi.h:302

AMDSMI_CLK_TYPE_VCLK0

@ AMDSMI_CLK_TYPE_VCLK0

Video 0 clock, video processing units.

Definition: amdsmi.h:309

AMDSMI_CLK_TYPE_PCIE

@ AMDSMI_CLK_TYPE_PCIE

PCI Express clock, high bandwidth peripherals.

Definition: amdsmi.h:308

amdsmi_accelerator_partition_resource_type_t

amdsmi_accelerator_partition_resource_type_t

Accelerator Partition Resource Types.

Definition: amdsmi.h:284

AMDSMI_ACCELERATOR_DMA

@ AMDSMI_ACCELERATOR_DMA

Direct Memory Access, high speed data transfers.

Definition: amdsmi.h:288

AMDSMI_ACCELERATOR_XCC

@ AMDSMI_ACCELERATOR_XCC

Compute complex or stream processors.

Definition: amdsmi.h:285

AMDSMI_ACCELERATOR_DECODER

@ AMDSMI_ACCELERATOR_DECODER

Video decoding.

Definition: amdsmi.h:287

AMDSMI_ACCELERATOR_JPEG

@ AMDSMI_ACCELERATOR_JPEG

Encoding and Decoding jpeg engines.

Definition: amdsmi.h:289

AMDSMI_ACCELERATOR_ENCODER

@ AMDSMI_ACCELERATOR_ENCODER

Video encoding.

Definition: amdsmi.h:286

AMDSMI_MAX_ERR_RECORDS

#define AMDSMI_MAX_ERR_RECORDS

Maximum number of error records that can be stored.

Definition: amdsmi.h:186

amdsmi_card_form_factor_t

amdsmi_card_form_factor_t

Card Form Factor.

Definition: amdsmi.h:434

AMDSMI_CARD_FORM_FACTOR_OAM

@ AMDSMI_CARD_FORM_FACTOR_OAM

OAM form factor.

Definition: amdsmi.h:436

AMDSMI_CARD_FORM_FACTOR_UNKNOWN

@ AMDSMI_CARD_FORM_FACTOR_UNKNOWN

Unknown Form factor.

Definition: amdsmi.h:438

AMDSMI_CARD_FORM_FACTOR_PCIE

@ AMDSMI_CARD_FORM_FACTOR_PCIE

PCIE card form factor.

Definition: amdsmi.h:435

AMDSMI_CARD_FORM_FACTOR_CEM

@ AMDSMI_CARD_FORM_FACTOR_CEM

CEM form factor.

Definition: amdsmi.h:437

amdsmi_node_handle

void * amdsmi_node_handle

opaque handler point to underlying implementation

Definition: amdsmi.h:203

AMDSMI_MAX_NUM_XGMI_PHYSICAL_LINK

#define AMDSMI_MAX_NUM_XGMI_PHYSICAL_LINK

Common defines.

Definition: amdsmi.h:148

amdsmi_guard_type_t

amdsmi_guard_type_t

Guard Event.

Definition: amdsmi.h:1823

amdsmi_pp_throttler_type_t

amdsmi_pp_throttler_type_t

This enum determines which type of PP throttler event occurred.

Definition: amdsmi.h:1733

amdsmi_profile_capability_type_t

amdsmi_profile_capability_type_t

Profile Capability.

Definition: amdsmi.h:1905

AMDSMI_PROFILE_CAPABILITY_DECODE

@ AMDSMI_PROFILE_CAPABILITY_DECODE

decode engine

Definition: amdsmi.h:1908

AMDSMI_PROFILE_CAPABILITY_MEMORY

@ AMDSMI_PROFILE_CAPABILITY_MEMORY

memory

Definition: amdsmi.h:1906

AMDSMI_PROFILE_CAPABILITY_ENCODE

@ AMDSMI_PROFILE_CAPABILITY_ENCODE

encode engine

Definition: amdsmi.h:1907

AMDSMI_PROFILE_CAPABILITY_COMPUTE

@ AMDSMI_PROFILE_CAPABILITY_COMPUTE

compute engine

Definition: amdsmi.h:1909

amdsmi_init_flags_t

amdsmi_init_flags_t

Initialization flags.

Definition: amdsmi.h:32

AMDSMI_INIT_AMD_GPUS

@ AMDSMI_INIT_AMD_GPUS

Initialize AMD GPUS.

Definition: amdsmi.h:35

AMDSMI_INIT_ALL_PROCESSORS

@ AMDSMI_INIT_ALL_PROCESSORS

Initialize all processors.

Definition: amdsmi.h:33

AMDSMI_INIT_AMD_CPUS

@ AMDSMI_INIT_AMD_CPUS

Initialize AMD CPUS.

Definition: amdsmi.h:34

AMDSMI_INIT_NON_AMD_GPUS

@ AMDSMI_INIT_NON_AMD_GPUS

Initialize Non-AMD GPUS.

Definition: amdsmi.h:37

AMDSMI_INIT_AMD_NICS

@ AMDSMI_INIT_AMD_NICS

Initialize AMD NICS.

Definition: amdsmi.h:40

AMDSMI_INIT_NON_AMD_CPUS

@ AMDSMI_INIT_NON_AMD_CPUS

Initialize Non-AMD CPUS.

Definition: amdsmi.h:36

AMDSMI_INIT_AMD_APUS

@ AMDSMI_INIT_AMD_APUS

Definition: amdsmi.h:38

amdsmi_event_pp_t

amdsmi_event_pp_t

Event PP.

Definition: amdsmi.h:1576

amdsmi_event_vbios_t

amdsmi_event_vbios_t

Event VBios.

Definition: amdsmi.h:1646

amdsmi_event_set

void * amdsmi_event_set

Opague Handler point to underlying implementation.

Definition: amdsmi.h:1297

AMDSMI_MAX_NIC_FW

#define AMDSMI_MAX_NIC_FW

Maximum number of NIC firmwares.

Definition: amdsmi.h:2775

amdsmi_vram_type_t

amdsmi_vram_type_t

vRam Types. This enum is used to identify various VRam types.

Definition: amdsmi.h:252

AMDSMI_VRAM_TYPE_GDDR2

@ AMDSMI_VRAM_TYPE_GDDR2

Graphics Double Data Rate, Generation 2.

Definition: amdsmi.h:267

AMDSMI_VRAM_TYPE_HBM2E

@ AMDSMI_VRAM_TYPE_HBM2E

High Bandwidth Memory, Generation 2 Enhanced.

Definition: amdsmi.h:257

AMDSMI_VRAM_TYPE_GDDR6

@ AMDSMI_VRAM_TYPE_GDDR6

Graphics Double Data Rate, Generation 6.

Definition: amdsmi.h:271

AMDSMI_VRAM_TYPE_HBM

@ AMDSMI_VRAM_TYPE_HBM

High Bandwidth Memory.

Definition: amdsmi.h:255

AMDSMI_VRAM_TYPE_GDDR3

@ AMDSMI_VRAM_TYPE_GDDR3

Graphics Double Data Rate, Generation 3.

Definition: amdsmi.h:268

AMDSMI_VRAM_TYPE_GDDR1

@ AMDSMI_VRAM_TYPE_GDDR1

Graphics Double Data Rate, Generation 1.

Definition: amdsmi.h:266

AMDSMI_VRAM_TYPE_HBM3

@ AMDSMI_VRAM_TYPE_HBM3

High Bandwidth Memory, Generation 3.

Definition: amdsmi.h:258

AMDSMI_VRAM_TYPE_LPDDR5

@ AMDSMI_VRAM_TYPE_LPDDR5

Low Power Double Data Rate, Generation 5.

Definition: amdsmi.h:275

AMDSMI_VRAM_TYPE_HBM3E

@ AMDSMI_VRAM_TYPE_HBM3E

High Bandwidth Memory, Generation 3 Enhanced.

Definition: amdsmi.h:259

AMDSMI_VRAM_TYPE_GDDR5

@ AMDSMI_VRAM_TYPE_GDDR5

Graphics Double Data Rate, Generation 5.

Definition: amdsmi.h:270

AMDSMI_VRAM_TYPE_DDR3

@ AMDSMI_VRAM_TYPE_DDR3

Double Data Rate, Generation 3.

Definition: amdsmi.h:262

AMDSMI_VRAM_TYPE_GDDR4

@ AMDSMI_VRAM_TYPE_GDDR4

Graphics Double Data Rate, Generation 4.

Definition: amdsmi.h:269

AMDSMI_VRAM_TYPE_DDR2

@ AMDSMI_VRAM_TYPE_DDR2

Double Data Rate, Generation 2.

Definition: amdsmi.h:261

AMDSMI_VRAM_TYPE_GDDR7

@ AMDSMI_VRAM_TYPE_GDDR7

Graphics Double Data Rate, Generation 7.

Definition: amdsmi.h:272

AMDSMI_VRAM_TYPE_HBM2

@ AMDSMI_VRAM_TYPE_HBM2

High Bandwidth Memory, Generation 2.

Definition: amdsmi.h:256

AMDSMI_VRAM_TYPE_LPDDR4

@ AMDSMI_VRAM_TYPE_LPDDR4

Low Power Double Data Rate, Generation 4.

Definition: amdsmi.h:274

AMDSMI_VRAM_TYPE_DDR5

@ AMDSMI_VRAM_TYPE_DDR5

Double Data Rate, Generation 5.

Definition: amdsmi.h:264

AMDSMI_VRAM_TYPE_DDR4

@ AMDSMI_VRAM_TYPE_DDR4

Double Data Rate, Generation 4.

Definition: amdsmi.h:263

AMDSMI_VRAM_TYPE_UNKNOWN

@ AMDSMI_VRAM_TYPE_UNKNOWN

Unknown memory type.

Definition: amdsmi.h:253

amdsmi_event_vf_max_t

amdsmi_event_vf_max_t

Event VF.

Definition: amdsmi.h:1627

amdsmi_fabric_telemetry_category_t

amdsmi_fabric_telemetry_category_t

Fabric telemetry categories.

Definition: amdsmi.h:2643

AMDSMI_FABRIC_TELEMETRY_CATEGORY_MAX

@ AMDSMI_FABRIC_TELEMETRY_CATEGORY_MAX

Maximum number of categories.

Definition: amdsmi.h:2651

AMDSMI_FABRIC_TELEMETRY_CATEGORY_UALOE

@ AMDSMI_FABRIC_TELEMETRY_CATEGORY_UALOE

UALOE telemetry.

Definition: amdsmi.h:2644

AMDSMI_FABRIC_TELEMETRY_CATEGORY_DERIVED_UALOE

@ AMDSMI_FABRIC_TELEMETRY_CATEGORY_DERIVED_UALOE

Derived UALOE telemetry.

Definition: amdsmi.h:2649

AMDSMI_FABRIC_TELEMETRY_CATEGORY_NETPORT

@ AMDSMI_FABRIC_TELEMETRY_CATEGORY_NETPORT

Network Port telemetry.

Definition: amdsmi.h:2648

AMDSMI_FABRIC_TELEMETRY_CATEGORY_SWITCH

@ AMDSMI_FABRIC_TELEMETRY_CATEGORY_SWITCH

Switch telemetry.

Definition: amdsmi.h:2645

AMDSMI_FABRIC_TELEMETRY_CATEGORY_PFC

@ AMDSMI_FABRIC_TELEMETRY_CATEGORY_PFC

PFC telemetry.

Definition: amdsmi.h:2647

AMDSMI_FABRIC_TELEMETRY_CATEGORY_DERIVED_NETPORT

@ AMDSMI_FABRIC_TELEMETRY_CATEGORY_DERIVED_NETPORT

Derived Network Port telemetry.

Definition: amdsmi.h:2650

AMDSMI_FABRIC_TELEMETRY_CATEGORY_CRYPTO

@ AMDSMI_FABRIC_TELEMETRY_CATEGORY_CRYPTO

Crypto telemetry.

Definition: amdsmi.h:2646

AMDSMI_FABRIC_TELEMETRY_CATEGORY_INVALID

@ AMDSMI_FABRIC_TELEMETRY_CATEGORY_INVALID

Unknown telemetry.

Definition: amdsmi.h:2652

amdsmi_metric_type_t

amdsmi_metric_type_t

Metric Type.

Definition: amdsmi.h:2144

AMDSMI_METRIC_TYPE_COUNTER

@ AMDSMI_METRIC_TYPE_COUNTER

counter metric

Definition: amdsmi.h:2145

AMDSMI_METRIC_TYPE_CHIPLET

@ AMDSMI_METRIC_TYPE_CHIPLET

chiplet metric

Definition: amdsmi.h:2146

AMDSMI_METRIC_TYPE_ACC

@ AMDSMI_METRIC_TYPE_ACC

accumulated metric

Definition: amdsmi.h:2148

AMDSMI_METRIC_TYPE_INST

@ AMDSMI_METRIC_TYPE_INST

instantaneous metric

Definition: amdsmi.h:2147

AMDSMI_MAX_ACCELERATOR_PARTITIONS

#define AMDSMI_MAX_ACCELERATOR_PARTITIONS

Maximum number of accelerator partitions.

Definition: amdsmi.h:162

amdsmi_cper_notify_type_t

amdsmi_cper_notify_type_t

Cper notify.

Definition: amdsmi.h:1116

AMDSMI_CPER_NOTIFY_TYPE_DMAR

@ AMDSMI_CPER_NOTIFY_TYPE_DMAR

Direct Memory Access Remapping Error.

Definition: amdsmi.h:1124

AMDSMI_CPER_NOTIFY_TYPE_NMI

@ AMDSMI_CPER_NOTIFY_TYPE_NMI

Non_Maskable Interrupt.

Definition: amdsmi.h:1122

AMDSMI_CPER_NOTIFY_TYPE_SEI

@ AMDSMI_CPER_NOTIFY_TYPE_SEI

System Error Interface.

Definition: amdsmi.h:1126

AMDSMI_CPER_NOTIFY_TYPE_CMC

@ AMDSMI_CPER_NOTIFY_TYPE_CMC

Corrected Memory Check.

Definition: amdsmi.h:1117

AMDSMI_CPER_NOTIFY_TYPE_CPE

@ AMDSMI_CPER_NOTIFY_TYPE_CPE

Corrected Platform Error.

Definition: amdsmi.h:1118

AMDSMI_CPER_NOTIFY_TYPE_CXL_COMPONENT

@ AMDSMI_CPER_NOTIFY_TYPE_CXL_COMPONENT

Definition: amdsmi.h:1128

AMDSMI_CPER_NOTIFY_TYPE_SEA

@ AMDSMI_CPER_NOTIFY_TYPE_SEA

System Error Architecture.

Definition: amdsmi.h:1125

AMDSMI_CPER_NOTIFY_TYPE_PEI

@ AMDSMI_CPER_NOTIFY_TYPE_PEI

Platform Error Interface.

Definition: amdsmi.h:1127

AMDSMI_CPER_NOTIFY_TYPE_MCE

@ AMDSMI_CPER_NOTIFY_TYPE_MCE

Machine Check Exception.

Definition: amdsmi.h:1119

AMDSMI_CPER_NOTIFY_TYPE_BOOT

@ AMDSMI_CPER_NOTIFY_TYPE_BOOT

Boot Error.

Definition: amdsmi.h:1123

AMDSMI_CPER_NOTIFY_TYPE_PCIE

@ AMDSMI_CPER_NOTIFY_TYPE_PCIE

PCI Express Error.

Definition: amdsmi.h:1120

AMDSMI_CPER_NOTIFY_TYPE_INIT

@ AMDSMI_CPER_NOTIFY_TYPE_INIT

Initialization Error.

Definition: amdsmi.h:1121

AMDSMI_MAX_CP_PROFILE_RESOURCES

#define AMDSMI_MAX_CP_PROFILE_RESOURCES

Maximum number of compute profile resources.

Definition: amdsmi.h:161

amdsmi_fw_block_t

amdsmi_fw_block_t

The values of this enum are used to identify the various firmware blocks.

Definition: amdsmi.h:506

AMDSMI_FW_ID_ASD

@ AMDSMI_FW_ID_ASD

Asynchronous Shader Dispatcher.

Definition: amdsmi.h:580

AMDSMI_FW_ID_RS64_ME_P0_DATA

@ AMDSMI_FW_ID_RS64_ME_P0_DATA

Hardware Block RS64 - Micro Engine Partition 0 Data.

Definition: amdsmi.h:562

AMDSMI_FW_ID_RLC_RESTORE_LIST_SRM_MEM

@ AMDSMI_FW_ID_RLC_RESTORE_LIST_SRM_MEM

Rasterizier and L2 Cache Restore List System RAM Memory.

Definition: amdsmi.h:533

AMDSMI_FW_ID_SDMA7

@ AMDSMI_FW_ID_SDMA7

System Direct Memory Access 7 (high speed data transfers)

Definition: amdsmi.h:525

AMDSMI_FW_ID_PSP_BL

@ AMDSMI_FW_ID_PSP_BL

Platform Security Processor Bootloader (initial firmware)

Definition: amdsmi.h:545

AMDSMI_FW_ID_RLC

@ AMDSMI_FW_ID_RLC

Rasterizer and L2 Cache (rasterization processs)

Definition: amdsmi.h:517

AMDSMI_FW_ID_RS64_PFP

@ AMDSMI_FW_ID_RS64_PFP

Hardware Block RS64 - Pixel Front End Processor.

Definition: amdsmi.h:564

AMDSMI_FW_ID_SDMA_TH1

@ AMDSMI_FW_ID_SDMA_TH1

System Direct Memory Access - Thread Handler 1.

Definition: amdsmi.h:553

AMDSMI_FW_ID_MMSCH

@ AMDSMI_FW_ID_MMSCH

Multi-Media Shader Hardware Scheduler.

Definition: amdsmi.h:536

AMDSMI_FW_ID_RLX6

@ AMDSMI_FW_ID_RLX6

Hardware Block RLX6.

Definition: amdsmi.h:559

AMDSMI_FW_ID_PSP_SOSDRV

@ AMDSMI_FW_ID_PSP_SOSDRV

Platform Security Processor Secure Operating System Driver.

Definition: amdsmi.h:538

AMDSMI_FW_ID_TA_RAS

@ AMDSMI_FW_ID_TA_RAS

Trusted Applications - Reliablity Availability and Serviceability.

Definition: amdsmi.h:581

AMDSMI_FW_ID_PSP_KEYDB

@ AMDSMI_FW_ID_PSP_KEYDB

Platform Security Processor Table of Contents.

Definition: amdsmi.h:540

AMDSMI_FW_ID_RLC_SRLS

@ AMDSMI_FW_ID_RLC_SRLS

Rasterizier and L2 Cache - Shared Resource Local Segment.

Definition: amdsmi.h:585

AMDSMI_FW_ID_VCE

@ AMDSMI_FW_ID_VCE

Video Coding Engine (Encoding video)

Definition: amdsmi.h:528

AMDSMI_FW_ID_DMCU_ISR

@ AMDSMI_FW_ID_DMCU_ISR

Digital Micro Controller Unit - Interrupt Service Routine (interrupt handlers)

Definition: amdsmi.h:531

AMDSMI_FW_ID_SDMA6

@ AMDSMI_FW_ID_SDMA6

System Direct Memory Access 6 (high speed data transfers)

Definition: amdsmi.h:524

AMDSMI_FW_ID_PSP_DBG

@ AMDSMI_FW_ID_PSP_DBG

Platform Security Processor - Debug.

Definition: amdsmi.h:574

AMDSMI_FW_ID_CP_CE

@ AMDSMI_FW_ID_CP_CE

Compute Processor - Command_Engine (fetch, decode, dispatch)

Definition: amdsmi.h:510

AMDSMI_FW_ID_P2S_TABLE

@ AMDSMI_FW_ID_P2S_TABLE

Processor-to-System Table Firmware.

Definition: amdsmi.h:590

AMDSMI_FW_ID_DRV_CAP

@ AMDSMI_FW_ID_DRV_CAP

Driver Capabilities (capabilities, features)

Definition: amdsmi.h:543

AMDSMI_FW_ID_RS64_ME_P1_DATA

@ AMDSMI_FW_ID_RS64_ME_P1_DATA

Hardware Block RS64 - Micro Engine Partition 1 Data.

Definition: amdsmi.h:563

AMDSMI_FW_ID_MES_THREAD1

@ AMDSMI_FW_ID_MES_THREAD1

Micro Engine Scheduler - Thread 1.

Definition: amdsmi.h:557

AMDSMI_FW_ID_PM

@ AMDSMI_FW_ID_PM

Power Management Firmware.

Definition: amdsmi.h:586

AMDSMI_FW_ID_SDMA0

@ AMDSMI_FW_ID_SDMA0

System Direct Memory Access 0 (high speed data transfers)

Definition: amdsmi.h:518

AMDSMI_FW_ID_ISP

@ AMDSMI_FW_ID_ISP

Image Signal Processor (processing raw image data from sensors)

Definition: amdsmi.h:529

AMDSMI_FW_ID_PSP_SOC

@ AMDSMI_FW_ID_PSP_SOC

Platform Security Processor - System On a Chip.

Definition: amdsmi.h:573

AMDSMI_FW_ID_CP_PM4

@ AMDSMI_FW_ID_CP_PM4

Compute Processor Packet Processor 4 (processing command packets)

Definition: amdsmi.h:546

AMDSMI_FW_ID_RLC_P

@ AMDSMI_FW_ID_RLC_P

Rasterizier and L2 Cache Partition.

Definition: amdsmi.h:547

AMDSMI_FW_ID_SDMA_TH0

@ AMDSMI_FW_ID_SDMA_TH0

System Direct Memory Access - Thread Handler 0.

Definition: amdsmi.h:552

AMDSMI_FW_ID_MC

@ AMDSMI_FW_ID_MC

Memory Contoller (RAM and VRAM)

Definition: amdsmi.h:544

AMDSMI_FW_ID_VCN

@ AMDSMI_FW_ID_VCN

Video Core Next (encoding and decoding)

Definition: amdsmi.h:526

AMDSMI_FW_ID_RLX6_DRAM_BOOT_CORE1

@ AMDSMI_FW_ID_RLX6_DRAM_BOOT_CORE1

Hardware Block RLX6 Core 1 - Dynamic RAM Boot.

Definition: amdsmi.h:577

AMDSMI_FW_ID_MES_STACK

@ AMDSMI_FW_ID_MES_STACK

Micro Engine Scheduler - Stack.

Definition: amdsmi.h:556

AMDSMI_FW_ID_XGMI

@ AMDSMI_FW_ID_XGMI

XGMI (Interconnect) Firmware.

Definition: amdsmi.h:583

AMDSMI_FW_ID_PSP_TOC

@ AMDSMI_FW_ID_PSP_TOC

Platform Security Processor Table of Contents.

Definition: amdsmi.h:539

AMDSMI_FW_ID_IMU_IRAM

@ AMDSMI_FW_ID_IMU_IRAM

Input/Output Memory Management Unit - Instruction RAM.

Definition: amdsmi.h:551

AMDSMI_FW_ID_SEC_POLICY_STAGE2

@ AMDSMI_FW_ID_SEC_POLICY_STAGE2

Security Policy Stage 2 (security features)

Definition: amdsmi.h:548

AMDSMI_FW_ID_RS64_MEC_P2_DATA

@ AMDSMI_FW_ID_RS64_MEC_P2_DATA

Hardware Block RS64 - Micro Engine Controller Partition 2 Data.

Definition: amdsmi.h:570

AMDSMI_FW_ID_PLDM_BUNDLE

@ AMDSMI_FW_ID_PLDM_BUNDLE

Platform Level Data Model Firmware Bundle.

Definition: amdsmi.h:591

AMDSMI_FW_ID_TA_XGMI

@ AMDSMI_FW_ID_TA_XGMI

Trusted Applications - Reliablity XGMI.

Definition: amdsmi.h:582

AMDSMI_FW_ID_RS64_ME

@ AMDSMI_FW_ID_RS64_ME

Hardware Block RS64 - Micro Engine.

Definition: amdsmi.h:561

AMDSMI_FW_ID_SDMA3

@ AMDSMI_FW_ID_SDMA3

System Direct Memory Access 3 (high speed data transfers)

Definition: amdsmi.h:521

AMDSMI_FW_ID_SDMA1

@ AMDSMI_FW_ID_SDMA1

System Direct Memory Access 1 (high speed data transfers)

Definition: amdsmi.h:519

AMDSMI_FW_ID_CP_ME

@ AMDSMI_FW_ID_CP_ME

Compute Processor - Micro Engine (specialize processing)

Definition: amdsmi.h:512

AMDSMI_FW_ID_RS64_MEC_P3_DATA

@ AMDSMI_FW_ID_RS64_MEC_P3_DATA

Hardware Block RS64 - Micro Engine Controller Partition 3 Data.

Definition: amdsmi.h:571

AMDSMI_FW_ID_CP_MEC_JT1

@ AMDSMI_FW_ID_CP_MEC_JT1

Compute Processor - Micro Engine Controler Job Table 1 (queues, scheduling)

Definition: amdsmi.h:513

AMDSMI_FW_ID_UVD

@ AMDSMI_FW_ID_UVD

Unified Video Decoder (decode specific video formats)

Definition: amdsmi.h:527

AMDSMI_FW_ID_RLC_V

@ AMDSMI_FW_ID_RLC_V

Rasterizier and L2 Cache Virtual memory.

Definition: amdsmi.h:535

AMDSMI_FW_ID_SMC

@ AMDSMI_FW_ID_SMC

System Management Controller Firmware.

Definition: amdsmi.h:587

AMDSMI_FW_ID_SDMA4

@ AMDSMI_FW_ID_SDMA4

System Direct Memory Access 4 (high speed data transfers)

Definition: amdsmi.h:522

AMDSMI_FW_ID_MES_KIQ

@ AMDSMI_FW_ID_MES_KIQ

Micro Engine Scheduler - Kernel Indirect Queue.

Definition: amdsmi.h:555

AMDSMI_FW_ID_DMCU

@ AMDSMI_FW_ID_DMCU

Display Micro-Controller Unit.

Definition: amdsmi.h:588

AMDSMI_FW_ID_RLC_SRLG

@ AMDSMI_FW_ID_RLC_SRLG

Rasterizier and L2 Cache - Shared Resource Local Group.

Definition: amdsmi.h:584

AMDSMI_FW_ID_RS64_PFP_P1_DATA

@ AMDSMI_FW_ID_RS64_PFP_P1_DATA

Hardware Block RS64 - Pixel Front End Processor Partition 1 Data.

Definition: amdsmi.h:566

AMDSMI_FW_ID_RLX6_DRAM_BOOT

@ AMDSMI_FW_ID_RLX6_DRAM_BOOT

Hardware Block RLX6 - Dynamic Ram Boot.

Definition: amdsmi.h:560

AMDSMI_FW_ID_IMU_DRAM

@ AMDSMI_FW_ID_IMU_DRAM

Input/Output Memory Management Unit - Dynamic RAM.

Definition: amdsmi.h:550

AMDSMI_FW_ID_CP_MEC1

@ AMDSMI_FW_ID_CP_MEC1

Compute Processor - Micro Engine Controler 1 (scheduling, managing resources)

Definition: amdsmi.h:515

AMDSMI_FW_ID_RLC_RESTORE_LIST_CNTL

@ AMDSMI_FW_ID_RLC_RESTORE_LIST_CNTL

Rasterizier and L2 Cache Restore List Control.

Definition: amdsmi.h:534

AMDSMI_FW_ID_RS64_MEC_P0_DATA

@ AMDSMI_FW_ID_RS64_MEC_P0_DATA

Hardware Block RS64 - Micro Engine Controller Partition 0 Data.

Definition: amdsmi.h:568

AMDSMI_FW_ID_RLX6_CORE1

@ AMDSMI_FW_ID_RLX6_CORE1

Hardware Block RLX6 - Core 1.

Definition: amdsmi.h:576

AMDSMI_FW_ID_RS64_MEC_P1_DATA

@ AMDSMI_FW_ID_RS64_MEC_P1_DATA

Hardware Block RS64 - Micro Engine Controller Partition 1 Data.

Definition: amdsmi.h:569

AMDSMI_FW_ID_RLC_RESTORE_LIST_GPM_MEM

@ AMDSMI_FW_ID_RLC_RESTORE_LIST_GPM_MEM

Rasterizier and L2 Cache Restore List Graphics Processor Memory.

Definition: amdsmi.h:532

AMDSMI_FW_ID_PSP_INTF

@ AMDSMI_FW_ID_PSP_INTF

Platform Security Processor - Interface.

Definition: amdsmi.h:575

AMDSMI_FW_ID_CP_MEC_JT2

@ AMDSMI_FW_ID_CP_MEC_JT2

Compute Processor - Micro Engine Controler Job Table 2 (queues, scheduling)

Definition: amdsmi.h:514

AMDSMI_FW_ID_RLC_SAVE_RESTORE_LIST

@ AMDSMI_FW_ID_RLC_SAVE_RESTORE_LIST

Rasterizier and L2 Cache - Save Restore List.

Definition: amdsmi.h:579

AMDSMI_FW_ID_CP_PFP

@ AMDSMI_FW_ID_CP_PFP

Compute Processor - Pixel Front End Processor (pixelating process)

Definition: amdsmi.h:511

AMDSMI_FW_ID_PSP_RAS

@ AMDSMI_FW_ID_PSP_RAS

Platform Security Processor - Reliability, Availability, and Serviceability Firmware.

Definition: amdsmi.h:589

AMDSMI_FW_ID_MES_THREAD1_STACK

@ AMDSMI_FW_ID_MES_THREAD1_STACK

Micro Engine Scheduler - Thread 1 Stack.

Definition: amdsmi.h:558

AMDSMI_FW_ID_SMU

@ AMDSMI_FW_ID_SMU

Definition: amdsmi.h:507

AMDSMI_FW_ID_PPTABLE

@ AMDSMI_FW_ID_PPTABLE

Power Policy Table (power management policies)

Definition: amdsmi.h:572

AMDSMI_FW_ID_PSP_SPL

@ AMDSMI_FW_ID_PSP_SPL

Platform Security Processor Secure Program Loader.

Definition: amdsmi.h:542

AMDSMI_FW_ID_REG_ACCESS_WHITELIST

@ AMDSMI_FW_ID_REG_ACCESS_WHITELIST

Register Access Whitelist (Prevent unathorizied access)

Definition: amdsmi.h:549

AMDSMI_FW_ID_PSP_SYSDRV

@ AMDSMI_FW_ID_PSP_SYSDRV

Platform Security Processor System Driver.

Definition: amdsmi.h:537

AMDSMI_FW_ID_RS64_PFP_P0_DATA

@ AMDSMI_FW_ID_RS64_PFP_P0_DATA

Hardware Block RS64 - Pixel Front End Processor Partition 0 Data.

Definition: amdsmi.h:565

AMDSMI_FW_ID_SDMA5

@ AMDSMI_FW_ID_SDMA5

System Direct Memory Access 5 (high speed data transfers)

Definition: amdsmi.h:523

AMDSMI_FW_ID_SDMA2

@ AMDSMI_FW_ID_SDMA2

System Direct Memory Access 2 (high speed data transfers)

Definition: amdsmi.h:520

AMDSMI_FW_ID_CP_MES

@ AMDSMI_FW_ID_CP_MES

Compute Processor - Micro Engine Scheduler.

Definition: amdsmi.h:554

AMDSMI_FW_ID_DMCU_ERAM

@ AMDSMI_FW_ID_DMCU_ERAM

Digital Micro Controller Unit - Embedded RAM (memory used by DMU)

Definition: amdsmi.h:530

AMDSMI_FW_ID_RLCV_LX7

@ AMDSMI_FW_ID_RLCV_LX7

Hardware Block RLCV - Subsystem LX7.

Definition: amdsmi.h:578

AMDSMI_FW_ID_RS64_MEC

@ AMDSMI_FW_ID_RS64_MEC

Hardware Block RS64 - Micro Engine Controller.

Definition: amdsmi.h:567

AMDSMI_FW_ID_DFC

@ AMDSMI_FW_ID_DFC

Data Fabric Controler (bandwidth and coherency)

Definition: amdsmi.h:541

AMDSMI_FW_ID_CP_MEC2

@ AMDSMI_FW_ID_CP_MEC2

Compute Processor - Micro Engine Controler 2 (scheduling, managing resources)

Definition: amdsmi.h:516

amdsmi_driver_t

amdsmi_driver_t

Driver.

Definition: amdsmi.h:1839

AMDSMI_MAX_NIC_PORTS

#define AMDSMI_MAX_NIC_PORTS

Maximum size definitions AMDSMI NIC.

Definition: amdsmi.h:2773

AMDSMI_MAX_DATE_STRING_LENGTH

#define AMDSMI_MAX_DATE_STRING_LENGTH

Maximum size definitions for date strings.

Definition: amdsmi.h:1290

AMDSMI_MAX_TA_WHITE_LIST_ELEMENTS

#define AMDSMI_MAX_TA_WHITE_LIST_ELEMENTS

Maximum number of TA (Trusted Application) white list elements.

Definition: amdsmi.h:185

amdsmi_virtualization_mode_t

amdsmi_virtualization_mode_t

Variant placeholder.

Definition: amdsmi.h:603

AMDSMI_VIRTUALIZATION_MODE_BAREMETAL

@ AMDSMI_VIRTUALIZATION_MODE_BAREMETAL

Baremetal Virtualization Mode.

Definition: amdsmi.h:605

AMDSMI_VIRTUALIZATION_MODE_UNKNOWN

@ AMDSMI_VIRTUALIZATION_MODE_UNKNOWN

Unknown Virtualization Mode.

Definition: amdsmi.h:604

AMDSMI_VIRTUALIZATION_MODE_HOST

@ AMDSMI_VIRTUALIZATION_MODE_HOST

Host Virtualization Mode.

Definition: amdsmi.h:606

AMDSMI_VIRTUALIZATION_MODE_GUEST

@ AMDSMI_VIRTUALIZATION_MODE_GUEST

Guest Virtualization Mode.

Definition: amdsmi.h:607

AMDSMI_VIRTUALIZATION_MODE_PASSTHROUGH

@ AMDSMI_VIRTUALIZATION_MODE_PASSTHROUGH

Passthrough Virtualization Mode.

Definition: amdsmi.h:608

AMDSMI_MAX_STRING_LENGTH

#define AMDSMI_MAX_STRING_LENGTH

Maximum length for string buffers.

Definition: amdsmi.h:159

amdsmi_guest_fw_engine_id_t

amdsmi_guest_fw_engine_id_t

The values of this enum are used to identify the various firmware blocks.

Definition: amdsmi.h:1757

amdsmi_metric_unit_t

amdsmi_metric_unit_t

Metric Unit.

Definition: amdsmi.h:2121

amdsmi_link_status_t

amdsmi_link_status_t

Link Status.

Definition: amdsmi.h:636

amdsmi_ecc_correction_schema_support_t

amdsmi_ecc_correction_schema_support_t

The values of this enum are used to identify supported ecc correction schema.

Definition: amdsmi.h:1745

amdsmi_event_driver_t

amdsmi_event_driver_t

Event Driver.

Definition: amdsmi.h:1346

AMDSMI_MAX_BLACK_LIST_ELEMENTS

#define AMDSMI_MAX_BLACK_LIST_ELEMENTS

Maximum number of black list elements for device access control.

Definition: amdsmi.h:183

amdsmi_processor_type_t

amdsmi_processor_type_t

Processor types detectable by AMD SMI.

Definition: amdsmi.h:56

AMDSMI_PROCESSOR_TYPE_AMD_APU

@ AMDSMI_PROCESSOR_TYPE_AMD_APU

AMD Accelerated processor type, GPU and CPU on a single die.

Definition: amdsmi.h:63

AMDSMI_PROCESSOR_TYPE_UNKNOWN

@ AMDSMI_PROCESSOR_TYPE_UNKNOWN

Unknown processor type.

Definition: amdsmi.h:57

AMDSMI_PROCESSOR_TYPE_NON_AMD_CPU

@ AMDSMI_PROCESSOR_TYPE_NON_AMD_CPU

Non-AMD CPU processor type.

Definition: amdsmi.h:61

AMDSMI_PROCESSOR_TYPE_AMD_CPU

@ AMDSMI_PROCESSOR_TYPE_AMD_CPU

AMD CPU processor type, a physical component that holds the CPU.

Definition: amdsmi.h:59

AMDSMI_PROCESSOR_TYPE_AMD_CPU_CORE

@ AMDSMI_PROCESSOR_TYPE_AMD_CPU_CORE

AMD CPU-Core processor type, individual processing units within the CPU.

Definition: amdsmi.h:62

AMDSMI_PROCESSOR_TYPE_AMD_GPU

@ AMDSMI_PROCESSOR_TYPE_AMD_GPU

AMD Graphics processor type.

Definition: amdsmi.h:58

AMDSMI_PROCESSOR_TYPE_BRCM_NIC

@ AMDSMI_PROCESSOR_TYPE_BRCM_NIC

Broadcom Network Interface Card processor type.

Definition: amdsmi.h:65

AMDSMI_PROCESSOR_TYPE_NON_AMD_GPU

@ AMDSMI_PROCESSOR_TYPE_NON_AMD_GPU

Non-AMD Graphics processor type.

Definition: amdsmi.h:60

AMDSMI_PROCESSOR_TYPE_AMD_NIC

@ AMDSMI_PROCESSOR_TYPE_AMD_NIC

AMD Network Interface Card processor type.

Definition: amdsmi.h:64

AMDSMI_PROCESSOR_TYPE_BRCM_SWITCH

@ AMDSMI_PROCESSOR_TYPE_BRCM_SWITCH

Broadcom Switch processor type.

Definition: amdsmi.h:66

processor_type_t

amdsmi_processor_type_t processor_type_t

Backward-compatibility alias for amdsmi_processor_type_t.

Definition: amdsmi.h:78

amdsmi_memory_partition_type_t

amdsmi_memory_partition_type_t

Memory Partitions.

Definition: amdsmi.h:210

AMDSMI_MEMORY_PARTITION_NPS8

@ AMDSMI_MEMORY_PARTITION_NPS8

Definition: amdsmi.h:220

AMDSMI_MEMORY_PARTITION_NPS1

@ AMDSMI_MEMORY_PARTITION_NPS1

Definition: amdsmi.h:212

AMDSMI_MEMORY_PARTITION_NPS2

@ AMDSMI_MEMORY_PARTITION_NPS2

Definition: amdsmi.h:214

AMDSMI_MEMORY_PARTITION_NPS4

@ AMDSMI_MEMORY_PARTITION_NPS4

Definition: amdsmi.h:217

AMDSMI_MAX_NIC_RDMA_DEV

#define AMDSMI_MAX_NIC_RDMA_DEV

Maximum number of NIC RDMA devices.

Definition: amdsmi.h:2774

amdsmi_event_iov_t

amdsmi_event_iov_t

Event IOV.

Definition: amdsmi.h:1482

amdsmi_guard_state_t

amdsmi_guard_state_t

Guard State.

Definition: amdsmi.h:1853

amdsmi_sched_block_t

amdsmi_sched_block_t

Schedule Block.

Definition: amdsmi.h:1864

AMDSMI_FABRIC_PPOD_ID_SIZE

#define AMDSMI_FABRIC_PPOD_ID_SIZE

Physical PoD Identifier size in bytes (128-bit UUID)

Definition: amdsmi.h:1274

amdsmi_tdi_state_t

amdsmi_tdi_state_t

TDI state enumeration.

Definition: amdsmi.h:2235

AMDSMI_TDI_STATE_LOCKED

@ AMDSMI_TDI_STATE_LOCKED

TDI (TEE Device Interface) is locked.

Definition: amdsmi.h:2237

AMDSMI_TDI_STATE_ERROR

@ AMDSMI_TDI_STATE_ERROR

TDI (TEE Device Interface) is in an error state and cannot be used.

Definition: amdsmi.h:2239

AMDSMI_TDI_STATE_UNLOCKED

@ AMDSMI_TDI_STATE_UNLOCKED

TDI (TEE Device Interface) is unlocked;.

Definition: amdsmi.h:2236

AMDSMI_TDI_STATE_RUN

@ AMDSMI_TDI_STATE_RUN

TDI (TEE Device Interface) is actively running.

Definition: amdsmi.h:2238

amdsmi_processor_handle

void * amdsmi_processor_handle

opaque handler point to underlying implementation

Definition: amdsmi.h:48

amdsmi_event_gpu_t

amdsmi_event_gpu_t

Below are the error subcodes of each category.

Definition: amdsmi.h:1328

amdsmi_fabric_type_t

amdsmi_fabric_type_t

Fabric type.

Definition: amdsmi.h:2199

AMDSMI_FABRIC_TYPE_UALINK

@ AMDSMI_FABRIC_TYPE_UALINK

Native UALink fabric.

Definition: amdsmi.h:2201

AMDSMI_FABRIC_TYPE_UNKNOWN

@ AMDSMI_FABRIC_TYPE_UNKNOWN

Unknown fabric type.

Definition: amdsmi.h:2202

AMDSMI_FABRIC_TYPE_UALOE

@ AMDSMI_FABRIC_TYPE_UALOE

UALink-over-Ethernet fabric.

Definition: amdsmi.h:2200

amdsmi_cache_property_type_t

amdsmi_cache_property_type_t

cache properties

Definition: amdsmi.h:461

AMDSMI_CACHE_PROPERTY_ENABLED

@ AMDSMI_CACHE_PROPERTY_ENABLED

Cache enabled.

Definition: amdsmi.h:462

AMDSMI_CACHE_PROPERTY_INST_CACHE

@ AMDSMI_CACHE_PROPERTY_INST_CACHE

Instruction cache.

Definition: amdsmi.h:464

AMDSMI_CACHE_PROPERTY_DATA_CACHE

@ AMDSMI_CACHE_PROPERTY_DATA_CACHE

Data cache.

Definition: amdsmi.h:463

AMDSMI_CACHE_PROPERTY_SIMD_CACHE

@ AMDSMI_CACHE_PROPERTY_SIMD_CACHE

Single Instruction, Multiple Data Cache.

Definition: amdsmi.h:466

AMDSMI_CACHE_PROPERTY_CPU_CACHE

@ AMDSMI_CACHE_PROPERTY_CPU_CACHE

CPU cache.

Definition: amdsmi.h:465

amdsmi_event_mmsch_t

amdsmi_event_mmsch_t

Event MM Schedule.

Definition: amdsmi.h:1708

AMDSMI_MAX_DEVICES

#define AMDSMI_MAX_DEVICES

Maximum number of devices supported.

Definition: amdsmi.h:158

amdsmi_status_t

amdsmi_status_t

Error codes returned by amdsmi functions.

Definition: amdsmi.h:88

AMDSMI_STATUS_NOT_INIT

@ AMDSMI_STATUS_NOT_INIT

Processor not initialized.

Definition: amdsmi.h:115

AMDSMI_STATUS_NON_AMD_CPU

@ AMDSMI_STATUS_NON_AMD_CPU

System has different cpu than AMD.

Definition: amdsmi.h:125

AMDSMI_STATUS_DIRECTORY_NOT_FOUND

@ AMDSMI_STATUS_DIRECTORY_NOT_FOUND

Error when a directory is not found, maps to ENOTDIR.

Definition: amdsmi.h:110

AMDSMI_STATUS_INVAL

@ AMDSMI_STATUS_INVAL

Invalid parameters.

Definition: amdsmi.h:91

AMDSMI_STATUS_BUSY

@ AMDSMI_STATUS_BUSY

Processor busy.

Definition: amdsmi.h:113

AMDSMI_STATUS_UNKNOWN_ERROR

@ AMDSMI_STATUS_UNKNOWN_ERROR

An unknown error occurred.

Definition: amdsmi.h:140

AMDSMI_STATUS_DRIVER_NOT_LOADED

@ AMDSMI_STATUS_DRIVER_NOT_LOADED

Processor driver not loaded.

Definition: amdsmi.h:117

AMDSMI_STATUS_FILE_ERROR

@ AMDSMI_STATUS_FILE_ERROR

Problem accessing a file.

Definition: amdsmi.h:104

AMDSMI_STATUS_DRM_ERROR

@ AMDSMI_STATUS_DRM_ERROR

Error when call libdrm.

Definition: amdsmi.h:96

AMDSMI_STATUS_CORRUPTED_EEPROM

@ AMDSMI_STATUS_CORRUPTED_EEPROM

EEPROM is corrupted.

Definition: amdsmi.h:137

AMDSMI_STATUS_ARG_PTR_NULL

@ AMDSMI_STATUS_ARG_PTR_NULL

Parsed argument is invalid.

Definition: amdsmi.h:134

AMDSMI_STATUS_IO

@ AMDSMI_STATUS_IO

I/O Error.

Definition: amdsmi.h:102

AMDSMI_STATUS_NO_HSMP_DRV

@ AMDSMI_STATUS_NO_HSMP_DRV

HSMP driver not found.

Definition: amdsmi.h:128

AMDSMI_STATUS_HSMP_TIMEOUT

@ AMDSMI_STATUS_HSMP_TIMEOUT

HSMP message timed out.

Definition: amdsmi.h:131

AMDSMI_STATUS_NO_DATA

@ AMDSMI_STATUS_NO_DATA

No data was found for a given input.

Definition: amdsmi.h:120

AMDSMI_STATUS_RETRY

@ AMDSMI_STATUS_RETRY

Retry operation.

Definition: amdsmi.h:99

AMDSMI_STATUS_UNEXPECTED_SIZE

@ AMDSMI_STATUS_UNEXPECTED_SIZE

An unexpected amount of data was read.

Definition: amdsmi.h:122

AMDSMI_STATUS_SETTING_UNAVAILABLE

@ AMDSMI_STATUS_SETTING_UNAVAILABLE

Setting is not available.

Definition: amdsmi.h:136

AMDSMI_STATUS_FILE_NOT_FOUND

@ AMDSMI_STATUS_FILE_NOT_FOUND

file or directory not found

Definition: amdsmi.h:133

AMDSMI_STATUS_INTERNAL_EXCEPTION

@ AMDSMI_STATUS_INTERNAL_EXCEPTION

An internal exception was caught.

Definition: amdsmi.h:106

AMDSMI_STATUS_NO_HSMP_SUP

@ AMDSMI_STATUS_NO_HSMP_SUP

HSMP not supported.

Definition: amdsmi.h:129

AMDSMI_STATUS_MAP_ERROR

@ AMDSMI_STATUS_MAP_ERROR

Library error did not map to a status code.

Definition: amdsmi.h:139

AMDSMI_STATUS_FAIL_LOAD_SYMBOL

@ AMDSMI_STATUS_FAIL_LOAD_SYMBOL

Fail to load symbol.

Definition: amdsmi.h:95

AMDSMI_STATUS_INSUFFICIENT_SIZE

@ AMDSMI_STATUS_INSUFFICIENT_SIZE

Not enough resources were available for the operation.

Definition: amdsmi.h:121

AMDSMI_STATUS_INIT_ERROR

@ AMDSMI_STATUS_INIT_ERROR

An error occurred when initializing internal data structures.

Definition: amdsmi.h:108

AMDSMI_STATUS_OUT_OF_RESOURCES

@ AMDSMI_STATUS_OUT_OF_RESOURCES

Not enough memory.

Definition: amdsmi.h:105

AMDSMI_STATUS_NO_SLOT

@ AMDSMI_STATUS_NO_SLOT

No more free slot.

Definition: amdsmi.h:116

AMDSMI_STATUS_NO_MSR_DRV

@ AMDSMI_STATUS_NO_MSR_DRV

MSR driver not found.

Definition: amdsmi.h:127

AMDSMI_STATUS_INTERRUPT

@ AMDSMI_STATUS_INTERRUPT

An interrupt occurred during execution of function.

Definition: amdsmi.h:101

AMDSMI_STATUS_SUCCESS

@ AMDSMI_STATUS_SUCCESS

Call succeeded.

Definition: amdsmi.h:89

AMDSMI_STATUS_NO_ENERGY_DRV

@ AMDSMI_STATUS_NO_ENERGY_DRV

Energy driver not found.

Definition: amdsmi.h:126

AMDSMI_STATUS_ADDRESS_FAULT

@ AMDSMI_STATUS_ADDRESS_FAULT

Bad address.

Definition: amdsmi.h:103

AMDSMI_STATUS_MORE_DATA

@ AMDSMI_STATUS_MORE_DATA

There is more data than the buffer size the user passed.

Definition: amdsmi.h:119

AMDSMI_STATUS_NOT_YET_IMPLEMENTED

@ AMDSMI_STATUS_NOT_YET_IMPLEMENTED

Not implemented yet.

Definition: amdsmi.h:93

AMDSMI_STATUS_NO_DRV

@ AMDSMI_STATUS_NO_DRV

No Energy and HSMP driver present.

Definition: amdsmi.h:132

AMDSMI_STATUS_IPC_ERROR

@ AMDSMI_STATUS_IPC_ERROR

IPC communication error occurred.

Definition: amdsmi.h:111

AMDSMI_STATUS_NO_PERM

@ AMDSMI_STATUS_NO_PERM

Permission Denied.

Definition: amdsmi.h:100

AMDSMI_STATUS_NOT_FOUND

@ AMDSMI_STATUS_NOT_FOUND

Processor Not found.

Definition: amdsmi.h:114

AMDSMI_STATUS_FAIL_LOAD_MODULE

@ AMDSMI_STATUS_FAIL_LOAD_MODULE

Fail to load lib.

Definition: amdsmi.h:94

AMDSMI_STATUS_AMDGPU_RESTART_ERR

@ AMDSMI_STATUS_AMDGPU_RESTART_ERR

AMDGPU restart failed.

Definition: amdsmi.h:135

AMDSMI_STATUS_NOT_SUPPORTED

@ AMDSMI_STATUS_NOT_SUPPORTED

Command not supported.

Definition: amdsmi.h:92

AMDSMI_STATUS_UNEXPECTED_DATA

@ AMDSMI_STATUS_UNEXPECTED_DATA

The data read or provided to function is not what was expected.

Definition: amdsmi.h:123

AMDSMI_STATUS_API_FAILED

@ AMDSMI_STATUS_API_FAILED

API call failed.

Definition: amdsmi.h:97

AMDSMI_STATUS_TIMEOUT

@ AMDSMI_STATUS_TIMEOUT

Timeout in API call.

Definition: amdsmi.h:98

AMDSMI_STATUS_NO_HSMP_MSG_SUP

@ AMDSMI_STATUS_NO_HSMP_MSG_SUP

HSMP message/feature not supported.

Definition: amdsmi.h:130

AMDSMI_STATUS_INPUT_OUT_OF_BOUNDS

@ AMDSMI_STATUS_INPUT_OUT_OF_BOUNDS

The provided input is out of allowable or safe range.

Definition: amdsmi.h:107

AMDSMI_STATUS_REFCOUNT_OVERFLOW

@ AMDSMI_STATUS_REFCOUNT_OVERFLOW

An internal reference counter exceeded INT32_MAX.

Definition: amdsmi.h:109

AMDSMI_MAX_NUM_PM_POLICIES

#define AMDSMI_MAX_NUM_PM_POLICIES

Maximum number of power management policies.

Definition: amdsmi.h:149

amdsmi_guest_fw_load_status_t

amdsmi_guest_fw_load_status_t

Guest firmware load status.

Definition: amdsmi.h:1878

amdsmi_xgmi_fb_sharing_mode_t

amdsmi_xgmi_fb_sharing_mode_t

XGMI FB Sharing Mode.

Definition: amdsmi.h:1891

amdsmi_ptl_data_format_t

amdsmi_ptl_data_format_t

PTL (Peak Tops Limiter) data format types These correspond to the hardware data types used in matrix ...

Definition: amdsmi.h:651

AMDSMI_PTL_DATA_FORMAT_INVALID

@ AMDSMI_PTL_DATA_FORMAT_INVALID

Invalid format.

Definition: amdsmi.h:659

AMDSMI_PTL_DATA_FORMAT_I8

@ AMDSMI_PTL_DATA_FORMAT_I8

Integer 8-bit format.

Definition: amdsmi.h:652

AMDSMI_PTL_DATA_FORMAT_F64

@ AMDSMI_PTL_DATA_FORMAT_F64

Float 64-bit format.

Definition: amdsmi.h:656

AMDSMI_PTL_DATA_FORMAT_F8

@ AMDSMI_PTL_DATA_FORMAT_F8

Float 8-bit format.

Definition: amdsmi.h:657

AMDSMI_PTL_DATA_FORMAT_BF16

@ AMDSMI_PTL_DATA_FORMAT_BF16

Brain Float 16-bit format.

Definition: amdsmi.h:654

AMDSMI_PTL_DATA_FORMAT_F32

@ AMDSMI_PTL_DATA_FORMAT_F32

Float 32-bit format.

Definition: amdsmi.h:655

AMDSMI_PTL_DATA_FORMAT_F16

@ AMDSMI_PTL_DATA_FORMAT_F16

Float 16-bit format.

Definition: amdsmi.h:653

AMDSMI_PTL_DATA_FORMAT_VECTOR

@ AMDSMI_PTL_DATA_FORMAT_VECTOR

Vector format.

Definition: amdsmi.h:658

amdsmi_affinity_scope_t

amdsmi_affinity_scope_t

Scope for Numa affinity or Socket affinity.

Definition: amdsmi.h:616

AMDSMI_AFFINITY_SCOPE_NODE

@ AMDSMI_AFFINITY_SCOPE_NODE

Memory affinity as numa node.

Definition: amdsmi.h:617

AMDSMI_AFFINITY_SCOPE_SOCKET

@ AMDSMI_AFFINITY_SCOPE_SOCKET

socket affinity

Definition: amdsmi.h:618

amdsmi_fabric_accelerator_vpod_state_t

amdsmi_fabric_accelerator_vpod_state_t

Fabric accelerator vPoD state.

Definition: amdsmi.h:2221

AMDSMI_FABRIC_ACCELERATOR_VPOD_STATE_ERROR

@ AMDSMI_FABRIC_ACCELERATOR_VPOD_STATE_ERROR

Accelerator is in an error state and cannot serve the vPoD.

Definition: amdsmi.h:2226

AMDSMI_FABRIC_ACCELERATOR_VPOD_STATE_ACTIVE

@ AMDSMI_FABRIC_ACCELERATOR_VPOD_STATE_ACTIVE

Accelerator is live and participating in the vPoD.

Definition: amdsmi.h:2225

AMDSMI_FABRIC_ACCELERATOR_VPOD_STATE_UNCONFIGURED

@ AMDSMI_FABRIC_ACCELERATOR_VPOD_STATE_UNCONFIGURED

Accelerator is not yet assigned to a vPoD.

Definition: amdsmi.h:2222

AMDSMI_FABRIC_ACCELERATOR_VPOD_STATE_UNKNOWN

@ AMDSMI_FABRIC_ACCELERATOR_VPOD_STATE_UNKNOWN

Unknown accelerator vPoD state.

Definition: amdsmi.h:2227

AMDSMI_FABRIC_ACCELERATOR_VPOD_STATE_READY

@ AMDSMI_FABRIC_ACCELERATOR_VPOD_STATE_READY

Accelerator is configured and ready, awaiting activation.

Definition: amdsmi.h:2224

AMDSMI_FABRIC_ACCELERATOR_VPOD_STATE_CONFIGURED

@ AMDSMI_FABRIC_ACCELERATOR_VPOD_STATE_CONFIGURED

Accelerator has been assigned to a vPoD but is not yet ready for traffic.

Definition: amdsmi.h:2223

amdsmi_temperature_metric_t

amdsmi_temperature_metric_t

Temperature Metrics. This enum is used to identify various temperature metrics. Corresponding values ...

Definition: amdsmi.h:398

AMDSMI_TEMP_CRITICAL_HYST

@ AMDSMI_TEMP_CRITICAL_HYST

Definition: amdsmi.h:409

AMDSMI_TEMP_CRITICAL

@ AMDSMI_TEMP_CRITICAL

Definition: amdsmi.h:407

AMDSMI_TEMP_OFFSET

@ AMDSMI_TEMP_OFFSET

Definition: amdsmi.h:421

AMDSMI_TEMP_EMERGENCY

@ AMDSMI_TEMP_EMERGENCY

Definition: amdsmi.h:411

AMDSMI_TEMP_LOWEST

@ AMDSMI_TEMP_LOWEST

Historical min temperature.

Definition: amdsmi.h:423

AMDSMI_TEMP_CRIT_MIN

@ AMDSMI_TEMP_CRIT_MIN

Definition: amdsmi.h:417

AMDSMI_TEMP_SHUTDOWN

@ AMDSMI_TEMP_SHUTDOWN

Shutdown temperature.

Definition: amdsmi.h:425

AMDSMI_TEMP_EMERGENCY_HYST

@ AMDSMI_TEMP_EMERGENCY_HYST

Definition: amdsmi.h:415

AMDSMI_TEMP_CURRENT

@ AMDSMI_TEMP_CURRENT

Current temperature.

Definition: amdsmi.h:399

AMDSMI_TEMP_MIN

@ AMDSMI_TEMP_MIN

Min temperature.

Definition: amdsmi.h:402

AMDSMI_TEMP_HIGHEST

@ AMDSMI_TEMP_HIGHEST

Historical max temperature.

Definition: amdsmi.h:424

AMDSMI_TEMP_CRIT_MIN_HYST

@ AMDSMI_TEMP_CRIT_MIN_HYST

Definition: amdsmi.h:419

AMDSMI_TEMP_MIN_HYST

@ AMDSMI_TEMP_MIN_HYST

Definition: amdsmi.h:405

AMDSMI_TEMP_MAX_HYST

@ AMDSMI_TEMP_MAX_HYST

Definition: amdsmi.h:403

AMDSMI_TEMP_MAX

@ AMDSMI_TEMP_MAX

Max temperature.

Definition: amdsmi.h:401

amdsmi_event_category_t

amdsmi_event_category_t

Event Category.

Definition: amdsmi.h:1304

amdsmi_cper_sev_t

amdsmi_cper_sev_t

Cper sev.

Definition: amdsmi.h:1103

AMDSMI_CPER_SEV_NUM

@ AMDSMI_CPER_SEV_NUM

CPER severity Number.

Definition: amdsmi.h:1107

AMDSMI_CPER_SEV_NON_FATAL_CORRECTED

@ AMDSMI_CPER_SEV_NON_FATAL_CORRECTED

CPER Non-Fatal Corrected severity.

Definition: amdsmi.h:1106

AMDSMI_CPER_SEV_NON_FATAL_UNCORRECTED

@ AMDSMI_CPER_SEV_NON_FATAL_UNCORRECTED

CPER Non-Fatal Uncorrected severity.

Definition: amdsmi.h:1104

AMDSMI_CPER_SEV_FATAL

@ AMDSMI_CPER_SEV_FATAL

CPER Fatal severity.

Definition: amdsmi.h:1105

AMDSMI_CPER_SEV_UNUSED

@ AMDSMI_CPER_SEV_UNUSED

CPER Unused severity.

Definition: amdsmi.h:1108

amdsmi_gpu_block_t

amdsmi_gpu_block_t

This enum is used to identify different GPU blocks.

Definition: amdsmi.h:474

AMDSMI_GPU_BLOCK_XGMI_WAFL

@ AMDSMI_GPU_BLOCK_XGMI_WAFL

XGMI block.

Definition: amdsmi.h:484

AMDSMI_GPU_BLOCK_GFX

@ AMDSMI_GPU_BLOCK_GFX

GFX block.

Definition: amdsmi.h:479

AMDSMI_GPU_BLOCK_IH

@ AMDSMI_GPU_BLOCK_IH

IH block.

Definition: amdsmi.h:494

AMDSMI_GPU_BLOCK_VCN

@ AMDSMI_GPU_BLOCK_VCN

VCN block.

Definition: amdsmi.h:492

AMDSMI_GPU_BLOCK_INVALID

@ AMDSMI_GPU_BLOCK_INVALID

Invalid block.

Definition: amdsmi.h:475

AMDSMI_GPU_BLOCK_MP0

@ AMDSMI_GPU_BLOCK_MP0

MP0 block.

Definition: amdsmi.h:488

AMDSMI_GPU_BLOCK_HDP

@ AMDSMI_GPU_BLOCK_HDP

HDP block.

Definition: amdsmi.h:483

AMDSMI_GPU_BLOCK_MPIO

@ AMDSMI_GPU_BLOCK_MPIO

MPIO block.

Definition: amdsmi.h:495

AMDSMI_GPU_BLOCK_ATHUB

@ AMDSMI_GPU_BLOCK_ATHUB

ATHUB block.

Definition: amdsmi.h:481

AMDSMI_GPU_BLOCK_MP1

@ AMDSMI_GPU_BLOCK_MP1

MP1 block.

Definition: amdsmi.h:489

AMDSMI_GPU_BLOCK_PCIE_BIF

@ AMDSMI_GPU_BLOCK_PCIE_BIF

PCIE_BIF block.

Definition: amdsmi.h:482

AMDSMI_GPU_BLOCK_SDMA

@ AMDSMI_GPU_BLOCK_SDMA

SDMA block.

Definition: amdsmi.h:478

AMDSMI_GPU_BLOCK_JPEG

@ AMDSMI_GPU_BLOCK_JPEG

JPEG block.

Definition: amdsmi.h:493

AMDSMI_GPU_BLOCK_UMC

@ AMDSMI_GPU_BLOCK_UMC

UMC block.

Definition: amdsmi.h:477

AMDSMI_GPU_BLOCK_FUSE

@ AMDSMI_GPU_BLOCK_FUSE

Fuse block.

Definition: amdsmi.h:490

AMDSMI_GPU_BLOCK_DF

@ AMDSMI_GPU_BLOCK_DF

DF block.

Definition: amdsmi.h:485

AMDSMI_GPU_BLOCK_MMHUB

@ AMDSMI_GPU_BLOCK_MMHUB

MMHUB block.

Definition: amdsmi.h:480

AMDSMI_GPU_BLOCK_SMN

@ AMDSMI_GPU_BLOCK_SMN

SMN block.

Definition: amdsmi.h:486

AMDSMI_GPU_BLOCK_SEM

@ AMDSMI_GPU_BLOCK_SEM

SEM block.

Definition: amdsmi.h:487

AMDSMI_GPU_BLOCK_MCA

@ AMDSMI_GPU_BLOCK_MCA

MCA block.

Definition: amdsmi.h:491

amdsmi_metric_name_t

amdsmi_metric_name_t

Metric Name.

Definition: amdsmi.h:1943

amdsmi_vf_sched_state_t

amdsmi_vf_sched_state_t

VF Schedule State.

Definition: amdsmi.h:1809

amdsmi_fabric_npa_address_mode_t

amdsmi_fabric_npa_address_mode_t

Fabric NPA address mode.

Definition: amdsmi.h:2210

AMDSMI_FABRIC_NPA_ADDRESS_MODE_SOURCE_IDENTIFICATION

@ AMDSMI_FABRIC_NPA_ADDRESS_MODE_SOURCE_IDENTIFICATION

NPA uses source identification: original source IDs are preserved.

Definition: amdsmi.h:2212

AMDSMI_FABRIC_NPA_ADDRESS_MODE_UNKNOWN

@ AMDSMI_FABRIC_NPA_ADDRESS_MODE_UNKNOWN

Unknown address mode.

Definition: amdsmi.h:2213

AMDSMI_FABRIC_NPA_ADDRESS_MODE_SOURCE_ALIASING

@ AMDSMI_FABRIC_NPA_ADDRESS_MODE_SOURCE_ALIASING

NPA uses source aliasing: source IDs are remapped/aliased per vPoD.

Definition: amdsmi.h:2211

amdsmi_event_sched_t

amdsmi_event_sched_t

Event Schedule.

Definition: amdsmi.h:1589

amdsmi_nic_fw_version_type_t

amdsmi_nic_fw_version_type_t

NIC firmware version types.

Definition: amdsmi.h:2782

AMDSMI_NIC_FW_VERSION_TYPE_RUNNING

@ AMDSMI_NIC_FW_VERSION_TYPE_RUNNING

Currently running firmware version.

Definition: amdsmi.h:2784

AMDSMI_NIC_FW_VERSION_TYPE_FIXED

@ AMDSMI_NIC_FW_VERSION_TYPE_FIXED

Fixed (hardware) firmware version.

Definition: amdsmi.h:2783

AMDSMI_NIC_FW_VERSION_TYPE_STORED

@ AMDSMI_NIC_FW_VERSION_TYPE_STORED

Stored (pending) firmware version.

Definition: amdsmi.h:2785

amdsmi_driver_model_type_t

amdsmi_driver_model_type_t

The values of this enum are used to identify driver model type.

Definition: amdsmi.h:2184

amdsmi_temperature_type_t

amdsmi_temperature_type_t

This enumeration is used to indicate from which part of the processor a temperature reading should be...

Definition: amdsmi.h:322

AMDSMI_TEMPERATURE_TYPE_GPUBOARD_NODE_OAM_X_04_HBM_D_VR

@ AMDSMI_TEMPERATURE_TYPE_GPUBOARD_NODE_OAM_X_04_HBM_D_VR

OAM X 0.4V HBM D voltage regulator temperature.

Definition: amdsmi.h:342

AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDCR_VDD3

@ AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDCR_VDD3

VDDCR VDD3 voltage regulator temperature.

Definition: amdsmi.h:351

AMDSMI_TEMPERATURE_TYPE_BASEBOARD_OAM_0_1_HSC

@ AMDSMI_TEMPERATURE_TYPE_BASEBOARD_OAM_0_1_HSC

OAM 0-1 HSC temperature.

Definition: amdsmi.h:372

AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDCR_SOC_A

@ AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDCR_SOC_A

VDDCR SOC A voltage regulator temperature.

Definition: amdsmi.h:352

AMDSMI_TEMPERATURE_TYPE_BASEBOARD_OAM_6_7_HSC

@ AMDSMI_TEMPERATURE_TYPE_BASEBOARD_OAM_6_7_HSC

OAM 6-7 HSC temperature.

Definition: amdsmi.h:375

AMDSMI_TEMPERATURE_TYPE_HBM_2

@ AMDSMI_TEMPERATURE_TYPE_HBM_2

High Bandwidth 2 temperature per stack.

Definition: amdsmi.h:330

AMDSMI_TEMPERATURE_TYPE_GPUBOARD_NODE_OAM_X_IBC_2

@ AMDSMI_TEMPERATURE_TYPE_GPUBOARD_NODE_OAM_X_IBC_2

OAM X IBC 2 temperature.

Definition: amdsmi.h:339

AMDSMI_TEMPERATURE_TYPE_BASEBOARD_RETIMER_4_5_0V9_VR

@ AMDSMI_TEMPERATURE_TYPE_BASEBOARD_RETIMER_4_5_0V9_VR

Retimer 4-5 0.9V voltage regulator temperature.

Definition: amdsmi.h:381

AMDSMI_TEMPERATURE_TYPE_HOTSPOT

@ AMDSMI_TEMPERATURE_TYPE_HOTSPOT

Hottest temperature reported for entire die.

Definition: amdsmi.h:325

AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDD_085_HBM

@ AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDD_085_HBM

VDD 0.85V HBM voltage regulator temperature.

Definition: amdsmi.h:356

AMDSMI_TEMPERATURE_TYPE_HBM_0

@ AMDSMI_TEMPERATURE_TYPE_HBM_0

High Bandwidth 0 temperature per stack.

Definition: amdsmi.h:328

AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDCR_VDD2

@ AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDCR_VDD2

VDDCR VDD2 voltage regulator temperature.

Definition: amdsmi.h:350

AMDSMI_TEMPERATURE_TYPE_BASEBOARD_UBB_IBC

@ AMDSMI_TEMPERATURE_TYPE_BASEBOARD_UBB_IBC

UBB IBC temperature.

Definition: amdsmi.h:369

AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDCR_11_HBM_D

@ AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDCR_11_HBM_D

VDDCR 1.1V HBM D voltage regulator temperature.

Definition: amdsmi.h:358

AMDSMI_TEMPERATURE_TYPE_JUNCTION

@ AMDSMI_TEMPERATURE_TYPE_JUNCTION

Synonymous with HOTSPOT.

Definition: amdsmi.h:326

AMDSMI_TEMPERATURE_TYPE_BASEBOARD_RETIMER_4_5_6_7_1V2_VR

@ AMDSMI_TEMPERATURE_TYPE_BASEBOARD_RETIMER_4_5_6_7_1V2_VR

Retimer 4-5-6-7 1.2V voltage regulator temperature.

Definition: amdsmi.h:379

AMDSMI_TEMPERATURE_TYPE_HBM_3

@ AMDSMI_TEMPERATURE_TYPE_HBM_3

High Bandwidth 3 temperature per stack.

Definition: amdsmi.h:331

AMDSMI_TEMPERATURE_TYPE_VRAM

@ AMDSMI_TEMPERATURE_TYPE_VRAM

VRAM temperature on graphics card.

Definition: amdsmi.h:327

AMDSMI_TEMPERATURE_TYPE_BASEBOARD_OAM_2_3_HSC

@ AMDSMI_TEMPERATURE_TYPE_BASEBOARD_OAM_2_3_HSC

OAM 2-3 HSC temperature.

Definition: amdsmi.h:373

AMDSMI_TEMPERATURE_TYPE_EDGE

@ AMDSMI_TEMPERATURE_TYPE_EDGE

Edge temperature.

Definition: amdsmi.h:323

AMDSMI_TEMPERATURE_TYPE_BASEBOARD_UBB_UFPGA

@ AMDSMI_TEMPERATURE_TYPE_BASEBOARD_UBB_UFPGA

UBB UFPGA temperature.

Definition: amdsmi.h:370

AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDD_USR

@ AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDD_USR

VDD USR voltage regulator temperature.

Definition: amdsmi.h:359

AMDSMI_TEMPERATURE_TYPE_GPUBOARD_NODE_OAM_X_04_HBM_B_VR

@ AMDSMI_TEMPERATURE_TYPE_GPUBOARD_NODE_OAM_X_04_HBM_B_VR

OAM X 0.4V HBM B voltage regulator temperature.

Definition: amdsmi.h:341

AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDCR_SOC_C

@ AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDCR_SOC_C

VDDCR SOC C voltage regulator temperature.

Definition: amdsmi.h:353

AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDCR_SOCIO_A

@ AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDCR_SOCIO_A

VDDCR SOCIO A voltage regulator temperature.

Definition: amdsmi.h:354

AMDSMI_TEMPERATURE_TYPE_BASEBOARD_IBC_HSC

@ AMDSMI_TEMPERATURE_TYPE_BASEBOARD_IBC_HSC

IBC HSC temperature.

Definition: amdsmi.h:386

AMDSMI_TEMPERATURE_TYPE_BASEBOARD_OAM_4_5_HSC

@ AMDSMI_TEMPERATURE_TYPE_BASEBOARD_OAM_4_5_HSC

OAM 4-5 HSC temperature.

Definition: amdsmi.h:374

AMDSMI_TEMPERATURE_TYPE_BASEBOARD_RETIMER_2_3_0V9_VR

@ AMDSMI_TEMPERATURE_TYPE_BASEBOARD_RETIMER_2_3_0V9_VR

Retimer 2-3 0.9V voltage regulator temperature.

Definition: amdsmi.h:382

AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDCR_VDD1

@ AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDCR_VDD1

VDDCR VDD1 voltage regulator temperature.

Definition: amdsmi.h:349

AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDCR_SOCIO_C

@ AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDCR_SOCIO_C

VDDCR SOCIO C voltage regulator temperature.

Definition: amdsmi.h:355

AMDSMI_TEMPERATURE_TYPE_BASEBOARD_RETIMER_0_1_0V9_VR

@ AMDSMI_TEMPERATURE_TYPE_BASEBOARD_RETIMER_0_1_0V9_VR

Retimer 0-1 0.9V voltage regulator temperature.

Definition: amdsmi.h:380

AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDCR_VDD0

@ AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDCR_VDD0

VDDCR VDD0 voltage regulator temperature.

Definition: amdsmi.h:347

AMDSMI_TEMPERATURE_TYPE_BASEBOARD_UBB_FPGA_0V72_VR

@ AMDSMI_TEMPERATURE_TYPE_BASEBOARD_UBB_FPGA_0V72_VR

UBB FPGA 0.72V voltage regulator temperature.

Definition: amdsmi.h:376

AMDSMI_TEMPERATURE_TYPE_BASEBOARD_UBB_FPGA_3V3_VR

@ AMDSMI_TEMPERATURE_TYPE_BASEBOARD_UBB_FPGA_3V3_VR

UBB FPGA 3.3V voltage regulator temperature.

Definition: amdsmi.h:377

AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDIO_11_E32

@ AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDIO_11_E32

VDDIO 1.1V E32 voltage regulator temperature.

Definition: amdsmi.h:360

AMDSMI_TEMPERATURE_TYPE_PLX

@ AMDSMI_TEMPERATURE_TYPE_PLX

PCIe switch temperature.

Definition: amdsmi.h:332

AMDSMI_TEMPERATURE_TYPE_HBM_1

@ AMDSMI_TEMPERATURE_TYPE_HBM_1

High Bandwidth 1 temperature per stack.

Definition: amdsmi.h:329

AMDSMI_TEMPERATURE_TYPE_BASEBOARD_UBB_OAM7

@ AMDSMI_TEMPERATURE_TYPE_BASEBOARD_UBB_OAM7

UBB OAM7 temperature.

Definition: amdsmi.h:368

AMDSMI_TEMPERATURE_TYPE_BASEBOARD_OAM_0_1_2_3_3V3_VR

@ AMDSMI_TEMPERATURE_TYPE_BASEBOARD_OAM_0_1_2_3_3V3_VR

OAM 0-1-2-3 3.3V voltage regulator temperature.

Definition: amdsmi.h:384

AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDCR_11_HBM_B

@ AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDCR_11_HBM_B

VDDCR 1.1V HBM B voltage regulator temperature.

Definition: amdsmi.h:357

AMDSMI_TEMPERATURE_TYPE_BASEBOARD_UBB_BACK

@ AMDSMI_TEMPERATURE_TYPE_BASEBOARD_UBB_BACK

UBB back temperature.

Definition: amdsmi.h:367

AMDSMI_TEMPERATURE_TYPE_BASEBOARD_UBB_FPGA

@ AMDSMI_TEMPERATURE_TYPE_BASEBOARD_UBB_FPGA

UBB FPGA temperature.

Definition: amdsmi.h:365

AMDSMI_TEMPERATURE_TYPE_GPUBOARD_NODE_RETIMER_X

@ AMDSMI_TEMPERATURE_TYPE_GPUBOARD_NODE_RETIMER_X

Retimer X temperature.

Definition: amdsmi.h:336

AMDSMI_TEMPERATURE_TYPE_BASEBOARD_IBC

@ AMDSMI_TEMPERATURE_TYPE_BASEBOARD_IBC

IBC temperature.

Definition: amdsmi.h:387

AMDSMI_TEMPERATURE_TYPE_GPUBOARD_NODE_OAM_X_VDD18_VR

@ AMDSMI_TEMPERATURE_TYPE_GPUBOARD_NODE_OAM_X_VDD18_VR

OAM X VDD 1.8V voltage regulator temperature.

Definition: amdsmi.h:340

AMDSMI_TEMPERATURE_TYPE_GPUBOARD_NODE_OAM_X_IBC

@ AMDSMI_TEMPERATURE_TYPE_GPUBOARD_NODE_OAM_X_IBC

OAM X IBC temperature.

Definition: amdsmi.h:338

AMDSMI_TEMPERATURE_TYPE_BASEBOARD_RETIMER_0_1_2_3_1V2_VR

@ AMDSMI_TEMPERATURE_TYPE_BASEBOARD_RETIMER_0_1_2_3_1V2_VR

Retimer 0-1-2-3 1.2V voltage regulator temperature.

Definition: amdsmi.h:378

AMDSMI_TEMPERATURE_TYPE_BASEBOARD_UBB_FRONT

@ AMDSMI_TEMPERATURE_TYPE_BASEBOARD_UBB_FRONT

UBB front temperature.

Definition: amdsmi.h:366

AMDSMI_TEMPERATURE_TYPE_BASEBOARD_RETIMER_6_7_0V9_VR

@ AMDSMI_TEMPERATURE_TYPE_BASEBOARD_RETIMER_6_7_0V9_VR

Retimer 6-7 0.9V voltage regulator temperature.

Definition: amdsmi.h:383

AMDSMI_TEMPERATURE_TYPE_BASEBOARD_OAM_4_5_6_7_3V3_VR

@ AMDSMI_TEMPERATURE_TYPE_BASEBOARD_OAM_4_5_6_7_3V3_VR

OAM 4-5-6-7 3.3V voltage regulator temperature.

Definition: amdsmi.h:385

AMDSMI_TEMPERATURE_TYPE__MAX

@ AMDSMI_TEMPERATURE_TYPE__MAX

Maximum per GPU temperature type.

Definition: amdsmi.h:389

AMDSMI_TEMPERATURE_TYPE_BASEBOARD_UBB_OAM1

@ AMDSMI_TEMPERATURE_TYPE_BASEBOARD_UBB_OAM1

UBB OAM1 temperature.

Definition: amdsmi.h:371

AMDSMI_MAX_UUID_ELEMENTS

#define AMDSMI_MAX_UUID_ELEMENTS

Maximum number of UUID elements supported.

Definition: amdsmi.h:184

AMDSMI_MAX_NUM_FREQUENCIES

#define AMDSMI_MAX_NUM_FREQUENCIES

Guaranteed maximum possible number of supported frequencies.

Definition: amdsmi.h:188

AMDSMI_MAX_CACHE_TYPES

#define AMDSMI_MAX_CACHE_TYPES

Maximum number of cache types.

Definition: amdsmi.h:160

AMDSMI_DFC_FW_NUMBER_OF_ENTRIES

#define AMDSMI_DFC_FW_NUMBER_OF_ENTRIES

Number of DFC firmware entries supported.

Definition: amdsmi.h:181

AMDSMI_MAX_NUM_NUMA_NODES

#define AMDSMI_MAX_NUM_NUMA_NODES

Maximum number of NUMA nodes.

Definition: amdsmi.h:164

amdsmi_set_gpu_accelerator_partition_profile

amdsmi_status_t amdsmi_set_gpu_accelerator_partition_profile(amdsmi_processor_handle processor_handle, uint32_t profile_index)

Set accelerator partition setting based on profile_index from amdsmi_get_gpu_accelerator_partition_pr...

amdsmi_get_gpu_accelerator_partition_profile_config

amdsmi_status_t amdsmi_get_gpu_accelerator_partition_profile_config(amdsmi_processor_handle processor_handle, amdsmi_accelerator_partition_profile_config_t *profile_config)

Returns gpu accelerator partition caps as currently configured in the system.

amdsmi_get_gpu_accelerator_partition_profile_config_global

amdsmi_status_t amdsmi_get_gpu_accelerator_partition_profile_config_global(amdsmi_processor_handle processor_handle, amdsmi_accelerator_partition_profile_config_global_t *config)

Returns all GPU accelerator partition capabilities which can be configured on the system.

amdsmi_get_gpu_accelerator_partition_profile

amdsmi_status_t amdsmi_get_gpu_accelerator_partition_profile(amdsmi_processor_handle processor_handle, amdsmi_accelerator_partition_profile_t *profile, uint32_t *partition_id)

Returns current gpu accelerator partition cap.

amdsmi_get_fb_layout

amdsmi_status_t amdsmi_get_fb_layout(amdsmi_processor_handle processor_handle, amdsmi_pf_fb_info_t *info)

Returns the framebuffer info for the ASIC.

amdsmi_get_power_cap_info

amdsmi_status_t amdsmi_get_power_cap_info(amdsmi_processor_handle processor_handle, uint32_t sensor_ind, amdsmi_power_cap_info_t *info)

Returns the power caps as currently configured in the system.

amdsmi_get_pcie_info

amdsmi_status_t amdsmi_get_pcie_info(amdsmi_processor_handle processor_handle, amdsmi_pcie_info_t *info)

Returns the PCIe info for the GPU.

amdsmi_get_gpu_vram_info

amdsmi_status_t amdsmi_get_gpu_vram_info(amdsmi_processor_handle processor_handle, amdsmi_vram_info_t *info)

Returns vram info.

amdsmi_get_gpu_board_info

amdsmi_status_t amdsmi_get_gpu_board_info(amdsmi_processor_handle processor_handle, amdsmi_board_info_t *info)

Returns the board part number and board information for the requested device.

amdsmi_get_gpu_asic_info

amdsmi_status_t amdsmi_get_gpu_asic_info(amdsmi_processor_handle processor_handle, amdsmi_asic_info_t *info)

Returns the ASIC information for the device.

amdsmi_get_gpu_pci_bandwidth

amdsmi_status_t amdsmi_get_gpu_pci_bandwidth(amdsmi_processor_handle processor_handle, amdsmi_pcie_bandwidth_t *bandwidth)

Get the list of possible PCIe bandwidths that are available. It is not supported on virtual machine g...

amdsmi_get_xgmi_plpd

amdsmi_status_t amdsmi_get_xgmi_plpd(amdsmi_processor_handle processor_handle, amdsmi_dpm_policy_t *xgmi_plpd)

Get the xgmi per-link power down policy parameter for the processor.

amdsmi_set_xgmi_plpd

amdsmi_status_t amdsmi_set_xgmi_plpd(amdsmi_processor_handle processor_handle, uint32_t policy_id)

Set the xgmi per-link power down policy parameter for the processor.

amdsmi_get_soc_pstate

amdsmi_status_t amdsmi_get_soc_pstate(amdsmi_processor_handle processor_handle, amdsmi_dpm_policy_t *policy)

Get the soc pstate policy for the processor.

amdsmi_set_soc_pstate

amdsmi_status_t amdsmi_set_soc_pstate(amdsmi_processor_handle processor_handle, uint32_t policy_id)

Set the soc pstate policy for the processor.

amdsmi_reset_gpu

amdsmi_status_t amdsmi_reset_gpu(amdsmi_processor_handle processor_handle)

Triggers a chain that resets all GPUs. It is not supported on virtual machine guest.

amdsmi_get_tdi_state

amdsmi_status_t amdsmi_get_tdi_state(amdsmi_vf_handle_t vf_handle, amdsmi_tdi_state_t *state)

Gets TDI (TEE(Trusted Execution Environment) Device Interface) state.

amdsmi_get_cc_mode

amdsmi_status_t amdsmi_get_cc_mode(amdsmi_processor_handle processor_handle, amdsmi_cc_mode_t *mode)

Gets CC (Confidential Compute) mode.

amdsmi_set_cc_mode

amdsmi_status_t amdsmi_set_cc_mode(amdsmi_processor_handle processor_handle, amdsmi_cc_mode_t mode)

Sets CC (Confidential Compute) mode.

amdsmi_get_gpu_total_ecc_count

amdsmi_status_t amdsmi_get_gpu_total_ecc_count(amdsmi_processor_handle processor_handle, amdsmi_error_count_t *ec)

Returns the total number of ECC errors (correctable, uncorrectable and deferred) in the given GPU....

amdsmi_get_gpu_ecc_count

amdsmi_status_t amdsmi_get_gpu_ecc_count(amdsmi_processor_handle processor_handle, amdsmi_gpu_block_t block, amdsmi_error_count_t *ec)

Retrieve the error counts for a GPU block. It is not supported on virtual machine guest.

amdsmi_get_gpu_ecc_enabled

amdsmi_status_t amdsmi_get_gpu_ecc_enabled(amdsmi_processor_handle processor_handle, uint64_t *enabled_blocks)

Retrieve the enabled ECC bit-mask. It is not supported on virtual machine guest.

amdsmi_status_code_to_string

amdsmi_status_t amdsmi_status_code_to_string(amdsmi_status_t status, const char **status_string)

Get a description of a provided AMDSMI error status.

amdsmi_event_destroy

amdsmi_status_t amdsmi_event_destroy(amdsmi_event_set set)

Destroys and frees an event set.

amdsmi_event_read

amdsmi_status_t amdsmi_event_read(amdsmi_event_set set, int64_t timeout_usec, amdsmi_event_entry_t *event)

The call blocks till timeout is expired to copy one event specified by the event set into the user pr...

amdsmi_event_create

amdsmi_status_t amdsmi_event_create(amdsmi_processor_handle *processor_list, uint32_t num_devices, uint64_t event_types, amdsmi_event_set *set)

Allocate a new event set notifier to monitor different types of issues with the GPU running virtualiz...

amdsmi_get_gpu_vbios_info

amdsmi_status_t amdsmi_get_gpu_vbios_info(amdsmi_processor_handle processor_handle, amdsmi_vbios_info_t *info)

Returns the static information for the vBIOS on the device.

amdsmi_get_fw_info

amdsmi_status_t amdsmi_get_fw_info(amdsmi_processor_handle processor_handle, amdsmi_fw_info_t *info)

Returns the firmware versions running on the device.

amdsmi_get_dfc_fw_table

amdsmi_status_t amdsmi_get_dfc_fw_table(amdsmi_processor_handle processor_handle, amdsmi_dfc_fw_t *info)

Returns the DFC fw table.

amdsmi_get_fw_error_records

amdsmi_status_t amdsmi_get_fw_error_records(amdsmi_processor_handle processor_handle, amdsmi_fw_error_record_t *records)

Gets firmware error records.

amdsmi_get_gpu_fabric_info

amdsmi_status_t amdsmi_get_gpu_fabric_info(amdsmi_processor_handle processor_handle, amdsmi_fabric_info_t *info)

Get Fabric device information.

amdsmi_alloc_fabric_telemetry

amdsmi_status_t amdsmi_alloc_fabric_telemetry(amdsmi_processor_handle processor_handle, uint32_t category_mask, amdsmi_fabric_telemetry_t **telemetry)

Allocate storage for Fabric telemetry data.

amdsmi_free_fabric_telemetry

amdsmi_status_t amdsmi_free_fabric_telemetry(amdsmi_processor_handle processor_handle, amdsmi_fabric_telemetry_t *telemetry)

Free Fabric telemetry storage.

amdsmi_get_fabric_telemetry_data

amdsmi_status_t amdsmi_get_fabric_telemetry_data(amdsmi_processor_handle processor_handle, amdsmi_fabric_telemetry_t *telemetry)

Get Fabric telemetry data.

amdsmi_get_power_info

amdsmi_status_t amdsmi_get_power_info(amdsmi_processor_handle processor_handle, amdsmi_power_info_t *info)

Returns the current power and voltage of the GPU.

amdsmi_get_gpu_metrics

amdsmi_status_t amdsmi_get_gpu_metrics(amdsmi_processor_handle processor_handle, uint32_t *metrics_size, amdsmi_metric_t *metrics)

Return metrics information.

amdsmi_get_temp_metric

amdsmi_status_t amdsmi_get_temp_metric(amdsmi_processor_handle processor_handle, amdsmi_temperature_type_t sensor_type, amdsmi_temperature_metric_t metric, int64_t *temperature)

Get the temperature metric value for the specified metric, from the specified temperature sensor on t...

amdsmi_get_gpu_activity

amdsmi_status_t amdsmi_get_gpu_activity(amdsmi_processor_handle processor_handle, amdsmi_engine_usage_t *info)

Returns the current usage of the GPU engines (GFX, MM and MEM). Each usage is reported as a percentag...

amdsmi_get_clock_info

amdsmi_status_t amdsmi_get_clock_info(amdsmi_processor_handle processor_handle, amdsmi_clk_type_t clk_type, amdsmi_clk_info_t *info)

Returns the measurements of the clocks in the GPU for the GFX and multimedia engines and Memory....

amdsmi_is_gpu_power_management_enabled

amdsmi_status_t amdsmi_is_gpu_power_management_enabled(amdsmi_processor_handle processor_handle, bool *enabled)

Returns is power management enabled.

amdsmi_topo_get_link_type

amdsmi_status_t amdsmi_topo_get_link_type(amdsmi_processor_handle processor_handle_src, amdsmi_processor_handle processor_handle_dst, uint64_t *hops, amdsmi_link_type_t *type)

Retrieve the hops and the connection type between 2 processors.

amdsmi_get_xgmi_fb_sharing_caps

amdsmi_status_t amdsmi_get_xgmi_fb_sharing_caps(amdsmi_processor_handle processor_handle, amdsmi_xgmi_fb_sharing_caps_t *caps)

Return XGMI capabilities.

amdsmi_set_xgmi_fb_sharing_mode_v2

amdsmi_status_t amdsmi_set_xgmi_fb_sharing_mode_v2(amdsmi_processor_handle *processor_list, uint32_t num_processors, amdsmi_xgmi_fb_sharing_mode_t mode)

Set XGMI framebuffer custom sharing mode.

amdsmi_get_xgmi_fb_sharing_mode_info

amdsmi_status_t amdsmi_get_xgmi_fb_sharing_mode_info(amdsmi_processor_handle processor_handle_src, amdsmi_processor_handle processor_handle_dst, amdsmi_xgmi_fb_sharing_mode_t mode, uint8_t *fb_sharing)

Return XGMI framebuffer sharing information between two GPUs.

amdsmi_topo_get_numa_node_number

amdsmi_status_t amdsmi_topo_get_numa_node_number(amdsmi_processor_handle processor_handle, uint32_t *numa_node)

Retrieve the NUMA CPU node number for a device.

amdsmi_get_link_topology

amdsmi_status_t amdsmi_get_link_topology(amdsmi_processor_handle processor_handle_src, amdsmi_processor_handle processor_handle_dst, amdsmi_link_topology_t *topology_info)

Return link topology information between two connected processors.

amdsmi_get_link_metrics

amdsmi_status_t amdsmi_get_link_metrics(amdsmi_processor_handle processor_handle, amdsmi_link_metrics_t *link_metrics)

Return link metric information.

amdsmi_topo_get_p2p_status

amdsmi_status_t amdsmi_topo_get_p2p_status(amdsmi_processor_handle processor_handle_src, amdsmi_processor_handle processor_handle_dst, amdsmi_link_type_t *type, amdsmi_p2p_capability_t *cap)

Retrieve connection type and P2P capabilities between 2 GPUs.

amdsmi_set_xgmi_fb_sharing_mode

amdsmi_status_t amdsmi_set_xgmi_fb_sharing_mode(amdsmi_processor_handle processor_handle, amdsmi_xgmi_fb_sharing_mode_t mode)

Set XGMI framebuffer sharing mode.

amdsmi_get_link_topology_nearest

amdsmi_status_t amdsmi_get_link_topology_nearest(amdsmi_processor_handle processor_handle, amdsmi_link_type_t link_type, amdsmi_topology_nearest_t *topology_nearest_info)

Retrieve the set of GPUs that are nearest to a given device at a specific interconnectivity level.

amdsmi_get_guest_data

amdsmi_status_t amdsmi_get_guest_data(amdsmi_vf_handle_t vf_handle, amdsmi_guest_data_t *info)

Returns guest OS information of the queried VF. The fw_info field from the amdsmi_guest_data structur...

amdsmi_get_vf_fw_info

amdsmi_status_t amdsmi_get_vf_fw_info(amdsmi_vf_handle_t vf_handle, amdsmi_fw_info_t *info)

Returns the firmware versions running on a VF. In case the VM is not started on the VF,...

amdsmi_shut_down

amdsmi_status_t amdsmi_shut_down(void)

Shutdown the AMD SMI library.

amdsmi_init

amdsmi_status_t amdsmi_init(uint64_t init_flags)

Initialize the AMD SMI library.

amdsmi_get_gpu_memory_partition_config

amdsmi_status_t amdsmi_get_gpu_memory_partition_config(amdsmi_processor_handle processor_handle, amdsmi_memory_partition_config_t *config)

Returns current gpu memory partition capabilities.

amdsmi_set_gpu_memory_partition_mode

amdsmi_status_t amdsmi_set_gpu_memory_partition_mode(amdsmi_processor_handle processor_handle, amdsmi_memory_partition_type_t mode)

Sets memory partition mode Set memory partition setting based on memory_partition mode from amdsmi_ge...

amdsmi_get_nic_fw_info

amdsmi_status_t amdsmi_get_nic_fw_info(amdsmi_processor_handle processor_handle, amdsmi_nic_fw_info_t *info)

Retrieves firmware version information for the NIC.

amdsmi_get_nic_rdma_dev_info

amdsmi_status_t amdsmi_get_nic_rdma_dev_info(amdsmi_processor_handle processor_handle, amdsmi_nic_rdma_devices_info_t *info)

Retrieves RDMA devices information for the NIC.

amdsmi_get_nic_rdma_port_statistics

amdsmi_status_t amdsmi_get_nic_rdma_port_statistics(amdsmi_processor_handle processor_handle, uint32_t rdma_port_index, uint32_t *num_stats, amdsmi_nic_stat_t *stats)

Retrieve RDMA port statistics for the NIC.

amdsmi_get_nic_port_info

amdsmi_status_t amdsmi_get_nic_port_info(amdsmi_processor_handle processor_handle, amdsmi_nic_port_info_t *info)

Retrieves PORT information for the NIC.

amdsmi_get_nic_vendor_statistics

amdsmi_status_t amdsmi_get_nic_vendor_statistics(amdsmi_processor_handle processor_handle, uint32_t port_index, uint32_t *num_stats, amdsmi_nic_stat_t *stats)

Retrieve vendor specific statistics for the NIC port.

amdsmi_get_nic_port_statistics

amdsmi_status_t amdsmi_get_nic_port_statistics(amdsmi_processor_handle processor_handle, uint32_t port_index, uint32_t *num_stats, amdsmi_nic_stat_t *stats)

Retrieve PORT statistics for the specified NIC port.

amdsmi_get_nic_driver_info

amdsmi_status_t amdsmi_get_nic_driver_info(amdsmi_processor_handle processor_handle, amdsmi_nic_driver_info_t *info)

Retrieves information about the NIC driver.

amdsmi_get_nic_bus_info

amdsmi_status_t amdsmi_get_nic_bus_info(amdsmi_processor_handle processor_handle, amdsmi_nic_bus_info_t *info)

Retrieves BUS information for the NIC.

amdsmi_get_nic_asic_info

amdsmi_status_t amdsmi_get_nic_asic_info(amdsmi_processor_handle processor_handle, amdsmi_nic_asic_info_t *info)

Retrieves ASIC information for the NIC.

amdsmi_get_nic_numa_info

amdsmi_status_t amdsmi_get_nic_numa_info(amdsmi_processor_handle processor_handle, amdsmi_nic_numa_info_t *info)

Retrieves NUMA information for the NIC.

amdsmi_get_npm_info

amdsmi_status_t amdsmi_get_npm_info(amdsmi_node_handle node_handle, amdsmi_npm_info_t *info)

Retrieves node power management (NPM) status and power limit for the specified node.

amdsmi_get_gpu_ptl_state

amdsmi_status_t amdsmi_get_gpu_ptl_state(amdsmi_processor_handle processor_handle, bool *enabled)

Get PTL enable/disable state.

amdsmi_set_gpu_ptl_state

amdsmi_status_t amdsmi_set_gpu_ptl_state(amdsmi_processor_handle processor_handle, bool enable)

Set PTL enable/disable state.

amdsmi_set_gpu_ptl_formats

amdsmi_status_t amdsmi_set_gpu_ptl_formats(amdsmi_processor_handle processor_handle, amdsmi_ptl_data_format_t data_format1, amdsmi_ptl_data_format_t data_format2)

Set PTL with specified preferred data formats.

amdsmi_get_gpu_ptl_formats

amdsmi_status_t amdsmi_get_gpu_ptl_formats(amdsmi_processor_handle processor_handle, amdsmi_ptl_data_format_t *data_format1, amdsmi_ptl_data_format_t *data_format2)

Get PTL (Peak Tops Limiter) formats for the processor.

amdsmi_get_gpu_cache_info

amdsmi_status_t amdsmi_get_gpu_cache_info(amdsmi_processor_handle processor_handle, amdsmi_gpu_cache_info_t *info)

Returns gpu cache info.

amdsmi_set_power_cap

amdsmi_status_t amdsmi_set_power_cap(amdsmi_processor_handle processor_handle, uint32_t sensor_ind, uint64_t cap)

Set the maximum gpu power cap value. It is not supported on virtual machine guest.

amdsmi_get_supported_power_cap

amdsmi_status_t amdsmi_get_supported_power_cap(amdsmi_processor_handle processor_handle, uint32_t *sensor_count, uint32_t *sensor_inds, amdsmi_power_cap_type_t *sensor_types)

Query the supported power cap sensors and their types for a device.

amdsmi_get_processor_handles

amdsmi_status_t amdsmi_get_processor_handles(amdsmi_socket_handle socket_handle, uint32_t *processor_count, amdsmi_processor_handle *processor_handles)

Get the list of the processor handles associated to a socket.

amdsmi_get_index_from_processor_handle

amdsmi_status_t amdsmi_get_index_from_processor_handle(amdsmi_processor_handle processor_handle, uint32_t *processor_index)

Returns the index of the given processor handle.

amdsmi_get_gpu_device_uuid

amdsmi_status_t amdsmi_get_gpu_device_uuid(amdsmi_processor_handle processor_handle, unsigned int *uuid_length, char *uuid)

Returns the UUID of the device.

amdsmi_get_processor_type

amdsmi_status_t amdsmi_get_processor_type(amdsmi_processor_handle processor_handle, processor_type_t *processor_type)

Get the processor type of the processor_handle.

amdsmi_get_socket_info

amdsmi_status_t amdsmi_get_socket_info(amdsmi_socket_handle socket_handle, size_t len, char *name)

Get information about the given socket.

amdsmi_get_node_handle

amdsmi_status_t amdsmi_get_node_handle(amdsmi_processor_handle processor_handle, amdsmi_node_handle *node_handle)

Get the node handle associated with processor handle.

amdsmi_get_gpu_virtualization_mode

amdsmi_status_t amdsmi_get_gpu_virtualization_mode(amdsmi_processor_handle processor_handle, amdsmi_virtualization_mode_t *mode)

Returns the virtualization mode for the target device.

amdsmi_get_nic_processor_handles

amdsmi_status_t amdsmi_get_nic_processor_handles(amdsmi_socket_handle socket_handle, uint32_t *processor_count, amdsmi_processor_handle *processor_handles)

Get the list of the NIC processor handles associated to a socket.

amdsmi_get_nic_device_bdf

amdsmi_status_t amdsmi_get_nic_device_bdf(amdsmi_processor_handle processor_handle, amdsmi_bdf_t *bdf)

Returns BDF of the given NIC device.

amdsmi_get_processor_handle_from_uuid

amdsmi_status_t amdsmi_get_processor_handle_from_uuid(const char *uuid, amdsmi_processor_handle *processor_handle)

Returns the processor handle from the given UUID.

amdsmi_get_socket_handles

amdsmi_status_t amdsmi_get_socket_handles(uint32_t *socket_count, amdsmi_socket_handle *socket_handles)

Get the list of socket handles in the system.

amdsmi_get_vf_bdf

amdsmi_status_t amdsmi_get_vf_bdf(amdsmi_vf_handle_t vf_handle, amdsmi_bdf_t *bdf)

Returns BDF of the given device (VF).

amdsmi_get_vf_handle_from_bdf

amdsmi_status_t amdsmi_get_vf_handle_from_bdf(amdsmi_bdf_t bdf, amdsmi_vf_handle_t *vf_handle)

Returns VF handle from the given BDF.

amdsmi_get_processor_handle_from_bdf

amdsmi_status_t amdsmi_get_processor_handle_from_bdf(amdsmi_bdf_t bdf, amdsmi_processor_handle *processor_handle)

Get processor handle with the matching bdf.

amdsmi_get_vf_handle_from_vf_index

amdsmi_status_t amdsmi_get_vf_handle_from_vf_index(amdsmi_processor_handle processor_handle, uint32_t fcn_idx, amdsmi_vf_handle_t *vf_handle)

Returns the handle of a virtual function given its index.

amdsmi_get_processor_handles_by_type

amdsmi_status_t amdsmi_get_processor_handles_by_type(amdsmi_socket_handle socket_handle, processor_type_t processor_type, amdsmi_processor_handle *processor_handles, uint32_t *processor_count)

Returns a list of processor handles of the specified type in the system.

amdsmi_get_vf_uuid

amdsmi_status_t amdsmi_get_vf_uuid(amdsmi_vf_handle_t processor_handle, unsigned int *uuid_length, char *uuid)

Returns the UUID of the VF.

amdsmi_get_gpu_device_bdf

amdsmi_status_t amdsmi_get_gpu_device_bdf(amdsmi_processor_handle processor_handle, amdsmi_bdf_t *bdf)

Returns BDF of the given GPU device.

amdsmi_get_processor_bdf

amdsmi_status_t amdsmi_get_processor_bdf(amdsmi_processor_handle processor_handle, amdsmi_bdf_t *bdf)

Returns BDF of the given device.

amdsmi_get_vf_handle_from_uuid

amdsmi_status_t amdsmi_get_vf_handle_from_uuid(const char *uuid, amdsmi_vf_handle_t *vf_handle)

Returns the handle of a virtual function from the given UUID.

amdsmi_get_cpu_affinity_with_scope

amdsmi_status_t amdsmi_get_cpu_affinity_with_scope(amdsmi_processor_handle processor_handle, uint32_t cpu_set_size, uint64_t *cpu_set, amdsmi_affinity_scope_t scope)

Retrieves an array of uint64_t (sized to cpu_set_size) of bitmasks with the affinity within numa node...

amdsmi_get_processor_handle_from_index

amdsmi_status_t amdsmi_get_processor_handle_from_index(uint32_t processor_index, amdsmi_processor_handle *processor_handle)

Returns the processor handle from the given processor index.

amdsmi_get_fabric_cper_entries

amdsmi_status_t amdsmi_get_fabric_cper_entries(amdsmi_processor_handle processor_handle, uint32_t severity_mask, char *cper_data, uint64_t *buf_size, amdsmi_cper_hdr_t **cper_hdrs, uint64_t *entry_count, uint64_t *cursor)

Retrieve CPER entries for UALoE fabric events.

amdsmi_get_gpu_ras_policy_info

amdsmi_status_t amdsmi_get_gpu_ras_policy_info(amdsmi_processor_handle processor_handle, amdsmi_gpu_ras_policy_info_t *info)

Get the RAS policy info for a device.

amdsmi_get_afids_from_cper

amdsmi_status_t amdsmi_get_afids_from_cper(char *cper_buffer, uint32_t buf_size, uint64_t *afids, uint32_t *num_afids)

Get the AFIDs from CPER buffer.

amdsmi_get_bad_page_threshold

amdsmi_status_t amdsmi_get_bad_page_threshold(amdsmi_processor_handle processor_handle, uint32_t *threshold)

Get the bad page threshold for a device.

amdsmi_get_gpu_cper_entries

amdsmi_status_t amdsmi_get_gpu_cper_entries(amdsmi_processor_handle processor_handle, uint32_t severity_mask, char *cper_data, uint64_t *buf_size, amdsmi_cper_hdr_t **cper_hdrs, uint64_t *entry_count, uint64_t *cursor)

Retrieve CPER entries cached in the driver.

amdsmi_get_gpu_ras_feature_info

amdsmi_status_t amdsmi_get_gpu_ras_feature_info(amdsmi_processor_handle processor_handle, amdsmi_ras_feature_t *ras_feature)

Returns RAS features info.

amdsmi_get_gpu_bad_page_info

amdsmi_status_t amdsmi_get_gpu_bad_page_info(amdsmi_processor_handle processor_handle, uint32_t *bad_page_size, amdsmi_eeprom_table_record_t *bad_pages)

Returns the bad page info.

amdsmi_get_gpu_driver_info

amdsmi_status_t amdsmi_get_gpu_driver_info(amdsmi_processor_handle processor_handle, amdsmi_driver_info_t *info)

Returns the driver version information.

amdsmi_get_gpu_driver_model

amdsmi_status_t amdsmi_get_gpu_driver_model(amdsmi_processor_handle processor_handle, amdsmi_driver_model_type_t *model)

Returns the driver model information.

amdsmi_get_vf_hbm_info

amdsmi_status_t amdsmi_get_vf_hbm_info(amdsmi_vf_handle_t vf_handle, amdsmi_vf_hbm_info_t *info)

Returns the HBM information for a VF.

amdsmi_get_vf_info

amdsmi_status_t amdsmi_get_vf_info(amdsmi_vf_handle_t vf_handle, amdsmi_vf_info_t *config)

Returns the configuration structure for a VF.

amdsmi_get_vf_data

amdsmi_status_t amdsmi_get_vf_data(amdsmi_vf_handle_t vf_handle, amdsmi_vf_data_t *info)

Returns the data structure for a VF.

amdsmi_get_vf_partition_info

amdsmi_status_t amdsmi_get_vf_partition_info(amdsmi_processor_handle processor_handle, unsigned int vf_buffer_num, amdsmi_partition_info_t *info)

Returns the current framebuffer partitioning structure as currently configured by the driver.

amdsmi_get_num_vf

amdsmi_status_t amdsmi_get_num_vf(amdsmi_processor_handle processor_handle, uint32_t *num_vf_enabled, uint32_t *num_vf_supported)

Returns the number of VFs enabled by gpuv in the ASIC.

amdsmi_get_partition_profile_info

amdsmi_status_t amdsmi_get_partition_profile_info(amdsmi_processor_handle processor_handle, amdsmi_profile_info_t *profile_info)

Return the list of supported profiles on the given GPU device.

amdsmi_clear_vf_fb

amdsmi_status_t amdsmi_clear_vf_fb(amdsmi_vf_handle_t vf_handle)

Clear the framebuffer of a VF. If trying to clear the framebuffer of an active function,...

amdsmi_set_num_vf

amdsmi_status_t amdsmi_set_num_vf(amdsmi_processor_handle processor_handle, uint32_t num_vf)

Enable a given number of VF.

amdsmi_get_lib_version

amdsmi_status_t amdsmi_get_lib_version(amdsmi_version_t *version)

Get the build version information for the currently running build of AMDSMI.

amdsmi_accelerator_partition_profile_config_global_t

Definition: amdsmi.h:2629

amdsmi_accelerator_partition_profile_config_global_t::num_profiles

uint32_t num_profiles

The length of profiles array.

Definition: amdsmi.h:2630

amdsmi_accelerator_partition_profile_config_global_t::default_profile_index

uint32_t default_profile_index

The index of the default profile in the profiles array.

Definition: amdsmi.h:2633

amdsmi_accelerator_partition_profile_config_t

Accelerator Partition Profile Configurations.

Definition: amdsmi.h:973

amdsmi_accelerator_partition_profile_config_t::default_profile_index

uint32_t default_profile_index

The index of the default profile in the profiles array.

Definition: amdsmi.h:978

amdsmi_accelerator_partition_profile_config_t::num_profiles

uint32_t num_profiles

The length of profiles array.

Definition: amdsmi.h:974

amdsmi_accelerator_partition_profile_global_t

Definition: amdsmi.h:2623

amdsmi_accelerator_partition_profile_global_t::vf_mode

uint32_t vf_mode

Bitmask of VF modes (see amdsmi_vf_mode_t)

Definition: amdsmi.h:2625

amdsmi_accelerator_partition_profile_t

Accelerator Partition Resource Profile.

Definition: amdsmi.h:944

amdsmi_accelerator_partition_profile_t::profile_index

uint32_t profile_index

Index in the profiles array in amdsmi_accelerator_partition_profile_t.

Definition: amdsmi.h:948

amdsmi_accelerator_partition_profile_t::num_partitions

uint32_t num_partitions

On MI300X: SPX=>1, DPX=>2, QPX=>4, CPX=>8; length of resources.

Definition: amdsmi.h:946

amdsmi_accelerator_partition_profile_t::memory_caps

amdsmi_nps_caps_t memory_caps

Possible memory partition capabilities.

Definition: amdsmi.h:947

amdsmi_accelerator_partition_profile_t::profile_type

amdsmi_accelerator_partition_type_t profile_type

SPX, DPX, QPX, CPX and so on.

Definition: amdsmi.h:945

amdsmi_accelerator_partition_profile_t::num_resources

uint32_t num_resources

length of index_of_resources_profile

Definition: amdsmi.h:949

amdsmi_accelerator_partition_resource_profile_t

Accelerator Partition Resources. This struct is used to identify various partition resource profiles.

Definition: amdsmi.h:960

amdsmi_accelerator_partition_resource_profile_t::partition_resource

uint32_t partition_resource

Resources a partition can use, which may be shared.

Definition: amdsmi.h:963

amdsmi_accelerator_partition_resource_profile_t::num_partitions_share_resource

uint32_t num_partitions_share_resource

If it is greater than 1, then resource is shared.

Definition: amdsmi.h:964

amdsmi_asic_info_t

ASIC Information.

Definition: amdsmi.h:802

amdsmi_asic_info_t::target_graphics_version

uint64_t target_graphics_version

0xFFFFFFFFFFFFFFFF if not supported

Definition: amdsmi.h:812

amdsmi_asic_info_t::vendor_id

uint32_t vendor_id

Use 32 bit to be compatible with other platform.

Definition: amdsmi.h:804

amdsmi_asic_info_t::device_id

uint64_t device_id

The device ID of a GPU.

Definition: amdsmi.h:807

amdsmi_asic_info_t::oam_id

uint32_t oam_id

Corresponds to socket number, 0xFFFFFFFF if not supported.

Definition: amdsmi.h:810

amdsmi_asic_info_t::num_of_compute_units

uint32_t num_of_compute_units

0xFFFFFFFF if not supported

Definition: amdsmi.h:811

amdsmi_asic_info_t::subvendor_id

uint32_t subvendor_id

The subsystem vendor ID.

Definition: amdsmi.h:806

amdsmi_asic_info_t::subsystem_id

uint32_t subsystem_id

The subsystem ID.

Definition: amdsmi.h:813

amdsmi_asic_info_t::flags

uint64_t flags

Chip flags.

Definition: amdsmi.h:814

amdsmi_asic_info_t::rev_id

uint32_t rev_id

The revision ID of a GPU.

Definition: amdsmi.h:808

amdsmi_bdf_t::bdf_

Definition: amdsmi.h:668

amdsmi_board_info_t

Board Information.

Definition: amdsmi.h:988

amdsmi_clk_info_t

Clock Information.

Definition: amdsmi.h:884

amdsmi_clk_info_t::clk

uint32_t clk

In MHz.

Definition: amdsmi.h:885

amdsmi_clk_info_t::clk_locked

uint8_t clk_locked

True/False.

Definition: amdsmi.h:888

amdsmi_clk_info_t::clk_deep_sleep

uint8_t clk_deep_sleep

True/False.

Definition: amdsmi.h:889

amdsmi_clk_info_t::min_clk

uint32_t min_clk

In MHz.

Definition: amdsmi.h:886

amdsmi_clk_info_t::max_clk

uint32_t max_clk

In MHz.

Definition: amdsmi.h:887

amdsmi_cper_guid_t

Cper.

Definition: amdsmi.h:1164

amdsmi_cper_hdr_t

Definition: amdsmi.h:1189

amdsmi_cper_hdr_t::notify_type

amdsmi_cper_guid_t notify_type

CMC, MCE, can use amdsmi_cper_notifiy_type_t to decode.

Definition: amdsmi.h:1201

amdsmi_cper_hdr_t::persistence_info

uint64_t persistence_info

Reserved.

Definition: amdsmi.h:1204

amdsmi_cper_hdr_t::signature_end

uint32_t signature_end

0xFFFFFFFF

Definition: amdsmi.h:1192

amdsmi_cper_hdr_t::flags

uint32_t flags

Reserved.

Definition: amdsmi.h:1203

amdsmi_cper_hdr_t::partition_id

amdsmi_cper_guid_t partition_id

Reserved.

Definition: amdsmi.h:1199

amdsmi_cper_hdr_t::record_length

uint32_t record_length

Total size of CPER Entry.

Definition: amdsmi.h:1196

amdsmi_cper_timestamp_t

Definition: amdsmi.h:1168

amdsmi_cper_valid_bits_t::valid_bits_

Definition: amdsmi.h:1180

amdsmi_dfc_fw_data_t

DFC Firmware Data.

Definition: amdsmi.h:2484

amdsmi_dfc_fw_data_t::customer_ordinal

uint32_t customer_ordinal

only used in driver version on NV32+

Definition: amdsmi.h:2487

amdsmi_dfc_fw_header_t

DFC Firmware Header.

Definition: amdsmi.h:2452

amdsmi_dfc_fw_t

DFC Firmware.

Definition: amdsmi.h:2501

amdsmi_dfc_fw_ta_uuid_t

DFC Firmware TA UUID.

Definition: amdsmi.h:2475

amdsmi_dfc_fw_white_list_t

DFC Firmware White List.

Definition: amdsmi.h:2465

amdsmi_dpm_policy_entry_t

The dpm policy.

Definition: amdsmi.h:1060

amdsmi_dpm_policy_t

DPM Policy.

Definition: amdsmi.h:1072

amdsmi_dpm_policy_t::num_supported

uint32_t num_supported

The number of supported policies.

Definition: amdsmi.h:1073

amdsmi_dpm_policy_t::current

uint32_t current

The current policy index.

Definition: amdsmi.h:1074

amdsmi_driver_info_t

Driver Information.

Definition: amdsmi.h:842

amdsmi_eeprom_table_record_t

Structure representing an EEPROM table record for tracking memory errors.

Definition: amdsmi.h:2515

amdsmi_eeprom_table_record_t::retired_page

uint64_t retired_page

Bad page frame address.

Definition: amdsmi.h:2516

amdsmi_engine_usage_t

Engine Usage amdsmi_engine_usage_t: This structure holds common GPU activity values seen in both BM o...

Definition: amdsmi.h:872

amdsmi_engine_usage_t::gfx_activity

uint32_t gfx_activity

In %.

Definition: amdsmi.h:873

amdsmi_engine_usage_t::umc_activity

uint32_t umc_activity

In %.

Definition: amdsmi.h:874

amdsmi_engine_usage_t::mm_activity

uint32_t mm_activity

In %.

Definition: amdsmi.h:875

amdsmi_error_count_t

This structure holds error counts.

Definition: amdsmi.h:898

amdsmi_error_count_t::uncorrectable_count

uint64_t uncorrectable_count

Accumulated uncorrectable errors.

Definition: amdsmi.h:900

amdsmi_error_count_t::correctable_count

uint64_t correctable_count

Accumulated correctable errors.

Definition: amdsmi.h:899

amdsmi_error_count_t::deferred_count

uint64_t deferred_count

Accumulated deferred errors.

Definition: amdsmi.h:901

amdsmi_event_entry_t

Event Entry.

Definition: amdsmi.h:2267

amdsmi_event_entry_t::timestamp

uint64_t timestamp

UTC microseconds.

Definition: amdsmi.h:2270

amdsmi_fabric_info_t

Fabric device information structure.

Definition: amdsmi.h:2762

amdsmi_fabric_info_t::bdf

amdsmi_bdf_t bdf

BDF (Bus, Device, Function) of the Fabric device.

Definition: amdsmi.h:2763

amdsmi_fabric_info_v1_t

Fabric device configuration information (version 1)

Definition: amdsmi.h:2736

amdsmi_fabric_info_v1_t::vpod_size

uint32_t vpod_size

Virtual PoD size.

Definition: amdsmi.h:2744

amdsmi_fabric_info_v1_t::addr_mode

amdsmi_fabric_npa_address_mode_t addr_mode

Source aliasing or identification mode.

Definition: amdsmi.h:2747

amdsmi_fabric_info_v1_t::accel_state

amdsmi_fabric_accelerator_vpod_state_t accel_state

Accelerator vPoD State.

Definition: amdsmi.h:2748

amdsmi_fabric_info_v1_t::vpod_id

uint32_t vpod_id

Virtual PoD Identifier.

Definition: amdsmi.h:2743

amdsmi_fabric_info_v1_t::fabric_type

amdsmi_fabric_type_t fabric_type

UALOE or UALLINK.

Definition: amdsmi.h:2738

amdsmi_fabric_info_v1_t::ppod_size

uint32_t ppod_size

Physical PoD size.

Definition: amdsmi.h:2742

amdsmi_fabric_info_v1_t::accelerator_id

uint32_t accelerator_id

Accelerator identifier (range 0 to 1023)

Definition: amdsmi.h:2737

amdsmi_fabric_info_v1_t::bandwidth

uint32_t bandwidth

Station bandwidth share in Mb/s.

Definition: amdsmi.h:2739

amdsmi_fabric_info_v1_t::latency

uint32_t latency

Latency in nanoseconds (depends on switch presence and type)

Definition: amdsmi.h:2740

amdsmi_fabric_info_ver_t

Definition: amdsmi.h:2751

amdsmi_fabric_info_ver_t::version

uint32_t version

[31:16] major version, [15:0] minor version

Definition: amdsmi.h:2752

amdsmi_fabric_label_t

Fabric textual label structure.

Definition: amdsmi.h:2685

amdsmi_fabric_telemetry_dataset_t

Fabric telemetry dataset structure.

Definition: amdsmi.h:2710

amdsmi_fabric_telemetry_dataset_t::category

amdsmi_fabric_telemetry_category_t category

Telemetry category.

Definition: amdsmi.h:2711

amdsmi_fabric_telemetry_dataset_t::instance_count

unsigned instance_count

Number of instances for this category.

Definition: amdsmi.h:2714

amdsmi_fabric_telemetry_dataset_t::instances

amdsmi_fabric_telemetry_instance_t * instances

Array of pointers to instances.

Definition: amdsmi.h:2715

amdsmi_fabric_telemetry_dataset_t::generation_count

uint64_t generation_count

Sequence number incremented each time telemetry is written.

Definition: amdsmi.h:2712

amdsmi_fabric_telemetry_instance_t

Fabric telemetry instance structure.

Definition: amdsmi.h:2696

amdsmi_fabric_telemetry_instance_t::name

amdsmi_fabric_label_t name

Name for this instance.

Definition: amdsmi.h:2697

amdsmi_fabric_telemetry_instance_t::items

amdsmi_fabric_telemetry_item_t * items

Pointer to array of telemetry items.

Definition: amdsmi.h:2700

amdsmi_fabric_telemetry_instance_t::logical_idx

unsigned logical_idx

Logical index for this instance.

Definition: amdsmi.h:2698

amdsmi_fabric_telemetry_instance_t::item_count

unsigned item_count

Number of telemetry items in the set.

Definition: amdsmi.h:2699

amdsmi_fabric_telemetry_item_t

Fabric telemetry item structure.

Definition: amdsmi.h:2673

amdsmi_fabric_telemetry_item_t::value

uint64_t value

Value of the telemetry item.

Definition: amdsmi.h:2675

amdsmi_fabric_telemetry_item_t::id

uint64_t id

Identifier of the telemetry item.

Definition: amdsmi.h:2674

amdsmi_fabric_telemetry_t

Fabric telemetry structure.

Definition: amdsmi.h:2727

amdsmi_frequencies_t

This structure holds information about clock frequencies.

Definition: amdsmi.h:717

amdsmi_frequencies_t::current

uint32_t current

The current frequency index in MHz.

Definition: amdsmi.h:720

amdsmi_frequencies_t::num_supported

uint32_t num_supported

The number of supported frequencies.

Definition: amdsmi.h:719

amdsmi_frequencies_t::has_deep_sleep

bool has_deep_sleep

Deep Sleep frequency is only supported by some GPUs.

Definition: amdsmi.h:718

amdsmi_fw_error_record_t

Firmware Error Record.

Definition: amdsmi.h:2546

amdsmi_fw_info_t::fw_info_list_

Definition: amdsmi.h:1047

amdsmi_fw_info_t

Firmware Information.

Definition: amdsmi.h:1045

amdsmi_fw_load_error_record_t

Firmware Load Error Record.

Definition: amdsmi.h:2533

amdsmi_fw_load_error_record_t::timestamp

uint64_t timestamp

UTC microseconds.

Definition: amdsmi.h:2534

amdsmi_fw_load_error_record_t::status

uint16_t status

amdsmi_guest_fw_load_status

Definition: amdsmi.h:2537

amdsmi_gpu_cache_info_t::cache_

Definition: amdsmi.h:1029

amdsmi_gpu_cache_info_t::cache_::num_cache_instance

uint32_t num_cache_instance

total number of instance of this cache type

Definition: amdsmi.h:1034

amdsmi_gpu_cache_info_t::cache_::cache_size

uint32_t cache_size

In KB.

Definition: amdsmi.h:1031

amdsmi_gpu_cache_info_t::cache_::max_num_cu_shared

uint32_t max_num_cu_shared

Indicates how many Compute Units share this cache instance.

Definition: amdsmi.h:1033

amdsmi_gpu_cache_info_t::cache_::cache_properties

uint32_t cache_properties

amdsmi_cache_property_type_t which is a bitmask

Definition: amdsmi.h:1030

amdsmi_gpu_cache_info_t

GPU Cache Information.

Definition: amdsmi.h:1027

amdsmi_gpu_ras_policy_info_t

Ras policy info structure for storing version and different ras policy version structures.

Definition: amdsmi.h:1148

amdsmi_gpu_ras_policy_v4_0_t

Ras policy v4.0.

Definition: amdsmi.h:1137

amdsmi_gpu_ras_policy_v4_0_t::dram_critical_region_threshold

uint16_t dram_critical_region_threshold

Critical region UCE threshold.

Definition: amdsmi.h:1139

amdsmi_gpu_ras_policy_v4_0_t::dram_non_critical_region_threshold

uint16_t dram_non_critical_region_threshold

Non-critical region UCE threshold.

Definition: amdsmi.h:1138

amdsmi_guard_info_t

Guard Information.

Definition: amdsmi.h:2332

amdsmi_guest_data_t

Guest Data.

Definition: amdsmi.h:2441

amdsmi_guest_data_t::fb_usage

uint32_t fb_usage

guest framebuffer usage in MB

Definition: amdsmi.h:2443

amdsmi_handshake_t

Handshake.

Definition: amdsmi.h:2286

amdsmi_link_metrics_t::_links

Definition: amdsmi.h:746

amdsmi_link_metrics_t::_links::write

uint64_t write

total data transfered for each link in KB

Definition: amdsmi.h:752

amdsmi_link_metrics_t::_links::link_status

amdsmi_link_status_t link_status

HW status of the link.

Definition: amdsmi.h:753

amdsmi_link_metrics_t::_links::read

uint64_t read

total data received for each link in KB

Definition: amdsmi.h:751

amdsmi_link_metrics_t::_links::bit_rate

uint32_t bit_rate

current link speed in Gb/s

Definition: amdsmi.h:748

amdsmi_link_metrics_t::_links::link_type

amdsmi_link_type_t link_type

type of the link

Definition: amdsmi.h:750

amdsmi_link_metrics_t::_links::bdf

amdsmi_bdf_t bdf

bdf of the destination gpu

Definition: amdsmi.h:747

amdsmi_link_metrics_t::_links::max_bandwidth

uint32_t max_bandwidth

max bandwidth of the link in Gb/s

Definition: amdsmi.h:749

amdsmi_link_metrics_t

Link Metrics.

Definition: amdsmi.h:744

amdsmi_link_metrics_t::num_links

uint32_t num_links

number of links

Definition: amdsmi.h:745

amdsmi_link_topology_t

Link Topology.

Definition: amdsmi.h:2557

amdsmi_link_topology_t::weight

uint64_t weight

link weight

Definition: amdsmi.h:2558

amdsmi_link_topology_t::link_type

amdsmi_link_type_t link_type

type of the link

Definition: amdsmi.h:2560

amdsmi_link_topology_t::num_hops

uint8_t num_hops

number of hops

Definition: amdsmi.h:2561

amdsmi_link_topology_t::link_status

amdsmi_link_status_t link_status

HW status of the link.

Definition: amdsmi.h:2559

amdsmi_link_topology_t::fb_sharing

uint8_t fb_sharing

framebuffer sharing flag

Definition: amdsmi.h:2562

amdsmi_memory_partition_config_t::numa_range_

Definition: amdsmi.h:931

amdsmi_memory_partition_config_t

Memory Partition Configuration. This structure is used to identify various memory partition configura...

Definition: amdsmi.h:927

amdsmi_metric_t

Metric.

Definition: amdsmi.h:2599

amdsmi_metric_t::res_group

amdsmi_metric_res_group_t res_group

Resource group this metric belongs to.

Definition: amdsmi.h:2606

amdsmi_metric_t::res_subgroup

amdsmi_metric_res_subgroup_t res_subgroup

Resource subgroup this metric belongs to.

Definition: amdsmi.h:2607

amdsmi_metric_t::flags

uint32_t flags

used to determine type of the metric (amdsmi_metric_type_t)

Definition: amdsmi.h:2603

amdsmi_metric_t::res_instance

uint32_t res_instance

Resource instance this metric belongs to.

Definition: amdsmi.h:2608

amdsmi_metric_t::vf_mask

uint32_t vf_mask

Mask of all active VFs + PF that this metric applies to.

Definition: amdsmi.h:2604

amdsmi_nic_asic_info_t

NIC asic information.

Definition: amdsmi.h:2805

amdsmi_nic_bus_info_t

NIC bus information.

Definition: amdsmi.h:2823

amdsmi_nic_bus_info_t::max_pcie_speed

uint32_t max_pcie_speed

maximum PCIe speed in GT/s

Definition: amdsmi.h:2826

amdsmi_nic_driver_info_t

NIC driver information.

Definition: amdsmi.h:2931

amdsmi_nic_fw_entry_t

NIC firmware entry.

Definition: amdsmi.h:2856

amdsmi_nic_fw_info_t

NIC firmware information.

Definition: amdsmi.h:2866

amdsmi_nic_fw_t

NIC firmware.

Definition: amdsmi.h:2846

amdsmi_nic_numa_info_t

NIC NUMA information.

Definition: amdsmi.h:2836

amdsmi_nic_port_info_t

NIC port information collection.

Definition: amdsmi.h:2921

amdsmi_nic_port_t

NIC port information.

Definition: amdsmi.h:2897

amdsmi_nic_port_t::active_fec

uint32_t active_fec

Active FEC modes bitmask (see about FEC modes in the description)

Definition: amdsmi.h:2909

amdsmi_nic_rdma_dev_info_t

NIC RDMA device information.

Definition: amdsmi.h:2959

amdsmi_nic_rdma_devices_info_t

NIC RDMA devices information collection.

Definition: amdsmi.h:2974

amdsmi_nic_rdma_port_info_t

NIC RDMA port information.

Definition: amdsmi.h:2946

amdsmi_nic_rdma_port_info_t::active_mtu

uint16_t active_mtu

Active MTU in bytes.

Definition: amdsmi.h:2951

amdsmi_nic_rdma_port_info_t::max_mtu

uint16_t max_mtu

Maximum MTU in bytes.

Definition: amdsmi.h:2950

amdsmi_nic_stat_t

Structure for NIC statistic name-value pairs.

Definition: amdsmi.h:2795

amdsmi_npm_info_t

NPM info.

Definition: amdsmi.h:1015

amdsmi_npm_info_t::ubb_power_threshold

uint32_t ubb_power_threshold

The UBB node power threshold (upper limit) in Watts.

Definition: amdsmi.h:1018

amdsmi_npm_info_t::status

amdsmi_npm_status_t status

NPM status (enabled/disabled).

Definition: amdsmi.h:1016

amdsmi_npm_info_t::limit

uint64_t limit

Maximum allowed node-level power draw in Watts.

Definition: amdsmi.h:1017

amdsmi_nps_caps_t::nps_flags_

Definition: amdsmi.h:911

amdsmi_nps_caps_t::nps_flags_::nps8_cap

uint32_t nps8_cap

bool 1 = true; 0 = false

Definition: amdsmi.h:915

amdsmi_nps_caps_t::nps_flags_::nps4_cap

uint32_t nps4_cap

bool 1 = true; 0 = false

Definition: amdsmi.h:914

amdsmi_nps_caps_t::nps_flags_::nps2_cap

uint32_t nps2_cap

bool 1 = true; 0 = false

Definition: amdsmi.h:913

amdsmi_nps_caps_t::nps_flags_::nps1_cap

uint32_t nps1_cap

bool 1 = true; 0 = false

Definition: amdsmi.h:912

amdsmi_p2p_capability_t

IO Link P2P Capability.

Definition: amdsmi.h:1002

amdsmi_p2p_capability_t::is_iolink_atomics_64bit

uint8_t is_iolink_atomics_64bit

1 = true, 0 = false, UINT8_MAX = Not defined

Definition: amdsmi.h:1005

amdsmi_p2p_capability_t::is_iolink_atomics_32bit

uint8_t is_iolink_atomics_32bit

1 = true, 0 = false, UINT8_MAX = Not defined

Definition: amdsmi.h:1004

amdsmi_p2p_capability_t::is_iolink_bi_directional

uint8_t is_iolink_bi_directional

1 = true, 0 = false, UINT8_MAX = Not defined

Definition: amdsmi.h:1007

amdsmi_p2p_capability_t::is_iolink_coherent

uint8_t is_iolink_coherent

1 = true, 0 = false, UINT8_MAX = Not defined

Definition: amdsmi.h:1003

amdsmi_p2p_capability_t::is_iolink_dma

uint8_t is_iolink_dma

1 = true, 0 = false, UINT8_MAX = Not defined

Definition: amdsmi.h:1006

amdsmi_partition_info_t

Partition Information.

Definition: amdsmi.h:2321

amdsmi_pcie_bandwidth_t

This structure holds information about the possible PCIe bandwidths. Specifically,...

Definition: amdsmi.h:734

amdsmi_pcie_bandwidth_t::transfer_rate

amdsmi_frequencies_t transfer_rate

Transfer rates (T/s) that are possible.

Definition: amdsmi.h:735

amdsmi_pcie_info_t::pcie_metric_

Definition: amdsmi.h:697

amdsmi_pcie_info_t::pcie_metric_::pcie_nak_received_count

uint64_t pcie_nak_received_count

total number of NAKs issued on the PCIe link by the receiver

Definition: amdsmi.h:705

amdsmi_pcie_info_t::pcie_metric_::pcie_replay_count

uint64_t pcie_replay_count

total number of the replays issued on the PCIe link

Definition: amdsmi.h:701

amdsmi_pcie_info_t::pcie_metric_::pcie_width

uint16_t pcie_width

current PCIe width

Definition: amdsmi.h:698

amdsmi_pcie_info_t::pcie_metric_::pcie_speed

uint32_t pcie_speed

current PCIe speed in MT/s

Definition: amdsmi.h:699

amdsmi_pcie_info_t::pcie_metric_::pcie_bandwidth

uint32_t pcie_bandwidth

current PCIe bandwidth in Mb/s

Definition: amdsmi.h:700

amdsmi_pcie_info_t::pcie_metric_::pcie_l0_to_recovery_count

uint64_t pcie_l0_to_recovery_count

total number of times the PCIe link transitioned from L0 to the recovery state

Definition: amdsmi.h:702

amdsmi_pcie_info_t::pcie_metric_::pcie_nak_sent_count

uint64_t pcie_nak_sent_count

total number of NAKs issued on the PCIe link by the device

Definition: amdsmi.h:704

amdsmi_pcie_info_t::pcie_metric_::pcie_replay_roll_over_count

uint64_t pcie_replay_roll_over_count

total number of replay rollovers issued on the PCIe link

Definition: amdsmi.h:703

amdsmi_pcie_info_t::pcie_metric_::pcie_lc_perf_other_end_recovery_count

uint32_t pcie_lc_perf_other_end_recovery_count

PCIe other end recovery counter.

Definition: amdsmi.h:706

amdsmi_pcie_info_t::pcie_static_

Definition: amdsmi.h:689

amdsmi_pcie_info_t::pcie_static_::max_pcie_width

uint16_t max_pcie_width

maximum number of PCIe lanes

Definition: amdsmi.h:690

amdsmi_pcie_info_t::pcie_static_::max_pcie_interface_version

uint32_t max_pcie_interface_version

maximum PCIe link generation

Definition: amdsmi.h:694

amdsmi_pcie_info_t::pcie_static_::slot_type

amdsmi_card_form_factor_t slot_type

card form factor

Definition: amdsmi.h:693

amdsmi_pcie_info_t::pcie_static_::max_pcie_speed

uint32_t max_pcie_speed

maximum PCIe speed in GT/s

Definition: amdsmi.h:691

amdsmi_pcie_info_t::pcie_static_::pcie_interface_version

uint32_t pcie_interface_version

PCIe interface version.

Definition: amdsmi.h:692

amdsmi_pcie_info_t

pcie information

Definition: amdsmi.h:688

amdsmi_pf_fb_info_t

PF FB Information.

Definition: amdsmi.h:2295

amdsmi_pf_fb_info_t::pf_fb_reserved

uint32_t pf_fb_reserved

Total fb consumed by PF.

Definition: amdsmi.h:2297

amdsmi_pf_fb_info_t::min_vf_fb_usable

uint32_t min_vf_fb_usable

Minimum usable fb size in MB.

Definition: amdsmi.h:2301

amdsmi_pf_fb_info_t::fb_alignment

uint32_t fb_alignment

FB alignment.

Definition: amdsmi.h:2299

amdsmi_pf_fb_info_t::total_fb_size

uint32_t total_fb_size

Total GPU fb size in MB.

Definition: amdsmi.h:2296

amdsmi_pf_fb_info_t::max_vf_fb_usable

uint32_t max_vf_fb_usable

Maximum usable fb size in MB.

Definition: amdsmi.h:2300

amdsmi_pf_fb_info_t::pf_fb_offset

uint32_t pf_fb_offset

PF FB offset.

Definition: amdsmi.h:2298

amdsmi_power_cap_info_t

Power Cap Information.

Definition: amdsmi.h:764

amdsmi_power_cap_info_t::power_cap

uint64_t power_cap

current power cap Units uW {@linux_bm} or W {@host}

Definition: amdsmi.h:765

amdsmi_power_cap_info_t::dpm_cap

uint64_t dpm_cap

dpm power cap Units MHz {@linux_bm} or Hz {@host}

Definition: amdsmi.h:767

amdsmi_power_cap_info_t::max_power_cap

uint64_t max_power_cap

maximum power cap Units uW {@linux_bm} or W {@host}

Definition: amdsmi.h:769

amdsmi_power_cap_info_t::default_power_cap

uint64_t default_power_cap

default power cap Units uW {@linux_bm} or W {@host}

Definition: amdsmi.h:766

amdsmi_power_cap_info_t::min_power_cap

uint64_t min_power_cap

minimum power cap Units uW {@linux_bm} or W {@host}

Definition: amdsmi.h:768

amdsmi_power_info_t

Power Information.

Definition: amdsmi.h:825

amdsmi_power_info_t::soc_voltage

uint64_t soc_voltage

SOC voltage measurement in mV {@linux_bm} or V {@host}.

Definition: amdsmi.h:830

amdsmi_power_info_t::socket_power

uint64_t socket_power

Current power usage in W {@linux_bm}, uW {@host}.

Definition: amdsmi.h:826

amdsmi_power_info_t::power_limit

uint32_t power_limit

The power limit in W {@linux_bm}, Linux only.

Definition: amdsmi.h:832

amdsmi_power_info_t::mem_voltage

uint64_t mem_voltage

MEM voltage measurement in mV {@linux_bm} or V {@host}.

Definition: amdsmi.h:831

amdsmi_power_info_t::current_socket_power

uint32_t current_socket_power

Current socket power in W {@linux_bm}, Linux only, Mi 300+ Series cards.

Definition: amdsmi.h:827

amdsmi_power_info_t::average_socket_power

uint32_t average_socket_power

Average socket power in W {@linux_bm}, Linux only, Navi + Mi 200 and earlier Series cards.

Definition: amdsmi.h:828

amdsmi_power_info_t::gfx_voltage

uint64_t gfx_voltage

GFX voltage measurement in mV {@linux_bm} or V {@host}.

Definition: amdsmi.h:829

amdsmi_power_info_t::ubb_power

uint32_t ubb_power

The UBB node power in W, MI350X+.

Definition: amdsmi.h:833

amdsmi_profile_caps_info_t

Profile Caps Information.

Definition: amdsmi.h:2412

amdsmi_profile_info_t

Profile Information.

Definition: amdsmi.h:2426

amdsmi_ras_feature_t::ras_info_

Definition: amdsmi.h:1089

amdsmi_ras_feature_t

This structure holds ras feature information.

Definition: amdsmi.h:1083

amdsmi_ras_feature_t::ras_eeprom_version

uint32_t ras_eeprom_version

Definition: amdsmi.h:1084

amdsmi_ras_feature_t::ecc_correction_schema_flag

uint32_t ecc_correction_schema_flag

Definition: amdsmi.h:1086

amdsmi_sched_info_t

Schedule Information.

Definition: amdsmi.h:2377

amdsmi_sched_info_t::boot_up_time

uint64_t boot_up_time

in microseconds

Definition: amdsmi.h:2379

amdsmi_topology_nearest_t

Topology Nearest.

Definition: amdsmi.h:2571

amdsmi_vbios_info_t

VBios Information.

Definition: amdsmi.h:788

amdsmi_version_t

This structure holds version information.

Definition: amdsmi.h:2617

amdsmi_version_t::minor

uint32_t minor

Minor version.

Definition: amdsmi.h:2619

amdsmi_version_t::major

uint32_t major

Major version.

Definition: amdsmi.h:2618

amdsmi_version_t::release

uint32_t release

Patch, build or stepping version.

Definition: amdsmi.h:2620

amdsmi_vf_data_t

VF Data.

Definition: amdsmi.h:2401

amdsmi_vf_fb_info_t

VF FB Information.

Definition: amdsmi.h:2310

amdsmi_vf_fb_info_t::fb_size

uint32_t fb_size

Size in MB Must be divisible by 16 and not less than 256.

Definition: amdsmi.h:2312

amdsmi_vf_fb_info_t::fb_offset

uint32_t fb_offset

Offset in MB from start of the framebuffer.

Definition: amdsmi.h:2311

amdsmi_vf_handle_t

VF Handle.

Definition: amdsmi.h:2258

amdsmi_vf_hbm_info_t

VF HBM Information.

Definition: amdsmi.h:2364

amdsmi_vf_hbm_info_t::phy_size

uint64_t phy_size

physical size represented in bytes

Definition: amdsmi.h:2366

amdsmi_vf_hbm_info_t::numa_id

uint32_t numa_id

NUMA node for driver-managed VF HBM, 0xFFFFFFFF when no NUMA association exists (e....

Definition: amdsmi.h:2367

amdsmi_vf_info_t

VF Information.

Definition: amdsmi.h:2353

amdsmi_vf_info_t::gfx_timeslice

uint32_t gfx_timeslice

Graphics timeslice in us, maximum value is 1000 ms.

Definition: amdsmi.h:2355

amdsmi_vram_info_t

VRam Information.

Definition: amdsmi.h:854

amdsmi_vram_info_t::vram_bit_width

uint32_t vram_bit_width

In bits.

Definition: amdsmi.h:858

amdsmi_vram_info_t::vram_size

uint64_t vram_size

vram size in MB

Definition: amdsmi.h:857

amdsmi_vram_info_t::vram_max_bandwidth

uint64_t vram_max_bandwidth

The VRAM max bandwidth at current memory clock (GB/s)

Definition: amdsmi.h:859

amdsmi_xgmi_fb_sharing_caps_t::cap_

Definition: amdsmi.h:2583

amdsmi_bdf_t

bdf types

Definition: amdsmi.h:667

amdsmi_cper_valid_bits_t

Definition: amdsmi.h:1179

amdsmi_gpu_ras_policy_info_t::policy_data_

Definition: amdsmi.h:1151

amdsmi_nps_caps_t

This union holds memory partition bitmask.

Definition: amdsmi.h:910

amdsmi_xgmi_fb_sharing_caps_t

XGMI FB Sharing Caps.

Definition: amdsmi.h:2582