amdsmi.h Source File

amdsmi.h Source File#

AMD SMI: amdsmi.h Source File
amdsmi.h
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1/*
2 * Copyright Advanced Micro Devices, Inc.
3 *
4 * SPDX-License-Identifier: MIT
5 */
6
7#ifndef __AMDSMI_H__
8#define __AMDSMI_H__
9
15#ifdef __cplusplus
16 #include <cstdint>
17extern "C" {
18#else
19 #include <stdint.h>
20#endif
21
22#include <stdbool.h>
23#include <stddef.h>
24#include <time.h>
25
44
51typedef void *amdsmi_socket_handle;
52
73
86
95typedef enum {
97 // Library usage errors
115 17,
117 18,
120 20,
122 // Processor related errors
128 // Data and size errors
132 41,
135 43,
136 // esmi errors
150 // General errors
154
160#define AMDSMI_MAX_NUM_XGMI_PHYSICAL_LINK 64
161#define AMDSMI_MAX_NUM_PM_POLICIES 32
162#define AMDSMI_MAX_CONTAINER_TYPE 2
163
169#define AMDSMI_MAX_MM_IP_COUNT 8
170#define AMDSMI_MAX_DEVICES 32
171#define AMDSMI_MAX_STRING_LENGTH 256
172#define AMDSMI_MAX_CACHE_TYPES 10
173#define AMDSMI_MAX_CP_PROFILE_RESOURCES 32
174#define AMDSMI_MAX_ACCELERATOR_PARTITIONS 8
175#define AMDSMI_MAX_ACCELERATOR_PROFILE 32
176#define AMDSMI_MAX_NUM_NUMA_NODES 32
177#define AMDSMI_GPU_UUID_SIZE 38
178
184#define AMDSMI_MAX_NUMBER_OF_AFIDS_PER_RECORD 12
185
191#define AMDSMI_MAX_VF_COUNT 32
192#define AMDSMI_MAX_DRIVER_NUM 2
193#define AMDSMI_DFC_FW_NUMBER_OF_ENTRIES 9
194#define AMDSMI_MAX_WHITE_LIST_ELEMENTS \
195 16
196#define AMDSMI_MAX_BLACK_LIST_ELEMENTS \
197 64
198#define AMDSMI_MAX_UUID_ELEMENTS 16
199#define AMDSMI_MAX_TA_WHITE_LIST_ELEMENTS \
200 8
201#define AMDSMI_MAX_ERR_RECORDS 10
202#define AMDSMI_MAX_PROFILE_COUNT 16
203#define AMDSMI_MAX_NUM_FREQUENCIES \
204 33
205
211#define AMDSMI_TIME_FORMAT "%02d:%02d:%02d.%03d"
212#define AMDSMI_DATE_FORMAT "%04d-%02d-%02d:%02d:%02d:%02d.%03d"
213
219typedef void *amdsmi_node_handle;
220
226typedef enum {
227 AMDSMI_MEMORY_PARTITION_UNKNOWN = 0,
242
262
295
309
332
339typedef enum {
341 AMDSMI_TEMPERATURE_TYPE_FIRST = AMDSMI_TEMPERATURE_TYPE_EDGE,
351
352 // GPU Board Node temperature
353 AMDSMI_TEMPERATURE_TYPE_GPUBOARD_NODE_FIRST = 100,
355 AMDSMI_TEMPERATURE_TYPE_GPUBOARD_NODE_FIRST,
364 AMDSMI_TEMPERATURE_TYPE_GPUBOARD_NODE_LAST = 149,
365
366 // GPU Board VR (Voltage Regulator) temperature
367 AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VR_FIRST = 150,
369 AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VR_FIRST,
388 AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VR_LAST = 199,
389
390 // Baseboard System temperature
391 AMDSMI_TEMPERATURE_TYPE_BASEBOARD_FIRST = 200,
393 AMDSMI_TEMPERATURE_TYPE_BASEBOARD_FIRST,
426 AMDSMI_TEMPERATURE_TYPE_BASEBOARD_LAST = 249,
428 AMDSMI_TEMPERATURE_TYPE_BASEBOARD_LAST
430
467
479
496
509
515typedef enum {
517 AMDSMI_GPU_BLOCK_FIRST = (1ULL << 0),
518 AMDSMI_GPU_BLOCK_UMC = AMDSMI_GPU_BLOCK_FIRST,
519 AMDSMI_GPU_BLOCK_SDMA = (1ULL << 1),
520 AMDSMI_GPU_BLOCK_GFX = (1ULL << 2),
524 AMDSMI_GPU_BLOCK_HDP = (1ULL << 6),
526 AMDSMI_GPU_BLOCK_DF = (1ULL << 8),
527 AMDSMI_GPU_BLOCK_SMN = (1ULL << 9),
528 AMDSMI_GPU_BLOCK_SEM = (1ULL << 10),
529 AMDSMI_GPU_BLOCK_MP0 = (1ULL << 11),
530 AMDSMI_GPU_BLOCK_MP1 = (1ULL << 12),
531 AMDSMI_GPU_BLOCK_FUSE = (1ULL << 13),
532 AMDSMI_GPU_BLOCK_MCA = (1ULL << 14),
533 AMDSMI_GPU_BLOCK_VCN = (1ULL << 15),
534 AMDSMI_GPU_BLOCK_JPEG = (1ULL << 16),
535 AMDSMI_GPU_BLOCK_IH = (1ULL << 17),
536 AMDSMI_GPU_BLOCK_MPIO = (1ULL << 18),
537 AMDSMI_GPU_BLOCK_MMSCH = (1ULL << 19),
538 AMDSMI_GPU_BLOCK_MP5 = (1ULL << 20),
539 AMDSMI_GPU_BLOCK_ATU = (1ULL << 21),
541 AMDSMI_GPU_BLOCK_ECLR = (1ULL << 23),
543 AMDSMI_GPU_BLOCK_LSDMA = (1ULL << 25),
544 AMDSMI_GPU_BLOCK_MPART = (1ULL << 26),
545 AMDSMI_GPU_BLOCK_MPIFOE = (1ULL << 27),
546 AMDSMI_GPU_BLOCK_MPRAS = (1ULL << 28),
547 AMDSMI_GPU_BLOCK_NBIF = (1ULL << 29),
548 AMDSMI_GPU_BLOCK_NBIO = (1ULL << 30),
549 AMDSMI_GPU_BLOCK_OXRP = (1ULL << 31),
552 AMDSMI_GPU_BLOCK_PIE = (1ULL << 34),
553 AMDSMI_GPU_BLOCK_CS = (1ULL << 35),
554 AMDSMI_GPU_BLOCK_SHUB = (1ULL << 36),
555 AMDSMI_GPU_BLOCK_SSBDCI = (1ULL << 37),
557 AMDSMI_GPU_BLOCK_LAST = AMDSMI_GPU_BLOCK_UCIE_PCS,
558 AMDSMI_GPU_BLOCK_RESERVED = (1ULL << 63)
560
567typedef enum {
568 AMDSMI_FW_ID_SMU = 1,
570 AMDSMI_FW_ID_FIRST = AMDSMI_FW_ID_SMU,
687 AMDSMI_FW_ID__MAX
689
705
715
721typedef enum { AMDSMI_NPM_STATUS_DISABLED, AMDSMI_NPM_STATUS_ENABLED } amdsmi_npm_status_t;
722
730typedef enum {
731 AMDSMI_COMPUTE_TRAY_TYPE_UNKNOWN = 0,
732 AMDSMI_COMPUTE_TRAY_TYPE_HELIOS_P = 1,
733 AMDSMI_COMPUTE_TRAY_TYPE_HELIOS_R = 2,
734 AMDSMI_COMPUTE_TRAY_TYPE_TITAN = 3,
736
742typedef enum {
743 AMDSMI_LINK_STATUS_ENABLED = 0,
744 AMDSMI_LINK_STATUS_DISABLED = 1,
745 AMDSMI_LINK_STATUS_INACTIVE = 2,
746 AMDSMI_LINK_STATUS_ERROR = 3
748
767
773typedef union {
774 struct bdf_ {
775 uint64_t function_number : 3;
776 uint64_t device_number : 5;
777 uint64_t bus_number : 8;
778 uint64_t domain_number : 48;
779 } bdf;
780 struct {
781 uint64_t function_number : 3;
782 uint64_t device_number : 5;
783 uint64_t bus_number : 8;
784 uint64_t domain_number : 48;
785 };
786 uint64_t as_uint;
788
794typedef struct {
796 uint16_t max_pcie_width;
797 uint32_t max_pcie_speed;
801 uint64_t reserved[9];
802 } pcie_static;
804 uint16_t pcie_width;
805 uint32_t pcie_speed;
806 uint32_t pcie_bandwidth;
817 uint64_t reserved[12];
818 } pcie_metric;
819 uint64_t reserved[32];
821
827typedef struct {
829 uint32_t num_supported;
830 uint32_t current;
831 uint64_t frequency[AMDSMI_MAX_NUM_FREQUENCIES];
835
850
856typedef struct {
857 uint32_t num_links;
868 uint64_t reserved[7];
870
876typedef struct {
877 uint64_t power_cap;
879 uint64_t dpm_cap;
880 uint64_t min_power_cap;
881 uint64_t max_power_cap;
882 uint64_t reserved[3];
884
894
900typedef struct {
901 char name[AMDSMI_MAX_STRING_LENGTH];
902 char build_date[AMDSMI_MAX_STRING_LENGTH];
903 char part_number[AMDSMI_MAX_STRING_LENGTH];
904 char version[AMDSMI_MAX_STRING_LENGTH];
905 char boot_firmware[AMDSMI_MAX_STRING_LENGTH];
907 uint64_t reserved[36];
909
915// clang-format off
916typedef struct {
917 char market_name[AMDSMI_MAX_STRING_LENGTH];
918 uint32_t vendor_id;
919 char vendor_name[AMDSMI_MAX_STRING_LENGTH];
920 uint32_t subvendor_id;
921 uint64_t device_id;
922 uint32_t rev_id;
923 char asic_serial[AMDSMI_MAX_STRING_LENGTH];
924 uint32_t oam_id;
926 uint64_t
931 uint32_t subsystem_id;
932 uint64_t flags;
935 uint32_t reserved[17];
937// clang-format on
938
946typedef struct {
947 uint64_t socket_power;
952 uint64_t gfx_voltage;
953 uint64_t soc_voltage;
954 uint64_t mem_voltage;
955 uint32_t power_limit;
956 uint32_t ubb_power;
957 uint64_t reserved[18];
959
965typedef struct {
966 char driver_version[AMDSMI_MAX_STRING_LENGTH];
967 char driver_date[AMDSMI_MAX_STRING_LENGTH];
968 char driver_name[AMDSMI_MAX_STRING_LENGTH];
969 uint64_t reserved[64];
971
977typedef enum {
978 AMDSMI_DRIVER_MODEL_TYPE_WDDM = 0,
979 AMDSMI_DRIVER_MODEL_TYPE_WDM = 1,
980 AMDSMI_DRIVER_MODEL_TYPE_MCDM = 2,
981 AMDSMI_DRIVER_MODEL_TYPE__MAX = 3,
983
989typedef struct {
990 amdsmi_vram_type_t vram_type;
991 char vram_vendor[AMDSMI_MAX_STRING_LENGTH];
992 uint64_t vram_size;
993 uint32_t vram_bit_width;
995 uint64_t reserved[37];
997
1007typedef struct {
1008 uint32_t gfx_activity;
1009 uint32_t umc_activity;
1010 uint32_t mm_activity;
1011 uint32_t reserved[13];
1013
1019typedef struct {
1020 uint32_t clk;
1021 uint32_t min_clk;
1022 uint32_t max_clk;
1023 uint8_t clk_locked;
1025 uint32_t reserved[4];
1027
1033typedef struct {
1037 uint64_t reserved[5];
1039
1045typedef union {
1046 struct nps_flags_ {
1047 uint32_t nps1_cap : 1;
1048 uint32_t nps2_cap : 1;
1049 uint32_t nps4_cap : 1;
1050 uint32_t nps8_cap : 1;
1051 uint32_t reserved : 28;
1052 } nps_flags;
1053 uint32_t nps_cap_mask;
1055
1062typedef struct {
1063 amdsmi_nps_caps_t partition_caps;
1065 uint32_t num_numa_ranges;
1067 amdsmi_vram_type_t memory_type;
1068 uint64_t start;
1069 uint64_t end;
1070 } numa_range[AMDSMI_MAX_NUM_NUMA_NODES];
1071 uint64_t reserved[11];
1073
1089
1096typedef struct {
1097 uint32_t profile_index;
1100 uint32_t
1102 uint64_t reserved[6];
1104
1110typedef struct {
1111 uint32_t num_profiles;
1112 uint32_t num_resource_profiles;
1114 resource_profiles[AMDSMI_MAX_CP_PROFILE_RESOURCES];
1117 uint64_t reserved[30];
1119
1125typedef struct {
1126 char model_number[AMDSMI_MAX_STRING_LENGTH];
1127 char product_serial[AMDSMI_MAX_STRING_LENGTH];
1128 char fru_id[AMDSMI_MAX_STRING_LENGTH];
1129 char product_name[AMDSMI_MAX_STRING_LENGTH];
1130 char manufacturer_name[AMDSMI_MAX_STRING_LENGTH];
1131 uint64_t reserved[64];
1133
1146
1152typedef struct {
1154 uint64_t limit;
1156 uint64_t reserved[5];
1158
1164typedef struct {
1170 uint32_t reserved[14];
1172
1178typedef struct {
1179 uint32_t num_cache_types;
1180 struct cache_ {
1182 uint32_t cache_size;
1183 uint32_t cache_level;
1184 //clang-format off
1187 //clang-format on
1189 uint32_t reserved[3];
1190 } cache[AMDSMI_MAX_CACHE_TYPES];
1191 uint32_t reserved[15];
1193
1199typedef struct {
1200 uint8_t num_fw_info;
1202 amdsmi_fw_block_t fw_id;
1203 uint64_t fw_version;
1204 uint64_t reserved[2];
1205 } fw_info_list[AMDSMI_FW_ID__MAX];
1206 uint32_t reserved[7];
1208
1214typedef struct {
1215 uint32_t policy_id;
1216 char policy_description[AMDSMI_MAX_STRING_LENGTH];
1218
1231
1237typedef struct {
1240 uint32_t
1244 struct ras_info_ {
1245 uint32_t dram_ecc : 1;
1246 uint32_t sram_ecc : 1;
1247 uint32_t poisoning : 1;
1248 uint32_t rsvd : 29;
1249 } ras_info;
1250 bool needs_reboot;
1252
1265
1271typedef enum {
1272 AMDSMI_CPER_NOTIFY_TYPE_CMC = 0x450eBDD72DCE8BB1,
1273 AMDSMI_CPER_NOTIFY_TYPE_CPE = 0x4a55D8434E292F96,
1274 AMDSMI_CPER_NOTIFY_TYPE_MCE = 0x4cc5919CE8F56FFE,
1275 AMDSMI_CPER_NOTIFY_TYPE_PCIE = 0x4dfc1A16CF93C01F,
1276 AMDSMI_CPER_NOTIFY_TYPE_INIT = 0x454a9308CC5263E8,
1277 AMDSMI_CPER_NOTIFY_TYPE_NMI = 0x42c9B7E65BAD89FF,
1278 AMDSMI_CPER_NOTIFY_TYPE_BOOT = 0x409aAB403D61A466,
1279 AMDSMI_CPER_NOTIFY_TYPE_DMAR = 0x4c27C6B3667DD791,
1280 AMDSMI_CPER_NOTIFY_TYPE_SEA = 0x11E4BBE89A78788A,
1281 AMDSMI_CPER_NOTIFY_TYPE_SEI = 0x4E87B0AE5C284C81,
1282 AMDSMI_CPER_NOTIFY_TYPE_PEI = 0x4214520409A9D5AC,
1283 AMDSMI_CPER_NOTIFY_TYPE_CXL_COMPONENT = 0x49A341DF69293BC9
1286
1296
1310
1317typedef struct {
1318 uint8_t major_version;
1319 uint8_t minor_version;
1323 uint64_t
1324 info[5];
1325 } policy_data;
1327
1328#pragma pack(push, 1)
1329
1335typedef struct {
1336 unsigned char b[16];
1338
1339typedef struct {
1340 uint8_t seconds;
1341 uint8_t minutes;
1342 uint8_t hours;
1343 uint8_t flag;
1344 uint8_t day;
1345 uint8_t month;
1346 uint8_t year;
1347 uint8_t century;
1349
1350typedef union {
1352 uint32_t platform_id : 1;
1353 uint32_t timestamp : 1;
1354 uint32_t partition_id : 1;
1355 uint32_t reserved : 29;
1356 } valid_bits;
1357 uint32_t valid_mask;
1359
1360typedef struct {
1361 char signature[4];
1362 uint16_t revision;
1363 uint32_t signature_end;
1364 uint16_t sec_cnt;
1365 amdsmi_cper_sev_t error_severity;
1366 amdsmi_cper_valid_bits_t cper_valid_bits;
1367 uint32_t record_length;
1368 amdsmi_cper_timestamp_t timestamp;
1369 char platform_id[16];
1371 char creator_id[16];
1373 char record_id[8];
1374 uint32_t flags;
1376 uint8_t reserved[12];
1378
1379#pragma pack(pop)
1380
1399
1405#define AMDSMI_FABRIC_TELEMETRY_CATEGORY_MASK_UALOE (1U << AMDSMI_FABRIC_TELEMETRY_CATEGORY_UALOE)
1406#define AMDSMI_FABRIC_TELEMETRY_CATEGORY_MASK_SWITCH (1U << AMDSMI_FABRIC_TELEMETRY_CATEGORY_SWITCH)
1407#define AMDSMI_FABRIC_TELEMETRY_CATEGORY_MASK_CRYPTO (1U << AMDSMI_FABRIC_TELEMETRY_CATEGORY_CRYPTO)
1408#define AMDSMI_FABRIC_TELEMETRY_CATEGORY_MASK_PFC (1U << AMDSMI_FABRIC_TELEMETRY_CATEGORY_PFC)
1409#define AMDSMI_FABRIC_TELEMETRY_CATEGORY_MASK_NETPORT \
1410 (1U << AMDSMI_FABRIC_TELEMETRY_CATEGORY_NETPORT)
1411#define AMDSMI_FABRIC_TELEMETRY_CATEGORY_MASK_DERIVED_UALOE \
1412 (1U << AMDSMI_FABRIC_TELEMETRY_CATEGORY_DERIVED_UALOE)
1413#define AMDSMI_FABRIC_TELEMETRY_CATEGORY_MASK_DERIVED_NETPORT \
1414 (1U << AMDSMI_FABRIC_TELEMETRY_CATEGORY_DERIVED_NETPORT)
1415#define AMDSMI_FABRIC_TELEMETRY_CATEGORY_MASK_IFOE_DEBUG \
1416 (1U << AMDSMI_FABRIC_TELEMETRY_CATEGORY_IFOE_DEBUG)
1417#define AMDSMI_FABRIC_TELEMETRY_CATEGORY_MASK_PHY (1U << AMDSMI_FABRIC_TELEMETRY_CATEGORY_PHY)
1418
1424typedef struct {
1425 uint64_t id;
1426 uint64_t value;
1428
1436#define AMDSMI_FABRIC_LABEL_MAX_LENGTH \
1437 32
1441
1455
1470
1484
1496
1502typedef enum {
1503 AMDSMI_FABRIC_NPA_ADDRESS_MODE_SOURCE_ALIASING,
1504 AMDSMI_FABRIC_NPA_ADDRESS_MODE_SOURCE_IDENTIFICATION,
1505 AMDSMI_FABRIC_NPA_ADDRESS_MODE_UNKNOWN
1507
1513typedef enum {
1514 AMDSMI_FABRIC_ACCELERATOR_VPOD_STATE_UNCONFIGURED,
1515 AMDSMI_FABRIC_ACCELERATOR_VPOD_STATE_CONFIGURED,
1516 AMDSMI_FABRIC_ACCELERATOR_VPOD_STATE_READY,
1517 AMDSMI_FABRIC_ACCELERATOR_VPOD_STATE_ACTIVE,
1518 AMDSMI_FABRIC_ACCELERATOR_VPOD_STATE_ERROR,
1519 AMDSMI_FABRIC_ACCELERATOR_VPOD_STATE_UNKNOWN
1521
1527#define AMDSMI_FABRIC_PPOD_CONFIG_V1 1
1528#define AMDSMI_FABRIC_VPOD_CONFIG_V1 1
1529#define AMDSMI_FABRIC_STATION_CONFIG_V1 1
1530
1536#define AMDSMI_FABRIC_PPOD_FIELD_ACCEL_ID (1u << 0)
1537#define AMDSMI_FABRIC_PPOD_FIELD_PPOD_ID (1u << 1)
1538#define AMDSMI_FABRIC_PPOD_FIELD_PPOD_SIZE (1u << 2)
1539#define AMDSMI_FABRIC_PPOD_FIELD_LOCAL_ACCELS (1u << 3)
1540#define AMDSMI_FABRIC_PPOD_FIELD_BANDWIDTH (1u << 4)
1541#define AMDSMI_FABRIC_PPOD_FIELD_LATENCY (1u << 5)
1542
1548#define AMDSMI_FABRIC_VPOD_FIELD_VPOD_ID (1u << 0)
1549#define AMDSMI_FABRIC_VPOD_FIELD_VPOD_SIZE (1u << 1)
1550#define AMDSMI_FABRIC_VPOD_FIELD_VPOD_ACTIVE_ACCELS (1u << 2)
1551#define AMDSMI_FABRIC_VPOD_FIELD_ADDR_MODE (1u << 3)
1552
1558#define AMDSMI_FABRIC_DF_FIELD_STATION_FLAGS (1u << 0)
1559#define AMDSMI_FABRIC_DF_FIELD_LANE_EN_BITMAP (1u << 1)
1560#define AMDSMI_FABRIC_DF_FIELD_NUM_STATIONS (1u << 2)
1561
1571typedef struct {
1573 uint8_t ppod_id[AMDSMI_MAX_UUID_ELEMENTS];
1574 uint32_t ppod_size;
1575 uint32_t local_accelerators[AMDSMI_FABRIC_MAX_LOCAL_GPUS];
1577 uint32_t bandwidth;
1578 uint32_t latency;
1580
1598
1607typedef struct {
1608 uint32_t station_flags;
1610 uint8_t lane_en_bitmap[AMDSMI_FABRIC_MAX_BITMAP_SIZE];
1613
1624
1641
1647typedef struct {
1649 uint32_t fabric_version;
1652 } fabric_info;
1653 uint32_t reserved[15];
1655
1667
1673typedef struct {
1674 uint32_t version;
1675 uint32_t mask;
1676 bool commit;
1679
1685typedef struct {
1686 uint32_t version;
1687 uint32_t mask;
1688 bool commit;
1691
1697#define SMI_VERSION_ALPHA_0 0x00000002
1698#define SMI_VERSION_BETA_0 0x00000003
1699#define SMI_VERSION_BETA_1 0x00000004
1700#define SMI_VERSION_BETA_2 0x00000005
1701#define SMI_VERSION_BETA_3 0x00000006
1702#define SMI_VERSION_BETA_4 0x00000007
1703
1711#define AMDSMI_MASK_ALL (~0ULL)
1712
1714#define AMDSMI_MASK_DEFAULT ((1ULL << 62) - 1)
1715
1717#define AMDSMI_MASK_INIT (0ULL)
1718
1720#define AMDSMI_MASK_HIGH_AND_MED_SEVERITY (~((1ULL << 61) - 1))
1721
1727#define AMDSMI_MASK_HIGH_ERROR_SEVERITY_ONLY(mask) (mask & ((1ULL << 60) - 1))
1728#define AMDSMI_MASK_INCLUDE_MED_ERROR_SEVERITY(mask) (mask | (1ULL << 60))
1729#define AMDSMI_MASK_INCLUDE_LOW_ERROR_SEVERITY(mask) (mask | (1ULL << 61))
1730#define AMDSMI_MASK_INCLUDE_WARN_SEVERITY(mask) (mask | (1ULL << 62))
1731#define AMDSMI_MASK_INCLUDE_INFO_SEVERITY(mask) (mask | (1ULL << 63))
1732
1738#define AMDSMI_MASK_HIGH_SEVERITY_ONLY(mask) (mask & ((1ULL << 62) - 1))
1739#define AMDSMI_MASK_INCLUDE_MED_SEVERITY(mask) AMDSMI_MASK_INCLUDE_WARN_SEVERITY(mask)
1740#define AMDSMI_MASK_INCLUDE_LOW_SEVERITY(mask) AMDSMI_MASK_INCLUDE_INFO_SEVERITY(mask)
1741
1742#define AMDSMI_MASK_INCLUDE_CATEGORY(mask, cate) (mask | (1ULL << cate))
1743#define AMDSMI_MASK_EXCLUDE_CATEGORY(mask, cate) (mask & (~(1ULL << cate)))
1744
1745#define AMDSMI_MAX_FB_SHARING_GROUPS 64
1746#define AMDSMI_MAX_NUM_CONNECTED_NODES 64
1747
1748#define AMDSMI_MAX_NUM_METRICS_V1 255
1749#define AMDSMI_MAX_NUM_METRICS_V2 512
1750#define AMDSMI_MAX_NUM_METRICS AMDSMI_MAX_NUM_METRICS_V2
1751
1752#define AMDSMI_MAX_BAD_PAGE_RECORD_V1 512
1753#define AMDSMI_MAX_BAD_PAGE_RECORD_V2 16384
1754#define AMDSMI_MAX_BAD_PAGE_RECORD AMDSMI_MAX_BAD_PAGE_RECORD_V2
1755
1756#define AMDSMI_FABRIC_PPOD_ID_SIZE 16
1757
1764#define AMDSMI_FABRIC_VERSION_MAJOR(v) ((uint16_t)(((v) >> 16) & 0xFFFFu))
1765#define AMDSMI_FABRIC_VERSION_MINOR(v) ((uint16_t)((v) & 0xFFFFu))
1766
1772#define AMDSMI_MAX_DATE_STRING_LENGTH 32
1773
1779typedef void *amdsmi_event_set;
1780
1786typedef enum {
1787 AMDSMI_EVENT_CATEGORY_NON_USED = 0,
1788 AMDSMI_EVENT_CATEGORY_DRIVER = 1,
1789 AMDSMI_EVENT_CATEGORY_RESET = 2,
1790 AMDSMI_EVENT_CATEGORY_SCHED = 3,
1791 AMDSMI_EVENT_CATEGORY_VBIOS = 4,
1792 AMDSMI_EVENT_CATEGORY_ECC = 5,
1793 AMDSMI_EVENT_CATEGORY_PP = 6,
1794 AMDSMI_EVENT_CATEGORY_IOV = 7,
1795 AMDSMI_EVENT_CATEGORY_VF = 8,
1796 AMDSMI_EVENT_CATEGORY_FW = 9,
1797 AMDSMI_EVENT_CATEGORY_GPU = 10,
1798 AMDSMI_EVENT_CATEGORY_GUARD = 11,
1799 AMDSMI_EVENT_CATEGORY_GPUMON = 12,
1800 AMDSMI_EVENT_CATEGORY_MMSCH = 13,
1801 AMDSMI_EVENT_CATEGORY_XGMI = 14,
1802 AMDSMI_EVENT_CATEGORY__MAX
1804
1810typedef enum {
1811 AMDSMI_EVENT_GPU_DEVICE_LOST = 0,
1812 AMDSMI_EVENT_GPU_NOT_SUPPORTED,
1813 AMDSMI_EVENT_GPU_RMA,
1814 AMDSMI_EVENT_GPU_NOT_INITIALIZED,
1815 AMDSMI_EVENT_GPU_MMSCH_ABNORMAL_STATE,
1816 AMDSMI_EVENT_GPU_RLCV_ABNORMAL_STATE,
1817 AMDSMI_EVENT_GPU_SDMA_ENGINE_BUSY,
1818 AMDSMI_EVENT_GPU_RLC_ENGINE_BUSY,
1819 AMDSMI_EVENT_GPU_GC_ENGINE_BUSY,
1820 AMDSMI_EVENT_GPU__MAX
1822
1828typedef enum {
1829 AMDSMI_EVENT_DRIVER_SPIN_LOCK_BUSY = 0,
1830 AMDSMI_EVENT_DRIVER_ALLOC_SYSTEM_MEM_FAIL,
1831 AMDSMI_EVENT_DRIVER_CREATE_GFX_WORKQUEUE_FAIL,
1832 AMDSMI_EVENT_DRIVER_CREATE_MM_WORKQUEUE_FAIL,
1833 AMDSMI_EVENT_DRIVER_BUFFER_OVERFLOW,
1834
1835 AMDSMI_EVENT_DRIVER_DEV_INIT_FAIL,
1836 AMDSMI_EVENT_DRIVER_CREATE_THREAD_FAIL,
1837 AMDSMI_EVENT_DRIVER_NO_ACCESS_PCI_REGION,
1838 AMDSMI_EVENT_DRIVER_MMIO_FAIL,
1839 AMDSMI_EVENT_DRIVER_INTERRUPT_INIT_FAIL,
1840
1841 AMDSMI_EVENT_DRIVER_INVALID_VALUE,
1842 AMDSMI_EVENT_DRIVER_CREATE_MUTEX_FAIL,
1843 AMDSMI_EVENT_DRIVER_CREATE_TIMER_FAIL,
1844 AMDSMI_EVENT_DRIVER_CREATE_EVENT_FAIL,
1845 AMDSMI_EVENT_DRIVER_CREATE_SPIN_LOCK_FAIL,
1846
1847 AMDSMI_EVENT_DRIVER_ALLOC_FB_MEM_FAIL,
1848 AMDSMI_EVENT_DRIVER_ALLOC_DMA_MEM_FAIL,
1849 AMDSMI_EVENT_DRIVER_NO_FB_MANAGER,
1850 AMDSMI_EVENT_DRIVER_HW_INIT_FAIL,
1851 AMDSMI_EVENT_DRIVER_SW_INIT_FAIL,
1852
1853 AMDSMI_EVENT_DRIVER_INIT_CONFIG_ERROR,
1854 AMDSMI_EVENT_DRIVER_ERROR_LOGGING_FAILED,
1855 AMDSMI_EVENT_DRIVER_CREATE_RWLOCK_FAIL,
1856 AMDSMI_EVENT_DRIVER_CREATE_RWSEMA_FAIL,
1857 AMDSMI_EVENT_DRIVER_GET_READ_LOCK_FAIL,
1858
1859 AMDSMI_EVENT_DRIVER_GET_WRITE_LOCK_FAIL,
1860 AMDSMI_EVENT_DRIVER_GET_READ_SEMA_FAIL,
1861 AMDSMI_EVENT_DRIVER_GET_WRITE_SEMA_FAIL,
1862
1863 AMDSMI_EVENT_DRIVER_DIAG_DATA_INIT_FAIL,
1864 AMDSMI_EVENT_DRIVER_DIAG_DATA_MEM_REQ_FAIL,
1865 AMDSMI_EVENT_DRIVER_DIAG_DATA_VADDR_REQ_FAIL,
1866 AMDSMI_EVENT_DRIVER_DIAG_DATA_BUS_ADDR_REQ_FAIL,
1867
1868 AMDSMI_EVENT_DRIVER_REMOTE_DEBUG_INIT_FAIL,
1869 AMDSMI_EVENT_DRIVER_REMOTE_DEBUG_MEM_REQ_FAIL,
1870 AMDSMI_EVENT_DRIVER_REMOTE_DEBUG_VADDR_REQ_FAIL,
1871 AMDSMI_EVENT_DRIVER_REMOTE_DEBUG_BUS_ADDR_REQ_FAIL,
1872
1873 AMDSMI_EVENT_DRIVER_HRTIMER_START_FAIL,
1874 AMDSMI_EVENT_DRIVER_CREATE_DRIVER_FILE_FAIL,
1875 AMDSMI_EVENT_DRIVER_CREATE_DEVICE_FILE_FAIL,
1876 AMDSMI_EVENT_DRIVER_CREATE_DEBUGFS_FILE_FAIL,
1877 AMDSMI_EVENT_DRIVER_CREATE_DEBUGFS_DIR_FAIL,
1878
1879 AMDSMI_EVENT_DRIVER_PCI_ENABLE_DEVICE_FAIL,
1880 AMDSMI_EVENT_DRIVER_FB_MAP_FAIL,
1881 AMDSMI_EVENT_DRIVER_DOORBELL_MAP_FAIL,
1882 AMDSMI_EVENT_DRIVER_PCI_REGISTER_DRIVER_FAIL,
1883
1884 AMDSMI_EVENT_DRIVER_ALLOC_IOVA_ALIGN_FAIL,
1885
1886 AMDSMI_EVENT_DRIVER_ROM_MAP_FAIL,
1887 AMDSMI_EVENT_DRIVER_FULL_ACCESS_TIMEOUT,
1888
1889 AMDSMI_EVENT_DRIVER__MAX
1891
1897typedef enum {
1898 AMDSMI_EVENT_FW_CMD_ALLOC_BUF_FAIL = 0,
1899 AMDSMI_EVENT_FW_CMD_BUF_PREP_FAIL,
1900 AMDSMI_EVENT_FW_RING_INIT_FAIL,
1901 AMDSMI_EVENT_FW_FW_APPLY_SECURITY_POLICY_FAIL,
1902 AMDSMI_EVENT_FW_START_RING_FAIL,
1903
1904 AMDSMI_EVENT_FW_FW_LOAD_FAIL,
1905 AMDSMI_EVENT_FW_EXIT_FAIL,
1906 AMDSMI_EVENT_FW_INIT_FAIL,
1907 AMDSMI_EVENT_FW_CMD_SUBMIT_FAIL,
1908 AMDSMI_EVENT_FW_CMD_FENCE_WAIT_FAIL,
1909
1910 AMDSMI_EVENT_FW_TMR_LOAD_FAIL,
1911 AMDSMI_EVENT_FW_TOC_LOAD_FAIL,
1912 AMDSMI_EVENT_FW_RAS_LOAD_FAIL,
1913 AMDSMI_EVENT_FW_RAS_UNLOAD_FAIL,
1914 AMDSMI_EVENT_FW_RAS_TA_INVOKE_FAIL,
1915 AMDSMI_EVENT_FW_RAS_TA_ERR_INJECT_FAIL,
1916
1917 AMDSMI_EVENT_FW_ASD_LOAD_FAIL,
1918 AMDSMI_EVENT_FW_ASD_UNLOAD_FAIL,
1919 AMDSMI_EVENT_FW_AUTOLOAD_FAIL,
1920 AMDSMI_EVENT_FW_VFGATE_FAIL,
1921
1922 AMDSMI_EVENT_FW_XGMI_LOAD_FAIL,
1923 AMDSMI_EVENT_FW_XGMI_UNLOAD_FAIL,
1924 AMDSMI_EVENT_FW_XGMI_TA_INVOKE_FAIL,
1925
1926 AMDSMI_EVENT_FW_TMR_INIT_FAIL,
1927 AMDSMI_EVENT_FW_NOT_SUPPORTED_FEATURE,
1928 AMDSMI_EVENT_FW_GET_PSP_TRACELOG_FAIL,
1929
1930 AMDSMI_EVENT_FW_SET_SNAPSHOT_ADDR_FAIL,
1931 AMDSMI_EVENT_FW_SNAPSHOT_TRIGGER_FAIL,
1932
1933 AMDSMI_EVENT_FW_MIGRATION_GET_PSP_INFO_FAIL,
1934 AMDSMI_EVENT_FW_MIGRATION_EXPORT_FAIL,
1935 AMDSMI_EVENT_FW_MIGRATION_IMPORT_FAIL,
1936
1937 AMDSMI_EVENT_FW_BL_FAIL,
1938 AMDSMI_EVENT_FW_RAS_BOOT_FAIL,
1939 AMDSMI_EVENT_FW_MAILBOX_ERROR,
1940
1941 AMDSMI_EVENT_FW__MAX
1943
1944#define AMDSMI_EVENT_FW_FW_INIT_FAIL AMDSMI_EVENT_FW_RING_INIT_FAIL
1945
1951typedef enum {
1952 AMDSMI_EVENT_RESET_GPU = 0,
1953 AMDSMI_EVENT_RESET_GPU_FAILED,
1954 AMDSMI_EVENT_RESET_FLR,
1955 AMDSMI_EVENT_RESET_FLR_FAILED,
1956 AMDSMI_EVENT_RESET__MAX
1958
1964typedef enum {
1965 AMDSMI_EVENT_IOV_NO_GPU_IOV_CAP = 0,
1966 AMDSMI_EVENT_IOV_ASIC_NO_SRIOV_SUPPORT,
1967 AMDSMI_EVENT_IOV_ENABLE_SRIOV_FAIL,
1968 AMDSMI_EVENT_IOV_CMD_TIMEOUT,
1969 AMDSMI_EVENT_IOV_CMD_ERROR,
1970
1971 AMDSMI_EVENT_IOV_INIT_IV_RING_FAIL,
1972 AMDSMI_EVENT_IOV_SRIOV_STRIDE_ERROR,
1973 AMDSMI_EVENT_IOV_WS_SAVE_TIMEOUT,
1974 AMDSMI_EVENT_IOV_WS_IDLE_TIMEOUT,
1975 AMDSMI_EVENT_IOV_WS_RUN_TIMEOUT,
1976 AMDSMI_EVENT_IOV_WS_LOAD_TIMEOUT,
1977 AMDSMI_EVENT_IOV_WS_SHUTDOWN_TIMEOUT,
1978 AMDSMI_EVENT_IOV_WS_ALREADY_SHUTDOWN,
1979 AMDSMI_EVENT_IOV_WS_INFINITE_LOOP,
1980 AMDSMI_EVENT_IOV_WS_REENTRANT_ERROR,
1981 AMDSMI_EVENT_IOV__MAX
1983
1989typedef enum {
1990 AMDSMI_EVENT_ECC_UCE = 0,
1991 AMDSMI_EVENT_ECC_CE,
1992 AMDSMI_EVENT_ECC_IN_PF_FB,
1993 AMDSMI_EVENT_ECC_IN_CRI_REG,
1994 AMDSMI_EVENT_ECC_IN_VF_CRI,
1995 AMDSMI_EVENT_ECC_REACH_THD,
1996 AMDSMI_EVENT_ECC_VF_CE,
1997 AMDSMI_EVENT_ECC_VF_UE,
1998 AMDSMI_EVENT_ECC_IN_SAME_ROW,
1999 AMDSMI_EVENT_ECC_UMC_UE,
2000 AMDSMI_EVENT_ECC_GFX_CE,
2001 AMDSMI_EVENT_ECC_GFX_UE,
2002 AMDSMI_EVENT_ECC_SDMA_CE,
2003 AMDSMI_EVENT_ECC_SDMA_UE,
2004 AMDSMI_EVENT_ECC_GFX_CE_TOTAL,
2005 AMDSMI_EVENT_ECC_GFX_UE_TOTAL,
2006 AMDSMI_EVENT_ECC_SDMA_CE_TOTAL,
2007 AMDSMI_EVENT_ECC_SDMA_UE_TOTAL,
2008 AMDSMI_EVENT_ECC_UMC_CE_TOTAL,
2009 AMDSMI_EVENT_ECC_UMC_UE_TOTAL,
2010 AMDSMI_EVENT_ECC_MMHUB_CE,
2011 AMDSMI_EVENT_ECC_MMHUB_UE,
2012 AMDSMI_EVENT_ECC_MMHUB_CE_TOTAL,
2013 AMDSMI_EVENT_ECC_MMHUB_UE_TOTAL,
2014 AMDSMI_EVENT_ECC_XGMI_WAFL_CE,
2015 AMDSMI_EVENT_ECC_XGMI_WAFL_UE,
2016 AMDSMI_EVENT_ECC_XGMI_WAFL_CE_TOTAL,
2017 AMDSMI_EVENT_ECC_XGMI_WAFL_UE_TOTAL,
2018 AMDSMI_EVENT_ECC_FATAL_ERROR,
2019 AMDSMI_EVENT_ECC_POISON_CONSUMPTION,
2020 AMDSMI_EVENT_ECC_ACA_DUMP,
2021 AMDSMI_EVENT_ECC_WRONG_SOCKET_ID,
2022 AMDSMI_EVENT_ECC_ACA_UNKNOWN_BLOCK_INSTANCE,
2023 AMDSMI_EVENT_ECC_UNKNOWN_CHIPLET_CE,
2024 AMDSMI_EVENT_ECC_UNKNOWN_CHIPLET_UE,
2025 AMDSMI_EVENT_ECC_UMC_CHIPLET_CE,
2026 AMDSMI_EVENT_ECC_UMC_CHIPLET_UE,
2027 AMDSMI_EVENT_ECC_GFX_CHIPLET_CE,
2028 AMDSMI_EVENT_ECC_GFX_CHIPLET_UE,
2029 AMDSMI_EVENT_ECC_SDMA_CHIPLET_CE,
2030 AMDSMI_EVENT_ECC_SDMA_CHIPLET_UE,
2031 AMDSMI_EVENT_ECC_MMHUB_CHIPLET_CE,
2032 AMDSMI_EVENT_ECC_MMHUB_CHIPLET_UE,
2033 AMDSMI_EVENT_ECC_XGMI_WAFL_CHIPLET_CE,
2034 AMDSMI_EVENT_ECC_XGMI_WAFL_CHIPLET_UE,
2035 AMDSMI_EVENT_ECC_EEPROM_ENTRIES_FOUND,
2036 AMDSMI_EVENT_ECC_UMC_DE,
2037 AMDSMI_EVENT_ECC_UMC_DE_TOTAL,
2038 AMDSMI_EVENT_ECC_UNKNOWN,
2039 AMDSMI_EVENT_ECC_EEPROM_REACH_THD,
2040 AMDSMI_EVENT_ECC_UMC_CHIPLET_DE,
2041 AMDSMI_EVENT_ECC_UNKNOWN_CHIPLET_DE,
2042 AMDSMI_EVENT_ECC_EEPROM_CHK_MISMATCH,
2043 AMDSMI_EVENT_ECC_EEPROM_RESET,
2044 AMDSMI_EVENT_ECC_EEPROM_RESET_FAILED,
2045 AMDSMI_EVENT_ECC_EEPROM_APPEND,
2046 AMDSMI_EVENT_ECC_THD_CHANGED,
2047 AMDSMI_EVENT_ECC_DUP_ENTRIES,
2048 AMDSMI_EVENT_ECC_EEPROM_WRONG_HDR,
2049 AMDSMI_EVENT_ECC_EEPROM_WRONG_VER,
2050 AMDSMI_EVENT_ECC__MAX
2052
2058typedef enum {
2059 AMDSMI_EVENT_PP_SET_DPM_POLICY_FAIL = 0,
2060 AMDSMI_EVENT_PP_ACTIVATE_DPM_POLICY_FAIL,
2061 AMDSMI_EVENT_PP_I2C_SLAVE_NOT_PRESENT,
2062 AMDSMI_EVENT_PP_THROTTLER_EVENT,
2063 AMDSMI_EVENT_PP__MAX
2065
2071typedef enum {
2072 AMDSMI_EVENT_SCHED_WORLD_SWITCH_FAIL = 0,
2073 AMDSMI_EVENT_SCHED_DISABLE_AUTO_HW_SWITCH_FAIL,
2074 AMDSMI_EVENT_SCHED_ENABLE_AUTO_HW_SWITCH_FAIL,
2075 AMDSMI_EVENT_SCHED_GFX_SAVE_REG_FAIL,
2076 AMDSMI_EVENT_SCHED_GFX_IDLE_REG_FAIL,
2077
2078 AMDSMI_EVENT_SCHED_GFX_RUN_REG_FAIL,
2079 AMDSMI_EVENT_SCHED_GFX_LOAD_REG_FAIL,
2080 AMDSMI_EVENT_SCHED_GFX_INIT_REG_FAIL,
2081 AMDSMI_EVENT_SCHED_MM_SAVE_REG_FAIL,
2082 AMDSMI_EVENT_SCHED_MM_IDLE_REG_FAIL,
2083
2084 AMDSMI_EVENT_SCHED_MM_RUN_REG_FAIL,
2085 AMDSMI_EVENT_SCHED_MM_LOAD_REG_FAIL,
2086 AMDSMI_EVENT_SCHED_MM_INIT_REG_FAIL,
2087 AMDSMI_EVENT_SCHED_INIT_GPU_FAIL,
2088 AMDSMI_EVENT_SCHED_RUN_GPU_FAIL,
2089
2090 AMDSMI_EVENT_SCHED_SAVE_GPU_STATE_FAIL,
2091 AMDSMI_EVENT_SCHED_LOAD_GPU_STATE_FAIL,
2092 AMDSMI_EVENT_SCHED_IDLE_GPU_FAIL,
2093 AMDSMI_EVENT_SCHED_FINI_GPU_FAIL,
2094 AMDSMI_EVENT_SCHED_DEAD_VF,
2095
2096 AMDSMI_EVENT_SCHED_EVENT_QUEUE_FULL,
2097 AMDSMI_EVENT_SCHED_SHUTDOWN_VF_FAIL,
2098 AMDSMI_EVENT_SCHED_RESET_VF_NUM_FAIL,
2099 AMDSMI_EVENT_SCHED_IGNORE_EVENT,
2100 AMDSMI_EVENT_SCHED_PF_SWITCH_FAIL,
2101 AMDSMI_EVENT_SCHED__MAX
2103
2109typedef enum {
2110 AMDSMI_EVENT_VF_ATOMBIOS_INIT_FAIL = 0,
2111 AMDSMI_EVENT_VF_NO_VBIOS,
2112 AMDSMI_EVENT_VF_GPU_POST_ERROR,
2113 AMDSMI_EVENT_VF_ATOMBIOS_GET_CLOCK_FAIL,
2114 AMDSMI_EVENT_VF_FENCE_INIT_FAIL,
2115 AMDSMI_EVENT_VF_AMDGPU_INIT_FAIL,
2116 AMDSMI_EVENT_VF_IB_INIT_FAIL,
2117 AMDSMI_EVENT_VF_AMDGPU_LATE_INIT_FAIL,
2118 AMDSMI_EVENT_VF_ASIC_RESUME_FAIL,
2119 AMDSMI_EVENT_VF_GPU_RESET_FAIL,
2120 AMDSMI_EVENT_VF__MAX
2122
2128typedef enum {
2129 AMDSMI_EVENT_VBIOS_INVALID = 0,
2130 AMDSMI_EVENT_VBIOS_IMAGE_MISSING,
2131 AMDSMI_EVENT_VBIOS_CHECKSUM_ERR,
2132 AMDSMI_EVENT_VBIOS_POST_FAIL,
2133 AMDSMI_EVENT_VBIOS_READ_FAIL,
2134
2135 AMDSMI_EVENT_VBIOS_READ_IMG_HEADER_FAIL,
2136 AMDSMI_EVENT_VBIOS_READ_IMG_SIZE_FAIL,
2137 AMDSMI_EVENT_VBIOS_GET_FW_INFO_FAIL,
2138 AMDSMI_EVENT_VBIOS_GET_TBL_REVISION_FAIL,
2139 AMDSMI_EVENT_VBIOS_PARSER_TBL_FAIL,
2140
2141 AMDSMI_EVENT_VBIOS_IP_DISCOVERY_FAIL,
2142 AMDSMI_EVENT_VBIOS_TIMEOUT,
2143 AMDSMI_EVENT_VBIOS_HASH_INVALID,
2144 AMDSMI_EVENT_VBIOS_HASH_UPDATED,
2145 AMDSMI_EVENT_VBIOS_IP_DISCOVERY_BINARY_CHECKSUM_FAIL,
2146 AMDSMI_EVENT_VBIOS_IP_DISCOVERY_TABLE_CHECKSUM_FAIL,
2147 AMDSMI_EVENT_VBIOS__MAX
2149
2155typedef enum {
2156 AMDSMI_EVENT_GUARD_RESET_FAIL = 0,
2157 AMDSMI_EVENT_GUARD_EVENT_OVERFLOW,
2158 AMDSMI_EVENT_GUARD__MAX
2160
2166typedef enum {
2167 AMDSMI_EVENT_GPUMON_INVALID_OPTION = 0,
2168 AMDSMI_EVENT_GPUMON_INVALID_VF_INDEX,
2169 AMDSMI_EVENT_GPUMON_INVALID_FB_SIZE,
2170 AMDSMI_EVENT_GPUMON_NO_SUITABLE_SPACE,
2171 AMDSMI_EVENT_GPUMON_NO_AVAILABLE_SLOT,
2172
2173 AMDSMI_EVENT_GPUMON_OVERSIZE_ALLOCATION,
2174 AMDSMI_EVENT_GPUMON_OVERLAPPING_FB,
2175 AMDSMI_EVENT_GPUMON_INVALID_GFX_TIMESLICE,
2176 AMDSMI_EVENT_GPUMON_INVALID_MM_TIMESLICE,
2177 AMDSMI_EVENT_GPUMON_INVALID_GFX_PART,
2178
2179 AMDSMI_EVENT_GPUMON_VF_BUSY,
2180 AMDSMI_EVENT_GPUMON_INVALID_VF_NUM,
2181 AMDSMI_EVENT_GPUMON_NOT_SUPPORTED,
2182 AMDSMI_EVENT_GPUMON__MAX
2184
2190typedef enum {
2191 AMDSMI_EVENT_MMSCH_IGNORED_JOB = 0,
2192 AMDSMI_EVENT_MMSCH_UNSUPPORTED_VCN_FW,
2193 AMDSMI_EVENT_MMSCH__MAX
2195
2201typedef enum {
2202 AMDSMI_EVENT_XGMI_TOPOLOGY_UPDATE_FAILED = 0,
2203 AMDSMI_EVENT_XGMI_TOPOLOGY_HW_INIT_UPDATE,
2204 AMDSMI_EVENT_XGMI_TOPOLOGY_UPDATE_DONE,
2205 AMDSMI_EVENT_XGMI_FB_SHARING_SETTING_ERROR,
2206 AMDSMI_EVENT_XGMI_FB_SHARING_SETTING_RESET,
2207 AMDSMI_EVENT_XGMI__MAX
2209
2215typedef enum {
2216 AMDSMI_EVENT_THROTTLER_PROCHOT = 0,
2217 AMDSMI_EVENT_THROTTLER_SOCKET,
2218 AMDSMI_EVENT_THROTTLER_VR,
2219 AMDSMI_EVENT_THROTTLER_HBM
2221
2227typedef enum {
2228 AMDSMI_RAS_ECC_SUPPORT_PARITY = (1 << 0),
2229 AMDSMI_RAS_ECC_SUPPORT_CORRECTABLE = (1 << 1),
2230 AMDSMI_RAS_ECC_SUPPORT_UNCORRECTABLE = (1 << 2),
2231 AMDSMI_RAS_ECC_SUPPORT_POISON = (1 << 3)
2233
2239typedef enum {
2240 AMDSMI_GUEST_FW_ID_VCE = 0,
2241 AMDSMI_GUEST_FW_ID_UVD,
2242 AMDSMI_GUEST_FW_ID_MC,
2243 AMDSMI_GUEST_FW_ID_ME,
2244 AMDSMI_GUEST_FW_ID_PFP,
2245 AMDSMI_GUEST_FW_ID_CE,
2246 AMDSMI_GUEST_FW_ID_RLC,
2247 AMDSMI_GUEST_FW_ID_RLC_SRLC,
2248 AMDSMI_GUEST_FW_ID_RLC_SRLG,
2249 AMDSMI_GUEST_FW_ID_RLC_SRLS,
2250 AMDSMI_GUEST_FW_ID_MEC,
2251 AMDSMI_GUEST_FW_ID_MEC2,
2252 AMDSMI_GUEST_FW_ID_SOS,
2253 AMDSMI_GUEST_FW_ID_ASD,
2254 AMDSMI_GUEST_FW_ID_TA_RAS,
2255 AMDSMI_GUEST_FW_ID_TA_XGMI,
2256 AMDSMI_GUEST_FW_ID_SMC,
2257 AMDSMI_GUEST_FW_ID_SDMA,
2258 AMDSMI_GUEST_FW_ID_SDMA2,
2259 AMDSMI_GUEST_FW_ID_VCN,
2260 AMDSMI_GUEST_FW_ID_DMCU,
2261 AMDSMI_GUEST_FW_ID__MAX
2263
2269typedef enum {
2270 AMDSMI_VF_CONFIG_FB_SIZE_SET = 0,
2271 AMDSMI_VF_CONFIG_FB_OFFSET_SET,
2272 AMDSMI_VF_CONFIG_GFX_TIMESLICE_US_SET,
2273 AMDSMI_VF_CONFIG_ENG_COMPUTE_BW_SET,
2274 AMDSMI_VF_CONFIG_GUARD_THRESHOLD_FLR_SET,
2275 AMDSMI_VF_CONFIG_GUARD_THRESHOLD_EXCL_MOD_SET,
2276 AMDSMI_VF_CONFIG_GUARD_THRESHOLD_EXCL_TIMEOUT_SET,
2277 AMDSMI_VF_CONFIG_GUARD_THRESHOLD_ALL_INT_SET,
2278 AMDSMI_VF_CONFIG_ENG_ENCODE_BW_UVD_SET,
2279 AMDSMI_VF_CONFIG_ENG_ENCODE_BW_VCE_SET,
2280 AMDSMI_VF_CONFIG_ENG_ENCODE_BW_UVD1_SET,
2281 AMDSMI_VF_CONFIG_ENG_ENCODE_BW_VCN_SET,
2282 AMDSMI_VF_CONFIG_ENG_ENCODE_BW_VCN1_SET,
2283 AMDSMI_VF_CONFIG__MAX
2285
2291typedef enum {
2292 AMDSMI_VF_STATE_UNAVAILABLE,
2293 AMDSMI_VF_STATE_AVAILABLE,
2294 AMDSMI_VF_STATE_ACTIVE,
2295 AMDSMI_VF_STATE_SUSPENDED,
2296 AMDSMI_VF_STATE_FULLACCESS,
2297 AMDSMI_VF_STATE_DEFAULT_AVAILABLE,
2299
2305typedef enum {
2306 AMDSMI_GUARD_EVENT_FLR,
2307 AMDSMI_GUARD_EVENT_EXCLUSIVE_MOD,
2308 AMDSMI_GUARD_EVENT_EXCLUSIVE_TIMEOUT,
2309 AMDSMI_GUARD_EVENT_ALL_INT,
2310 AMDSMI_GUARD_EVENT_RAS_ERR_COUNT,
2311 AMDSMI_GUARD_EVENT_RAS_CPER_DUMP,
2312 AMDSMI_GUARD_EVENT_RAS_BAD_PAGES,
2313 AMDSMI_GUARD_EVENT__MAX
2315
2321typedef enum {
2322 AMDSMI_DRIVER_LIBGV,
2323 AMDSMI_DRIVER_KMD,
2324 AMDSMI_DRIVER_AMDGPUV,
2325 AMDSMI_DRIVER_AMDGPU,
2326 AMDSMI_DRIVER_VMWGPUV,
2327 AMDSMI_DRIVER__MAX,
2329
2335typedef enum {
2336 AMDSMI_GUARD_STATE_NORMAL = 0,
2337 AMDSMI_GUARD_STATE_FULL = 1,
2338 AMDSMI_GUARD_STATE_OVERFLOW = 2,
2340
2346typedef enum {
2347 AMDSMI_SCHED_BLOCK_GFX = 0x0,
2348 AMDSMI_SCHED_BLOCK_UVD = 0x1,
2349 AMDSMI_SCHED_BLOCK_VCE = 0x2,
2350 AMDSMI_SCHED_BLOCK_UVD1 = 0x3,
2351 AMDSMI_SCHED_BLOCK_VCN = 0x4,
2352 AMDSMI_SCHED_BLOCK_VCN1 = 0x5,
2354
2360typedef enum {
2361 AMDSMI_GUEST_FW_LOAD_STATUS_OK = 0,
2362 AMDSMI_GUEST_FW_LOAD_STATUS_OBSOLETE_FW = 1,
2363 AMDSMI_GUEST_FW_LOAD_STATUS_BAD_SIG = 2,
2364 AMDSMI_GUEST_FW_LOAD_STATUS_FW_LOAD_FAIL = 3,
2365 AMDSMI_GUEST_FW_LOAD_STATUS_ERR_GENERIC = 4
2367
2373typedef enum {
2374 AMDSMI_XGMI_FB_SHARING_MODE_CUSTOM = 0,
2375 AMDSMI_XGMI_FB_SHARING_MODE_1 = 1,
2376 AMDSMI_XGMI_FB_SHARING_MODE_2 = 2,
2377 AMDSMI_XGMI_FB_SHARING_MODE_4 = 4,
2378 AMDSMI_XGMI_FB_SHARING_MODE_8 = 8,
2379 AMDSMI_XGMI_FB_SHARING_MODE_UNKNOWN = 0xFFFFFFFF
2381
2394
2400typedef enum {
2401 AMDSMI_METRIC_CATEGORY_ACC_COUNTER,
2402 AMDSMI_METRIC_CATEGORY_FREQUENCY,
2403 AMDSMI_METRIC_CATEGORY_ACTIVITY,
2404 AMDSMI_METRIC_CATEGORY_TEMPERATURE,
2405 AMDSMI_METRIC_CATEGORY_POWER,
2406 AMDSMI_METRIC_CATEGORY_ENERGY,
2407 AMDSMI_METRIC_CATEGORY_THROTTLE,
2408 AMDSMI_METRIC_CATEGORY_PCIE,
2409 AMDSMI_METRIC_CATEGORY_STATIC,
2410 AMDSMI_METRIC_CATEGORY_SYS_ACC_COUNTER,
2411 AMDSMI_METRIC_CATEGORY_SYS_BASEBOARD_TEMP,
2412 AMDSMI_METRIC_CATEGORY_SYS_GPUBOARD_TEMP,
2413 AMDSMI_METRIC_CATEGORY_SYS_BASEBOARD_POWER,
2414 AMDSMI_METRIC_CATEGORY_STATIC_FREQUENCY,
2415 AMDSMI_METRIC_CATEGORY_STATIC_TEMPERATURE,
2416 AMDSMI_METRIC_CATEGORY_STATIC_THROTTLE,
2417 AMDSMI_METRIC_CATEGORY_UNKNOWN
2419
2425typedef enum {
2426 AMDSMI_METRIC_NAME_METRIC_ACC_COUNTER,
2427 AMDSMI_METRIC_NAME_FW_TIMESTAMP,
2428 AMDSMI_METRIC_NAME_CLK_GFX,
2429 AMDSMI_METRIC_NAME_CLK_SOC,
2430 AMDSMI_METRIC_NAME_CLK_MEM,
2431 AMDSMI_METRIC_NAME_CLK_VCLK,
2432 AMDSMI_METRIC_NAME_CLK_DCLK,
2433
2434 AMDSMI_METRIC_NAME_USAGE_GFX,
2435 AMDSMI_METRIC_NAME_USAGE_MEM,
2436 AMDSMI_METRIC_NAME_USAGE_MM,
2437 AMDSMI_METRIC_NAME_USAGE_VCN,
2438 AMDSMI_METRIC_NAME_USAGE_JPEG,
2439
2440 AMDSMI_METRIC_NAME_VOLT_GFX,
2441 AMDSMI_METRIC_NAME_VOLT_SOC,
2442 AMDSMI_METRIC_NAME_VOLT_MEM,
2443
2444 AMDSMI_METRIC_NAME_TEMP_HOTSPOT_CURR,
2445 AMDSMI_METRIC_NAME_TEMP_HOTSPOT_LIMIT,
2446 AMDSMI_METRIC_NAME_TEMP_MEM_CURR,
2447 AMDSMI_METRIC_NAME_TEMP_MEM_LIMIT,
2448 AMDSMI_METRIC_NAME_TEMP_VR_CURR,
2449 AMDSMI_METRIC_NAME_TEMP_SHUTDOWN,
2450
2451 AMDSMI_METRIC_NAME_POWER_CURR,
2452 AMDSMI_METRIC_NAME_POWER_LIMIT,
2453
2454 AMDSMI_METRIC_NAME_ENERGY_SOCKET,
2455 AMDSMI_METRIC_NAME_ENERGY_CCD,
2456 AMDSMI_METRIC_NAME_ENERGY_XCD,
2457 AMDSMI_METRIC_NAME_ENERGY_AID,
2458 AMDSMI_METRIC_NAME_ENERGY_MEM,
2459
2460 AMDSMI_METRIC_NAME_THROTTLE_SOCKET_ACTIVE,
2461 AMDSMI_METRIC_NAME_THROTTLE_VR_ACTIVE,
2462 AMDSMI_METRIC_NAME_THROTTLE_MEM_ACTIVE,
2463 AMDSMI_METRIC_NAME_THROTTLE_PROCHOT_ACTIVE,
2464 AMDSMI_METRIC_NAME_THROTTLE_PPT_ACTIVE,
2465
2466 AMDSMI_METRIC_NAME_PCIE_BANDWIDTH,
2467 AMDSMI_METRIC_NAME_PCIE_L0_TO_RECOVERY_COUNT,
2468 AMDSMI_METRIC_NAME_PCIE_REPLAY_COUNT,
2469 AMDSMI_METRIC_NAME_PCIE_REPLAY_ROLLOVER_COUNT,
2470 AMDSMI_METRIC_NAME_PCIE_NAK_SENT_COUNT,
2471 AMDSMI_METRIC_NAME_PCIE_NAK_RECEIVED_COUNT,
2472
2473 AMDSMI_METRIC_NAME_CLK_GFX_MAX_LIMIT,
2474 AMDSMI_METRIC_NAME_CLK_SOC_MAX_LIMIT,
2475 AMDSMI_METRIC_NAME_CLK_MEM_MAX_LIMIT,
2476 AMDSMI_METRIC_NAME_CLK_VCLK_MAX_LIMIT,
2477 AMDSMI_METRIC_NAME_CLK_DCLK_MAX_LIMIT,
2478
2479 AMDSMI_METRIC_NAME_CLK_GFX_MIN_LIMIT,
2480 AMDSMI_METRIC_NAME_CLK_SOC_MIN_LIMIT,
2481 AMDSMI_METRIC_NAME_CLK_MEM_MIN_LIMIT,
2482 AMDSMI_METRIC_NAME_CLK_VCLK_MIN_LIMIT,
2483 AMDSMI_METRIC_NAME_CLK_DCLK_MIN_LIMIT,
2484
2485 AMDSMI_METRIC_NAME_CLK_GFX_LOCKED,
2486
2487 AMDSMI_METRIC_NAME_CLK_GFX_DS_DISABLED,
2488 AMDSMI_METRIC_NAME_CLK_MEM_DS_DISABLED,
2489 AMDSMI_METRIC_NAME_CLK_SOC_DS_DISABLED,
2490 AMDSMI_METRIC_NAME_CLK_VCLK_DS_DISABLED,
2491 AMDSMI_METRIC_NAME_CLK_DCLK_DS_DISABLED,
2492
2493 AMDSMI_METRIC_NAME_PCIE_LINK_SPEED,
2494 AMDSMI_METRIC_NAME_PCIE_LINK_WIDTH,
2495
2496 AMDSMI_METRIC_NAME_DRAM_BANDWIDTH,
2497 AMDSMI_METRIC_NAME_MAX_DRAM_BANDWIDTH,
2498
2499 AMDSMI_METRIC_NAME_GFX_CLK_BELOW_HOST_LIMIT_PPT,
2500 AMDSMI_METRIC_NAME_GFX_CLK_BELOW_HOST_LIMIT_THM,
2501 AMDSMI_METRIC_NAME_GFX_CLK_BELOW_HOST_LIMIT_TOTAL,
2502 AMDSMI_METRIC_NAME_GFX_CLK_LOW_UTILIZATION,
2503 AMDSMI_METRIC_NAME_INPUT_TELEMETRY_VOLTAGE,
2504 AMDSMI_METRIC_NAME_PLDM_VERSION,
2505 AMDSMI_METRIC_NAME_TEMP_XCD,
2506 AMDSMI_METRIC_NAME_TEMP_AID,
2507 AMDSMI_METRIC_NAME_TEMP_HBM,
2508
2509 AMDSMI_METRIC_NAME_SYS_METRIC_ACC_COUNTER,
2510 AMDSMI_METRIC_NAME_SYSTEM_TEMP_UBB_FPGA,
2511 AMDSMI_METRIC_NAME_SYSTEM_TEMP_UBB_FRONT,
2512 AMDSMI_METRIC_NAME_SYSTEM_TEMP_UBB_BACK,
2513 AMDSMI_METRIC_NAME_SYSTEM_TEMP_UBB_OAM7,
2514 AMDSMI_METRIC_NAME_SYSTEM_TEMP_UBB_IBC,
2515 AMDSMI_METRIC_NAME_SYSTEM_TEMP_UBB_UFPGA,
2516 AMDSMI_METRIC_NAME_SYSTEM_TEMP_UBB_OAM1,
2517 AMDSMI_METRIC_NAME_SYSTEM_TEMP_OAM_0_1_HSC,
2518 AMDSMI_METRIC_NAME_SYSTEM_TEMP_OAM_2_3_HSC,
2519 AMDSMI_METRIC_NAME_SYSTEM_TEMP_OAM_4_5_HSC,
2520 AMDSMI_METRIC_NAME_SYSTEM_TEMP_OAM_6_7_HSC,
2521 AMDSMI_METRIC_NAME_SYSTEM_TEMP_UBB_FPGA_0V72_VR,
2522 AMDSMI_METRIC_NAME_SYSTEM_TEMP_UBB_FPGA_3V3_VR,
2523 AMDSMI_METRIC_NAME_SYSTEM_TEMP_RETIMER_0_1_2_3_1V2_VR,
2524 AMDSMI_METRIC_NAME_SYSTEM_TEMP_RETIMER_4_5_6_7_1V2_VR,
2525 AMDSMI_METRIC_NAME_SYSTEM_TEMP_RETIMER_0_1_0V9_VR,
2526 AMDSMI_METRIC_NAME_SYSTEM_TEMP_RETIMER_4_5_0V9_VR,
2527 AMDSMI_METRIC_NAME_SYSTEM_TEMP_RETIMER_2_3_0V9_VR,
2528 AMDSMI_METRIC_NAME_SYSTEM_TEMP_RETIMER_6_7_0V9_VR,
2529 AMDSMI_METRIC_NAME_SYSTEM_TEMP_OAM_0_1_2_3_3V3_VR,
2530 AMDSMI_METRIC_NAME_SYSTEM_TEMP_OAM_4_5_6_7_3V3_VR,
2531 AMDSMI_METRIC_NAME_SYSTEM_TEMP_IBC_HSC,
2532 AMDSMI_METRIC_NAME_SYSTEM_TEMP_IBC,
2533 AMDSMI_METRIC_NAME_NODE_TEMP_RETIMER,
2534 AMDSMI_METRIC_NAME_NODE_TEMP_IBC_TEMP,
2535 AMDSMI_METRIC_NAME_NODE_TEMP_IBC_2_TEMP,
2536 AMDSMI_METRIC_NAME_NODE_TEMP_VDD18_VR_TEMP,
2537 AMDSMI_METRIC_NAME_NODE_TEMP_04_HBM_B_VR_TEMP,
2538 AMDSMI_METRIC_NAME_NODE_TEMP_04_HBM_D_VR_TEMP,
2539 AMDSMI_METRIC_NAME_VR_TEMP_VDDCR_VDD0,
2540 AMDSMI_METRIC_NAME_VR_TEMP_VDDCR_VDD1,
2541 AMDSMI_METRIC_NAME_VR_TEMP_VDDCR_VDD2,
2542 AMDSMI_METRIC_NAME_VR_TEMP_VDDCR_VDD3,
2543 AMDSMI_METRIC_NAME_VR_TEMP_VDDCR_SOC_A,
2544 AMDSMI_METRIC_NAME_VR_TEMP_VDDCR_SOC_C,
2545 AMDSMI_METRIC_NAME_VR_TEMP_VDDCR_SOCIO_A,
2546 AMDSMI_METRIC_NAME_VR_TEMP_VDDCR_SOCIO_C,
2547 AMDSMI_METRIC_NAME_VR_TEMP_VDD_085_HBM,
2548 AMDSMI_METRIC_NAME_VR_TEMP_VDDCR_11_HBM_B,
2549 AMDSMI_METRIC_NAME_VR_TEMP_VDDCR_11_HBM_D,
2550 AMDSMI_METRIC_NAME_VR_TEMP_VDD_USR,
2551 AMDSMI_METRIC_NAME_VR_TEMP_VDDIO_11_E32,
2552
2553 AMDSMI_METRIC_NAME_TEMP_MID,
2554 AMDSMI_METRIC_NAME_CLK_FCLK,
2555 AMDSMI_METRIC_NAME_CLK_FCLK_MAX_LIMIT,
2556 AMDSMI_METRIC_NAME_CLK_FCLK_MIN_LIMIT,
2557 AMDSMI_METRIC_NAME_CLK_FCLK_DS_DISABLED,
2558 AMDSMI_METRIC_NAME_CLK_LCLK,
2559 AMDSMI_METRIC_NAME_CLK_LCLK_MAX_LIMIT,
2560 AMDSMI_METRIC_NAME_CLK_LCLK_MIN_LIMIT,
2561 AMDSMI_METRIC_NAME_CLK_LCLK_DS_DISABLED,
2562 AMDSMI_METRIC_NAME_PCIE_OTHER_END_RECOVERY_COUNT,
2563 AMDSMI_METRIC_NAME_TEMP_SHUTDOWN_XCD,
2564 AMDSMI_METRIC_NAME_TEMP_SHUTDOWN_AID,
2565 AMDSMI_METRIC_NAME_TEMP_SHUTDOWN_MID,
2566 AMDSMI_METRIC_NAME_TEMP_SHUTDOWN_HBM,
2567 AMDSMI_METRIC_NAME_TEMP_THROTTLE_XCD,
2568 AMDSMI_METRIC_NAME_TEMP_THROTTLE_AID,
2569 AMDSMI_METRIC_NAME_TEMP_THROTTLE_MID,
2570 AMDSMI_METRIC_NAME_TEMP_THROTTLE_HBM,
2571 AMDSMI_METRIC_NAME_SVI_PLANE_VDDCR_X0_TEMP,
2572 AMDSMI_METRIC_NAME_SVI_PLANE_VDDCR_X1_TEMP,
2573 AMDSMI_METRIC_NAME_SVI_PLANE_VDDIO_HBM_B_TEMP,
2574 AMDSMI_METRIC_NAME_SVI_PLANE_VDDIO_HBM_D_TEMP,
2575 AMDSMI_METRIC_NAME_SVI_PLANE_VDDIO_04_HBM_B_TEMP,
2576 AMDSMI_METRIC_NAME_SVI_PLANE_VDDIO_04_HBM_D_TEMP,
2577 AMDSMI_METRIC_NAME_SVI_PLANE_VDDCR_HBM_B_TEMP,
2578 AMDSMI_METRIC_NAME_SVI_PLANE_VDDCR_HBM_D_TEMP,
2579 AMDSMI_METRIC_NAME_SVI_PLANE_VDDCR_075_HBM_B_TEMP,
2580 AMDSMI_METRIC_NAME_SVI_PLANE_VDDCR_075_HBM_D_TEMP,
2581 AMDSMI_METRIC_NAME_SVI_PLANE_VDDIO_11_GTA_A_TEMP,
2582 AMDSMI_METRIC_NAME_SVI_PLANE_VDDIO_11_GTA_C_TEMP,
2583 AMDSMI_METRIC_NAME_SVI_PLANE_VDDAN_075_GTA_A_TEMP,
2584 AMDSMI_METRIC_NAME_SVI_PLANE_VDDAN_075_GTA_C_TEMP,
2585 AMDSMI_METRIC_NAME_SVI_PLANE_VDDCR_075_UCIE_TEMP,
2586 AMDSMI_METRIC_NAME_SVI_PLANE_VDDIO_065_UCIEAA_TEMP,
2587 AMDSMI_METRIC_NAME_SVI_PLANE_VDDIO_065_UCIEAM_A_TEMP,
2588 AMDSMI_METRIC_NAME_SVI_PLANE_VDDIO_065_UCIEAM_C_TEMP,
2589 AMDSMI_METRIC_NAME_SVI_PLANE_VDDCR_SOCIO_A_TEMP,
2590 AMDSMI_METRIC_NAME_SVI_PLANE_VDDCR_SOCIO_C_TEMP,
2591 AMDSMI_METRIC_NAME_SVI_PLANE_VDDAN_075_TEMP,
2592 AMDSMI_METRIC_NAME_SYSTEM_POWER_UBB_POWER,
2593 AMDSMI_METRIC_NAME_SYSTEM_POWER_UBB_POWER_THRESHOLD,
2594
2595 AMDSMI_METRIC_NAME_UNKNOWN
2597
2603typedef enum {
2604 AMDSMI_METRIC_UNIT_COUNTER,
2605 AMDSMI_METRIC_UNIT_UINT,
2606 AMDSMI_METRIC_UNIT_BOOL,
2607 AMDSMI_METRIC_UNIT_MHZ,
2608 AMDSMI_METRIC_UNIT_PERCENT,
2609 AMDSMI_METRIC_UNIT_MILLIVOLT,
2610 AMDSMI_METRIC_UNIT_CELSIUS,
2611 AMDSMI_METRIC_UNIT_WATT,
2612 AMDSMI_METRIC_UNIT_JOULE,
2613 AMDSMI_METRIC_UNIT_GBPS,
2614 AMDSMI_METRIC_UNIT_MBITPS,
2615 AMDSMI_METRIC_UNIT_PCIE_GEN,
2616 AMDSMI_METRIC_UNIT_PCIE_LANES,
2617 AMDSMI_METRIC_UNIT_15_625_MILLIJOULE,
2618 AMDSMI_METRIC_UNIT_UNKNOWN
2620
2632
2633typedef enum {
2634 AMDSMI_METRIC_RES_GROUP_UNKNOWN,
2635 AMDSMI_METRIC_RES_GROUP_NA,
2636 AMDSMI_METRIC_RES_GROUP_GPU,
2637 AMDSMI_METRIC_RES_GROUP_XCP,
2638 AMDSMI_METRIC_RES_GROUP_AID,
2639 AMDSMI_METRIC_RES_GROUP_MID,
2640 AMDSMI_METRIC_RES_GROUP_SYSTEM
2641} amdsmi_metric_res_group_t;
2642
2643typedef enum {
2644 AMDSMI_METRIC_RES_SUBGROUP_UNKNOWN,
2645 AMDSMI_METRIC_RES_SUBGROUP_NA,
2646 AMDSMI_METRIC_RES_SUBGROUP_XCC,
2647 AMDSMI_METRIC_RES_SUBGROUP_ENGINE,
2648 AMDSMI_METRIC_RES_SUBGROUP_HBM,
2649 AMDSMI_METRIC_RES_SUBGROUP_BASEBOARD,
2650 AMDSMI_METRIC_RES_SUBGROUP_GPUBOARD
2651} amdsmi_metric_res_subgroup_t;
2652
2653typedef enum {
2654 AMDSMI_VF_MODE_1 = (1U << 1),
2655 AMDSMI_VF_MODE_2 = (1U << 2),
2656 AMDSMI_VF_MODE_4 = (1U << 4),
2657 AMDSMI_VF_MODE_8 = (1U << 8),
2658 AMDSMI_VF_MODE_ALL = (AMDSMI_VF_MODE_1 | AMDSMI_VF_MODE_2 | AMDSMI_VF_MODE_4 |
2659 AMDSMI_VF_MODE_8)
2661
2674
2685
2691typedef struct {
2692 uint64_t handle;
2694
2700typedef struct {
2701 amdsmi_vf_handle_t fcn_id;
2702 uint64_t dev_id;
2703 uint64_t timestamp;
2704 uint64_t data;
2705 uint32_t category;
2706 uint32_t subcode;
2707 uint32_t level;
2709 char message[AMDSMI_MAX_STRING_LENGTH];
2710 amdsmi_processor_handle processor_handle;
2711 uint64_t reserved[37];
2713
2719typedef struct {
2720 uint32_t version;
2722
2728typedef struct {
2729 uint32_t total_fb_size;
2731 uint32_t pf_fb_offset;
2732 uint32_t fb_alignment;
2735 uint64_t reserved[5];
2737
2743typedef struct {
2744 uint32_t fb_offset;
2745 uint32_t fb_size;
2746 uint64_t reserved[3];
2748
2754typedef struct {
2757 uint64_t reserved[3];
2759
2765typedef struct {
2766 uint8_t enabled;
2767 struct {
2769 /* amount of monitor event after enabled */
2770 uint32_t amount;
2771 /* threshold of events in the interval(seconds) */
2772 uint64_t interval;
2773 uint32_t threshold;
2774 /* current number of events in the interval*/
2775 uint32_t active;
2776 uint32_t reserved[4];
2777 } guard[AMDSMI_GUARD_EVENT__MAX];
2778 uint32_t reserved[6];
2780
2786typedef struct {
2788 uint32_t gfx_timeslice;
2789 uint64_t reserved[27];
2791
2797typedef struct {
2798 uint64_t phy_addr;
2799 uint64_t phy_size;
2800 uint32_t numa_id;
2802 char name[AMDSMI_MAX_STRING_LENGTH];
2803 uint64_t reserved[29];
2805
2811typedef struct {
2812 uint64_t flr_count;
2813 uint64_t boot_up_time;
2814 uint64_t shutdown_time;
2815 uint64_t reset_time;
2817 char last_boot_start[AMDSMI_MAX_STRING_LENGTH];
2818 char last_boot_end[AMDSMI_MAX_STRING_LENGTH];
2819 char last_shutdown_start[AMDSMI_MAX_STRING_LENGTH];
2820 char last_shutdown_end[AMDSMI_MAX_STRING_LENGTH];
2821 char last_reset_start[AMDSMI_MAX_STRING_LENGTH];
2822 char last_reset_end[AMDSMI_MAX_STRING_LENGTH];
2823 char current_active_time[AMDSMI_MAX_STRING_LENGTH];
2825 char current_running_time[AMDSMI_MAX_STRING_LENGTH];
2826 char total_active_time[AMDSMI_MAX_STRING_LENGTH];
2828 char total_running_time[AMDSMI_MAX_STRING_LENGTH];
2829 uint64_t reserved[11];
2831
2837typedef struct {
2838 amdsmi_sched_info_t sched;
2839 amdsmi_guard_info_t guard;
2840 uint64_t reserved[8];
2842
2848typedef struct {
2849 uint64_t total;
2850 uint64_t available;
2851 uint64_t optimal;
2852 uint64_t min_value;
2853 uint64_t max_value;
2854 uint64_t reserved[2];
2856
2862typedef struct {
2863 uint8_t profile_count;
2864 uint8_t current_profile_index;
2865 struct {
2866 uint32_t vf_count;
2867 amdsmi_profile_caps_info_t profile_caps[AMDSMI_PROFILE_CAPABILITY__MAX];
2868 } profiles[AMDSMI_MAX_PROFILE_COUNT];
2869 uint32_t reserved[6];
2871
2877typedef struct {
2878 char driver_version[AMDSMI_MAX_STRING_LENGTH];
2879 uint32_t fb_usage;
2880 uint64_t reserved[23];
2882
2888typedef struct {
2889 uint32_t dfc_fw_version;
2890 uint32_t dfc_fw_total_entries;
2891 uint32_t dfc_gart_wr_guest_min;
2892 uint32_t dfc_gart_wr_guest_max;
2893 uint32_t reserved[12];
2895
2901typedef struct {
2902 uint32_t oldest;
2903 uint32_t latest;
2905
2911typedef struct {
2912 uint8_t ta_uuid[AMDSMI_MAX_UUID_ELEMENTS];
2914
2920typedef struct {
2921 uint32_t dfc_fw_type;
2922 uint32_t verification_enabled;
2924 uint32_t reserved[13];
2925 union {
2928 };
2929 uint32_t black_list[AMDSMI_MAX_BLACK_LIST_ELEMENTS];
2931
2941
2951typedef struct {
2952 uint64_t retired_page;
2953 uint64_t ts;
2954 unsigned char err_type;
2955 union {
2956 unsigned char bank;
2957 unsigned char cu;
2958 };
2959 unsigned char mem_channel;
2960 unsigned char mcumc_id;
2961 uint32_t reserved[3];
2963
2969typedef struct {
2970 uint64_t timestamp;
2971 uint32_t vf_idx;
2972 uint32_t fw_id;
2973 uint16_t status;
2974 uint32_t reserved[3];
2976
2982typedef struct {
2983 uint8_t num_err_records;
2985 uint64_t reserved[7];
2987
2993typedef struct {
2994 uint64_t weight;
2997 uint8_t num_hops;
2998 uint8_t fb_sharing;
2999 uint32_t reserved[10];
3001
3007typedef struct {
3008 uint32_t count;
3010 uint64_t reserved[15];
3012
3018typedef union {
3019 struct cap_ {
3020 uint32_t mode_custom_cap : 1;
3021 uint32_t mode_1_cap : 1;
3022 uint32_t mode_2_cap : 1;
3023 uint32_t mode_4_cap : 1;
3024 uint32_t mode_8_cap : 1;
3025 uint32_t reserved : 27;
3026 } cap;
3027 uint32_t xgmi_fb_sharing_cap_mask;
3029
3035typedef struct {
3038 amdsmi_metric_category_t category;
3039 uint32_t flags;
3040 uint32_t vf_mask;
3041 uint64_t val;
3042 amdsmi_metric_res_group_t res_group;
3043 amdsmi_metric_res_subgroup_t res_subgroup;
3044 uint32_t res_instance;
3045 uint32_t reserved[5];
3047
3053typedef struct {
3054 uint32_t major;
3055 uint32_t minor;
3056 uint32_t release;
3058
3059typedef struct {
3061 uint32_t vf_mode;
3062 uint64_t reserved[6];
3064
3074
3080#define AMDSMI_MAX_NIC_PORTS 32
3081#define AMDSMI_MAX_NIC_RDMA_DEV 32
3082#define AMDSMI_MAX_NIC_FW 64
3083
3094
3102typedef struct {
3103 char name[AMDSMI_MAX_STRING_LENGTH];
3104 uint64_t value;
3106
3112typedef struct {
3113 uint16_t vendor_id;
3114 uint16_t subvendor_id;
3115 uint16_t device_id;
3116 uint16_t subsystem_id;
3117 uint8_t revision;
3118 char permanent_address[AMDSMI_MAX_STRING_LENGTH];
3119 char product_name[AMDSMI_MAX_STRING_LENGTH];
3120 char part_number[AMDSMI_MAX_STRING_LENGTH];
3121 char serial_number[AMDSMI_MAX_STRING_LENGTH];
3122 char vendor_name[AMDSMI_MAX_STRING_LENGTH];
3124
3130typedef struct {
3131 amdsmi_bdf_t bdf;
3132 uint8_t max_pcie_width;
3134 char pcie_interface_version[AMDSMI_MAX_STRING_LENGTH];
3135 char slot_type[AMDSMI_MAX_STRING_LENGTH];
3137
3143typedef struct {
3144 uint8_t node;
3145 char affinity[AMDSMI_MAX_STRING_LENGTH];
3147
3153typedef struct {
3154 char name[AMDSMI_MAX_STRING_LENGTH];
3155 char version[AMDSMI_MAX_STRING_LENGTH];
3157
3163typedef struct {
3165 amdsmi_nic_fw_t fw;
3167
3173typedef struct {
3174 uint32_t num_fw;
3177
3204typedef struct {
3205 amdsmi_bdf_t bdf;
3206 uint32_t port_num;
3207 char type[AMDSMI_MAX_STRING_LENGTH];
3208 char flavour[AMDSMI_MAX_STRING_LENGTH];
3209 char netdev[AMDSMI_MAX_STRING_LENGTH];
3210 uint8_t ifindex;
3211 char mac_address[AMDSMI_MAX_STRING_LENGTH];
3212 uint8_t carrier;
3213 uint16_t mtu;
3214 char link_state[AMDSMI_MAX_STRING_LENGTH];
3215 uint32_t link_speed;
3216 uint32_t active_fec;
3217 char autoneg[AMDSMI_MAX_STRING_LENGTH];
3218 char pause_autoneg[AMDSMI_MAX_STRING_LENGTH];
3219 char pause_rx[AMDSMI_MAX_STRING_LENGTH];
3220 char pause_tx[AMDSMI_MAX_STRING_LENGTH];
3222
3228typedef struct {
3229 uint32_t num_ports;
3232
3238typedef struct {
3239 char name[AMDSMI_MAX_STRING_LENGTH];
3240 char version[AMDSMI_MAX_STRING_LENGTH];
3242
3253typedef struct {
3254 char netdev[AMDSMI_MAX_STRING_LENGTH];
3255 char state[AMDSMI_MAX_STRING_LENGTH];
3256 uint8_t rdma_port;
3257 uint16_t max_mtu;
3258 uint16_t active_mtu;
3260
3266typedef struct {
3267 char rdma_dev[AMDSMI_MAX_STRING_LENGTH];
3268 char node_guid[AMDSMI_MAX_STRING_LENGTH];
3269 char node_type[AMDSMI_MAX_STRING_LENGTH];
3270 char sys_image_guid[AMDSMI_MAX_STRING_LENGTH];
3271 char fw_ver[AMDSMI_MAX_STRING_LENGTH];
3272 uint8_t num_rdma_ports;
3275
3281typedef struct {
3282 uint8_t num_rdma_dev;
3285
3286/*****************************************************************************/
3315amdsmi_status_t amdsmi_init(uint64_t init_flags);
3316
3332
3335/*****************************************************************************/
3369 processor_type_t processor_type,
3370 amdsmi_processor_handle *processor_handles,
3371 uint32_t *processor_count);
3372
3393 processor_type_t *processor_type);
3394
3427 amdsmi_socket_handle *socket_handles);
3428
3470amdsmi_status_t amdsmi_get_processor_handles(amdsmi_socket_handle socket_handle,
3471 uint32_t *processor_count,
3472 amdsmi_processor_handle *processor_handles);
3473
3493amdsmi_status_t amdsmi_get_socket_info(amdsmi_socket_handle socket_handle, size_t len, char *name);
3494
3513 amdsmi_processor_handle *processor_handle);
3514
3530 amdsmi_bdf_t *bdf);
3531
3552 unsigned int *uuid_length,
3553 char *uuid);
3554
3574
3603 uint32_t cpu_set_size,
3604 uint64_t *cpu_set,
3606
3628 amdsmi_node_handle *node_handle);
3629
3645 uint32_t *processor_index);
3646
3664 amdsmi_processor_handle *processor_handle);
3665
3680 amdsmi_bdf_t *bdf);
3681
3697 amdsmi_processor_handle *processor_handle);
3698
3714
3730
3747 uint32_t fcn_idx,
3748 amdsmi_vf_handle_t *vf_handle);
3749
3764
3784amdsmi_get_vf_uuid(amdsmi_vf_handle_t processor_handle, unsigned int *uuid_length, char *uuid);
3785
3821amdsmi_status_t amdsmi_get_nic_processor_handles(amdsmi_socket_handle socket_handle,
3822 uint32_t *processor_count,
3823 amdsmi_processor_handle *processor_handles);
3824
3839 amdsmi_bdf_t *bdf);
3840
3843/*****************************************************************************/
3865
3868/*****************************************************************************/
3894
3897/*****************************************************************************/
3918 amdsmi_driver_info_t *info);
3919
3935
3938/*****************************************************************************/
3966 amdsmi_asic_info_t *info);
3967
3987 uint32_t sensor_ind,
3989
4005 amdsmi_pcie_info_t *info);
4006
4029 amdsmi_pcie_bandwidth_t *bandwidth);
4030
4046 amdsmi_vram_info_t *info);
4047
4063 amdsmi_board_info_t *info);
4064
4080 amdsmi_pf_fb_info_t *info);
4081
4084/*****************************************************************************/
4104 amdsmi_fw_info_t *info);
4105
4122 amdsmi_vbios_info_t *info);
4123
4139 amdsmi_fw_error_record_t *records);
4140
4155 amdsmi_dfc_fw_t *info);
4156
4159/*****************************************************************************/
4179 amdsmi_engine_usage_t *info);
4180
4200 amdsmi_power_info_t *info);
4201
4216 bool *enabled);
4217
4238 amdsmi_clk_type_t clk_type,
4239 amdsmi_clk_info_t *info);
4240
4271 amdsmi_temperature_type_t sensor_type,
4273 int64_t *temperature);
4274
4297 uint32_t *metrics_size,
4298 amdsmi_metric_t *metrics);
4299
4302/*****************************************************************************/
4323
4349
4352/*****************************************************************************/
4375 amdsmi_processor_handle processor_handle,
4377
4401 uint32_t *partition_id);
4402
4422 uint32_t profile_index);
4423
4449 amdsmi_processor_handle processor_handle,
4451
4454/*****************************************************************************/
4474 amdsmi_link_metrics_t *link_metrics);
4475
4505 amdsmi_link_type_t link_type,
4506 amdsmi_topology_nearest_t *topology_nearest_info);
4507
4535 amdsmi_processor_handle processor_handle_dst,
4536 amdsmi_link_type_t *type,
4538
4559 uint32_t *numa_node);
4560
4604 amdsmi_processor_handle processor_handle_dst,
4605 uint64_t *hops,
4606 amdsmi_link_type_t *type);
4607
4634 amdsmi_processor_handle processor_handle_dst,
4635 amdsmi_link_topology_t *topology_info);
4636
4653
4673 amdsmi_processor_handle processor_handle_dst,
4675 uint8_t *fb_sharing);
4676
4692
4711 uint32_t num_processors,
4713
4716/*****************************************************************************/
4743 amdsmi_dpm_policy_t *policy);
4744
4767
4788 amdsmi_dpm_policy_t *xgmi_plpd);
4789
4812
4815/*****************************************************************************/
4843amdsmi_set_power_cap(amdsmi_processor_handle processor_handle, uint32_t sensor_ind, uint64_t cap);
4844
4866 uint32_t *sensor_count,
4867 uint32_t *sensor_inds,
4868 amdsmi_power_cap_type_t *sensor_types);
4869
4872/*****************************************************************************/
4895
4898/*****************************************************************************/
4929 amdsmi_gpu_block_t block,
4931
4960 uint64_t *enabled_blocks);
4961
4980
4983/*****************************************************************************/
5027 uint32_t severity_mask,
5028 char *cper_data,
5029 uint64_t *buf_size,
5030 amdsmi_cper_hdr_t **cper_hdrs,
5031 uint64_t *entry_count,
5032 uint64_t *cursor);
5033
5060 uint32_t buf_size,
5061 uint64_t *afids,
5062 uint32_t *num_afids);
5063
5079 amdsmi_ras_feature_t *ras_feature);
5080
5100 uint32_t *bad_page_size,
5101 amdsmi_eeprom_table_record_t *bad_pages);
5102
5121
5146 uint32_t *threshold);
5147
5182 uint32_t severity_mask,
5183 char *cper_data,
5184 uint64_t *buf_size,
5185 amdsmi_cper_hdr_t **cper_hdrs,
5186 uint64_t *entry_count,
5187 uint64_t *cursor);
5188
5191/*****************************************************************************/
5217
5242
5263
5266/*****************************************************************************/
5292
5312
5336 amdsmi_ptl_data_format_t *data_format1,
5337 amdsmi_ptl_data_format_t *data_format2);
5338
5364 amdsmi_ptl_data_format_t data_format1,
5365 amdsmi_ptl_data_format_t data_format2);
5366
5369/*****************************************************************************/
5398 amdsmi_fabric_info_t *info);
5399
5421 uint32_t category_mask,
5422 amdsmi_fabric_telemetry_t **telemetry);
5423
5441 amdsmi_fabric_telemetry_t *telemetry);
5442
5459 amdsmi_fabric_telemetry_t *telemetry);
5460
5480 const amdsmi_fabric_ppod_config_t *config);
5481
5501 const amdsmi_fabric_vpod_config_t *config);
5502
5522 const amdsmi_fabric_station_config_t *config);
5523
5526/*****************************************************************************/
5549 uint32_t *num_vf_enabled,
5550 uint32_t *num_vf_supported);
5551
5571 unsigned int vf_buffer_num,
5573
5589 amdsmi_profile_info_t *profile_info);
5590
5593/*****************************************************************************/
5613
5629
5644
5647/*****************************************************************************/
5688 uint32_t num_devices,
5689 uint64_t event_types,
5690 amdsmi_event_set *set);
5691
5725
5738
5741/*****************************************************************************/
5764
5781
5784/*****************************************************************************/
5802
5817
5820/*****************************************************************************/
5839
5854 amdsmi_cc_mode_t *mode);
5855
5870
5873/*****************************************************************************/
5894
5913 amdsmi_nic_fw_info_t *info);
5914
5931
5947 amdsmi_nic_bus_info_t *info);
5948
5965
5982
5999
6023 uint32_t port_index,
6024 uint32_t *num_stats,
6025 amdsmi_nic_stat_t *stats);
6026
6054 uint32_t port_index,
6055 uint32_t *num_stats,
6056 amdsmi_nic_stat_t *stats);
6057
6081 uint32_t rdma_port_index,
6082 uint32_t *num_stats,
6083 amdsmi_nic_stat_t *stats);
6084
6087#ifdef __cplusplus
6088}
6089#endif
6090
6091#endif // __AMDSMI_H__
amdsmi_event_reset_t
Event Reset.
Definition amdsmi.h:1951
amdsmi_vf_mode_t
Definition amdsmi.h:2653
@ AMDSMI_VF_MODE_ALL
All VF counts supported.
Definition amdsmi.h:2658
#define AMDSMI_MAX_ACCELERATOR_PROFILE
Maximum number of accelerator profiles.
Definition amdsmi.h:175
#define AMDSMI_MAX_WHITE_LIST_ELEMENTS
Maximum number of white list elements for device access control/*#end#*‍/.
Definition amdsmi.h:194
amdsmi_event_fw_t
Event Firmware.
Definition amdsmi.h:1897
amdsmi_metric_category_t
Metric Category.
Definition amdsmi.h:2400
amdsmi_npm_status_t
NPM status.
Definition amdsmi.h:721
amdsmi_link_type_t
Link type.
Definition amdsmi.h:485
@ AMDSMI_LINK_TYPE_NOT_APPLICABLE
Not Applicable Link Type.
Definition amdsmi.h:489
@ AMDSMI_LINK_TYPE_INTERNAL
Internal Link Type, within chip.
Definition amdsmi.h:486
@ AMDSMI_LINK_TYPE_UNKNOWN
Unknown Link Type.
Definition amdsmi.h:490
@ AMDSMI_LINK_TYPE_XNUMA
Two processors connect via different PCIe switches on different CPUs.
Definition amdsmi.h:493
@ AMDSMI_LINK_TYPE_NUMA
Two processors connect via different PCIe switches but on the same CPU.
Definition amdsmi.h:491
@ AMDSMI_LINK_TYPE_PCIE
Peripheral Component Interconnect Express Link Type.
Definition amdsmi.h:487
@ AMDSMI_LINK_TYPE_XGMI
GPU Memory Interconnect (multi GPU communication)
Definition amdsmi.h:488
amdsmi_event_xgmi_t
Event XGMI.
Definition amdsmi.h:2201
#define AMDSMI_MAX_PROFILE_COUNT
Maximum number of profiles supported.
Definition amdsmi.h:202
amdsmi_event_ecc_t
Event ECC.
Definition amdsmi.h:1989
amdsmi_cc_mode_t
CC mode enumeration.
Definition amdsmi.h:2680
@ AMDSMI_CC_MODE_OFF
Confidential Compute disabled.
Definition amdsmi.h:2681
@ AMDSMI_CC_MODE_DEV
Confidential Compute enabled in developer mode.
Definition amdsmi.h:2683
@ AMDSMI_CC_MODE_ON
Confidential Compute enabled.
Definition amdsmi.h:2682
amdsmi_event_gpumon_t
Event GPU Monitor.
Definition amdsmi.h:2166
amdsmi_accelerator_partition_type_t
Accelerator Partition.
Definition amdsmi.h:248
@ AMDSMI_ACCELERATOR_PARTITION_DPX
Definition amdsmi.h:252
@ AMDSMI_ACCELERATOR_PARTITION_QPX
Definition amdsmi.h:256
@ AMDSMI_ACCELERATOR_PARTITION_INVALID
Invalid accelerator partition type.
Definition amdsmi.h:249
@ AMDSMI_ACCELERATOR_PARTITION_SPX
Definition amdsmi.h:250
@ AMDSMI_ACCELERATOR_PARTITION_TPX
Definition amdsmi.h:254
@ AMDSMI_ACCELERATOR_PARTITION_CPX
Definition amdsmi.h:258
amdsmi_event_guard_t
Event Guard.
Definition amdsmi.h:2155
amdsmi_vf_config_flags_t
VF Config Flags.
Definition amdsmi.h:2269
amdsmi_power_cap_type_t
Power Cap Package Power Tracking (PPT) type.
Definition amdsmi.h:890
@ AMDSMI_POWER_CAP_TYPE_PPT1
PPT1 power cap; higher limit, raw input.
Definition amdsmi.h:892
@ AMDSMI_POWER_CAP_TYPE_PPT0
PPT0 power cap; lower limit, filtered input.
Definition amdsmi.h:891
amdsmi_clk_type_t
Clock types.
Definition amdsmi.h:315
@ AMDSMI_CLK_TYPE_DCLK1
Display 2 clock, timing signals for display output.
Definition amdsmi.h:329
@ AMDSMI_CLK_TYPE_MEM
Memory clock speed, system operating frequency.
Definition amdsmi.h:324
@ AMDSMI_CLK_TYPE_SYS
System clock.
Definition amdsmi.h:316
@ AMDSMI_CLK_TYPE_SOC
System On Chip clock, integrated circuit frequency.
Definition amdsmi.h:323
@ AMDSMI_CLK_TYPE_GFX
Graphics clock.
Definition amdsmi.h:318
@ AMDSMI_CLK_TYPE_DCLK0
Display 1 clock, timing signals for display output.
Definition amdsmi.h:328
@ AMDSMI_CLK_TYPE_DCEF
Definition amdsmi.h:321
@ AMDSMI_CLK_TYPE_VCLK1
Video 1 clock, video processing units.
Definition amdsmi.h:327
@ AMDSMI_CLK_TYPE_DF
Definition amdsmi.h:319
@ AMDSMI_CLK_TYPE_VCLK0
Video 0 clock, video processing units.
Definition amdsmi.h:326
@ AMDSMI_CLK_TYPE_PCIE
PCI Express clock, high bandwidth peripherals.
Definition amdsmi.h:325
amdsmi_accelerator_partition_resource_type_t
Accelerator Partition Resource Types.
Definition amdsmi.h:301
@ AMDSMI_ACCELERATOR_DMA
Direct Memory Access, high speed data transfers.
Definition amdsmi.h:305
@ AMDSMI_ACCELERATOR_XCC
Compute complex or stream processors.
Definition amdsmi.h:302
@ AMDSMI_ACCELERATOR_DECODER
Video decoding.
Definition amdsmi.h:304
@ AMDSMI_ACCELERATOR_JPEG
Encoding and Decoding jpeg engines.
Definition amdsmi.h:306
@ AMDSMI_ACCELERATOR_ENCODER
Video encoding.
Definition amdsmi.h:303
#define AMDSMI_MAX_ERR_RECORDS
Maximum number of error records that can be stored.
Definition amdsmi.h:201
amdsmi_card_form_factor_t
Card Form Factor.
Definition amdsmi.h:473
@ AMDSMI_CARD_FORM_FACTOR_OAM
OAM form factor.
Definition amdsmi.h:475
@ AMDSMI_CARD_FORM_FACTOR_UNKNOWN
Unknown Form factor.
Definition amdsmi.h:477
@ AMDSMI_CARD_FORM_FACTOR_PCIE
PCIE card form factor.
Definition amdsmi.h:474
@ AMDSMI_CARD_FORM_FACTOR_CEM
CEM form factor.
Definition amdsmi.h:476
void * amdsmi_node_handle
opaque handler point to underlying implementation
Definition amdsmi.h:219
#define AMDSMI_MAX_NUM_XGMI_PHYSICAL_LINK
Common defines.
Definition amdsmi.h:160
amdsmi_guard_type_t
Guard Event.
Definition amdsmi.h:2305
amdsmi_pp_throttler_type_t
This enum determines which type of PP throttler event occurred.
Definition amdsmi.h:2215
amdsmi_profile_capability_type_t
Profile Capability.
Definition amdsmi.h:2387
@ AMDSMI_PROFILE_CAPABILITY_DECODE
decode engine
Definition amdsmi.h:2390
@ AMDSMI_PROFILE_CAPABILITY_MEMORY
memory
Definition amdsmi.h:2388
@ AMDSMI_PROFILE_CAPABILITY_ENCODE
encode engine
Definition amdsmi.h:2389
@ AMDSMI_PROFILE_CAPABILITY_COMPUTE
compute engine
Definition amdsmi.h:2391
amdsmi_init_flags_t
Initialization flags.
Definition amdsmi.h:33
@ AMDSMI_INIT_AMD_GPUS
Initialize AMD GPUS.
Definition amdsmi.h:36
@ AMDSMI_INIT_ALL_PROCESSORS
Initialize all processors.
Definition amdsmi.h:34
@ AMDSMI_INIT_AMD_CPUS
Initialize AMD CPUS.
Definition amdsmi.h:35
@ AMDSMI_INIT_NON_AMD_GPUS
Initialize Non-AMD GPUS.
Definition amdsmi.h:38
@ AMDSMI_INIT_AMD_NICS
Initialize AMD NICS.
Definition amdsmi.h:42
@ AMDSMI_INIT_NON_AMD_CPUS
Initialize Non-AMD CPUS.
Definition amdsmi.h:37
@ AMDSMI_INIT_AMD_APUS
Definition amdsmi.h:39
amdsmi_event_pp_t
Event PP.
Definition amdsmi.h:2058
amdsmi_event_vbios_t
Event VBios.
Definition amdsmi.h:2128
void * amdsmi_event_set
Opague Handler point to underlying implementation.
Definition amdsmi.h:1779
#define AMDSMI_MAX_NIC_FW
Maximum number of NIC firmwares.
Definition amdsmi.h:3082
amdsmi_vram_type_t
vRam Types. This enum is used to identify various VRam types.
Definition amdsmi.h:268
@ AMDSMI_VRAM_TYPE_GDDR2
Graphics Double Data Rate, Generation 2.
Definition amdsmi.h:284
@ AMDSMI_VRAM_TYPE_HBM2E
High Bandwidth Memory, Generation 2 Enhanced.
Definition amdsmi.h:273
@ AMDSMI_VRAM_TYPE_GDDR6
Graphics Double Data Rate, Generation 6.
Definition amdsmi.h:288
@ AMDSMI_VRAM_TYPE_HBM
High Bandwidth Memory.
Definition amdsmi.h:271
@ AMDSMI_VRAM_TYPE_GDDR3
Graphics Double Data Rate, Generation 3.
Definition amdsmi.h:285
@ AMDSMI_VRAM_TYPE_GDDR1
Graphics Double Data Rate, Generation 1.
Definition amdsmi.h:283
@ AMDSMI_VRAM_TYPE_HBM3
High Bandwidth Memory, Generation 3.
Definition amdsmi.h:274
@ AMDSMI_VRAM_TYPE_LPDDR5
Low Power Double Data Rate, Generation 5.
Definition amdsmi.h:292
@ AMDSMI_VRAM_TYPE_HBM3E
High Bandwidth Memory, Generation 3 Enhanced.
Definition amdsmi.h:275
@ AMDSMI_VRAM_TYPE_GDDR5
Graphics Double Data Rate, Generation 5.
Definition amdsmi.h:287
@ AMDSMI_VRAM_TYPE_DDR3
Double Data Rate, Generation 3.
Definition amdsmi.h:279
@ AMDSMI_VRAM_TYPE_GDDR4
Graphics Double Data Rate, Generation 4.
Definition amdsmi.h:286
@ AMDSMI_VRAM_TYPE_DDR2
Double Data Rate, Generation 2.
Definition amdsmi.h:278
@ AMDSMI_VRAM_TYPE_GDDR7
Graphics Double Data Rate, Generation 7.
Definition amdsmi.h:289
@ AMDSMI_VRAM_TYPE_HBM2
High Bandwidth Memory, Generation 2.
Definition amdsmi.h:272
@ AMDSMI_VRAM_TYPE_LPDDR4
Low Power Double Data Rate, Generation 4.
Definition amdsmi.h:291
@ AMDSMI_VRAM_TYPE_HBM4
High Bandwidth Memory, Generation 4.
Definition amdsmi.h:276
@ AMDSMI_VRAM_TYPE_DDR5
Double Data Rate, Generation 5.
Definition amdsmi.h:281
@ AMDSMI_VRAM_TYPE_DDR4
Double Data Rate, Generation 4.
Definition amdsmi.h:280
@ AMDSMI_VRAM_TYPE_UNKNOWN
Unknown memory type.
Definition amdsmi.h:269
amdsmi_event_vf_max_t
Event VF.
Definition amdsmi.h:2109
amdsmi_fabric_telemetry_category_t
Fabric telemetry categories.
Definition amdsmi.h:1386
@ AMDSMI_FABRIC_TELEMETRY_CATEGORY_MAX
Maximum number of categories.
Definition amdsmi.h:1396
@ AMDSMI_FABRIC_TELEMETRY_CATEGORY_UALOE
UALOE telemetry.
Definition amdsmi.h:1387
@ AMDSMI_FABRIC_TELEMETRY_CATEGORY_DERIVED_UALOE
Derived UALOE telemetry.
Definition amdsmi.h:1392
@ AMDSMI_FABRIC_TELEMETRY_CATEGORY_PHY
PHY telemetry.
Definition amdsmi.h:1395
@ AMDSMI_FABRIC_TELEMETRY_CATEGORY_NETPORT
Network Port telemetry.
Definition amdsmi.h:1391
@ AMDSMI_FABRIC_TELEMETRY_CATEGORY_SWITCH
Switch telemetry.
Definition amdsmi.h:1388
@ AMDSMI_FABRIC_TELEMETRY_CATEGORY_IFOE_DEBUG
IFoE debug telemetry.
Definition amdsmi.h:1394
@ AMDSMI_FABRIC_TELEMETRY_CATEGORY_PFC
PFC telemetry.
Definition amdsmi.h:1390
@ AMDSMI_FABRIC_TELEMETRY_CATEGORY_DERIVED_NETPORT
Derived Network Port telemetry.
Definition amdsmi.h:1393
@ AMDSMI_FABRIC_TELEMETRY_CATEGORY_CRYPTO
Crypto telemetry.
Definition amdsmi.h:1389
@ AMDSMI_FABRIC_TELEMETRY_CATEGORY_INVALID
Unknown telemetry.
Definition amdsmi.h:1397
amdsmi_metric_type_t
Metric Type.
Definition amdsmi.h:2626
@ AMDSMI_METRIC_TYPE_COUNTER
counter metric
Definition amdsmi.h:2627
@ AMDSMI_METRIC_TYPE_CHIPLET
chiplet metric
Definition amdsmi.h:2628
@ AMDSMI_METRIC_TYPE_ACC
accumulated metric
Definition amdsmi.h:2630
@ AMDSMI_METRIC_TYPE_INST
instantaneous metric
Definition amdsmi.h:2629
#define AMDSMI_MAX_ACCELERATOR_PARTITIONS
Maximum number of accelerator partitions.
Definition amdsmi.h:174
amdsmi_cper_notify_type_t
Cper notify.
Definition amdsmi.h:1271
@ AMDSMI_CPER_NOTIFY_TYPE_DMAR
Direct Memory Access Remapping Error.
Definition amdsmi.h:1279
@ AMDSMI_CPER_NOTIFY_TYPE_NMI
Non_Maskable Interrupt.
Definition amdsmi.h:1277
@ AMDSMI_CPER_NOTIFY_TYPE_SEI
System Error Interface.
Definition amdsmi.h:1281
@ AMDSMI_CPER_NOTIFY_TYPE_CMC
Corrected Memory Check.
Definition amdsmi.h:1272
@ AMDSMI_CPER_NOTIFY_TYPE_CPE
Corrected Platform Error.
Definition amdsmi.h:1273
@ AMDSMI_CPER_NOTIFY_TYPE_CXL_COMPONENT
Definition amdsmi.h:1283
@ AMDSMI_CPER_NOTIFY_TYPE_SEA
System Error Architecture.
Definition amdsmi.h:1280
@ AMDSMI_CPER_NOTIFY_TYPE_PEI
Platform Error Interface.
Definition amdsmi.h:1282
@ AMDSMI_CPER_NOTIFY_TYPE_MCE
Machine Check Exception.
Definition amdsmi.h:1274
@ AMDSMI_CPER_NOTIFY_TYPE_BOOT
Boot Error.
Definition amdsmi.h:1278
@ AMDSMI_CPER_NOTIFY_TYPE_PCIE
PCI Express Error.
Definition amdsmi.h:1275
@ AMDSMI_CPER_NOTIFY_TYPE_INIT
Initialization Error.
Definition amdsmi.h:1276
#define AMDSMI_MAX_CP_PROFILE_RESOURCES
Maximum number of compute profile resources.
Definition amdsmi.h:173
amdsmi_fw_block_t
The values of this enum are used to identify the various firmware blocks.
Definition amdsmi.h:567
@ AMDSMI_FW_ID_ASD
Asynchronous Shader Dispatcher.
Definition amdsmi.h:656
@ AMDSMI_FW_ID_RS64_ME_P0_DATA
Hardware Block RS64 - Micro Engine Partition 0 Data.
Definition amdsmi.h:632
@ AMDSMI_FW_ID_RLC_RESTORE_LIST_SRM_MEM
Memory.
Definition amdsmi.h:601
@ AMDSMI_FW_ID_SDMA7
System Direct Memory Access 7 (high speed data transfers)
Definition amdsmi.h:590
@ AMDSMI_FW_ID_PSP_BL
Platform Security Processor Bootloader (initial firmware)
Definition amdsmi.h:614
@ AMDSMI_FW_ID_RLC
Rasterizer and L2 Cache (rasterization process)
Definition amdsmi.h:582
@ AMDSMI_FW_ID_RS64_PFP
Hardware Block RS64 - Pixel Front End Processor.
Definition amdsmi.h:634
@ AMDSMI_FW_ID_SDMA_TH1
System Direct Memory Access - Thread Handler 1.
Definition amdsmi.h:623
@ AMDSMI_FW_ID_MMSCH
Multi-Media Shader Hardware Scheduler.
Definition amdsmi.h:605
@ AMDSMI_FW_ID_RS64_MEC_P7_DATA
7 Data
Definition amdsmi.h:679
@ AMDSMI_FW_ID_RLX6
Hardware Block RLX6.
Definition amdsmi.h:629
@ AMDSMI_FW_ID_PSP_SOSDRV
Platform Security Processor Secure Operating System Driver.
Definition amdsmi.h:607
@ AMDSMI_FW_ID_TA_RAS
Trusted Applications - Reliability Availability and Serviceability.
Definition amdsmi.h:657
@ AMDSMI_FW_ID_PSP_KEYDB
Platform Security Processor Table of Contents.
Definition amdsmi.h:609
@ AMDSMI_FW_ID_RLC_SRLS
Rasterizer and L2 Cache - Shared Resource Local Segment.
Definition amdsmi.h:661
@ AMDSMI_FW_ID_VCE
Video Coding Engine (Encoding video)
Definition amdsmi.h:593
@ AMDSMI_FW_ID_DMCU_ISR
(interrupt handlers)
Definition amdsmi.h:597
@ AMDSMI_FW_ID_SDMA6
System Direct Memory Access 6 (high speed data transfers)
Definition amdsmi.h:589
@ AMDSMI_FW_ID_PSP_DBG
Platform Security Processor - Debug.
Definition amdsmi.h:650
@ AMDSMI_FW_ID_CP_CE
Compute Processor - Command_Engine (fetch, decode, dispatch)
Definition amdsmi.h:571
@ AMDSMI_FW_ID_P2S_TABLE
Processor-to-System Table Firmware.
Definition amdsmi.h:667
@ AMDSMI_FW_ID_DRV_CAP
Driver Capabilities (capabilities, features)
Definition amdsmi.h:612
@ AMDSMI_FW_ID_RS64_ME_P1_DATA
Hardware Block RS64 - Micro Engine Partition 1 Data.
Definition amdsmi.h:633
@ AMDSMI_FW_ID_MES_THREAD1
Micro Engine Scheduler - Thread 1.
Definition amdsmi.h:627
@ AMDSMI_FW_ID_PM
Power Management Firmware.
Definition amdsmi.h:662
@ AMDSMI_FW_ID_SDMA0
System Direct Memory Access 0 (high speed data transfers)
Definition amdsmi.h:583
@ AMDSMI_FW_ID_ISP
Image Signal Processor (processing raw image data from sensors)
Definition amdsmi.h:594
@ AMDSMI_FW_ID_PSP_SOC
Platform Security Processor - System On a Chip.
Definition amdsmi.h:649
@ AMDSMI_FW_ID_CP_PM4
Compute Processor Packet Processor 4 (processing command packets)
Definition amdsmi.h:615
@ AMDSMI_FW_ID_RLC_P
Rasterizer and L2 Cache Partition.
Definition amdsmi.h:616
@ AMDSMI_FW_ID_SDMA_TH0
System Direct Memory Access - Thread Handler 0.
Definition amdsmi.h:622
@ AMDSMI_FW_ID_MC
Memory Controller (RAM and VRAM)
Definition amdsmi.h:613
@ AMDSMI_FW_ID_VCN
Video Core Next (encoding and decoding)
Definition amdsmi.h:591
@ AMDSMI_FW_ID_RLX6_DRAM_BOOT_CORE1
Hardware Block RLX6 Core 1 - Dynamic RAM Boot.
Definition amdsmi.h:653
@ AMDSMI_FW_ID_MES_STACK
Micro Engine Scheduler - Stack.
Definition amdsmi.h:626
@ AMDSMI_FW_ID_XGMI
XGMI (Interconnect) Firmware.
Definition amdsmi.h:659
@ AMDSMI_FW_ID_PSP_TOC
Platform Security Processor Table of Contents.
Definition amdsmi.h:608
@ AMDSMI_FW_ID_IMU_IRAM
Input/Output Memory Management Unit - Instruction RAM.
Definition amdsmi.h:621
@ AMDSMI_FW_ID_RS64_MEC_P4_DATA
4 Data
Definition amdsmi.h:673
@ AMDSMI_FW_ID_RS64_KIQ
Hardware Block RS64 - Kernel Indirect Queue.
Definition amdsmi.h:671
@ AMDSMI_FW_ID_SEC_POLICY_STAGE2
Security Policy Stage 2 (security features)
Definition amdsmi.h:617
@ AMDSMI_FW_ID_RS64_MEC_P2_DATA
2 Data
Definition amdsmi.h:644
@ AMDSMI_FW_ID_RS64_MEC_P6_DATA
6 Data
Definition amdsmi.h:677
@ AMDSMI_FW_ID_PLDM_BUNDLE
Platform Level Data Model Firmware Bundle.
Definition amdsmi.h:668
@ AMDSMI_FW_ID_TA_XGMI
Trusted Applications - Reliability XGMI.
Definition amdsmi.h:658
@ AMDSMI_FW_ID_RS64_ME
Hardware Block RS64 - Micro Engine.
Definition amdsmi.h:631
@ AMDSMI_FW_ID_RS64_MEC_P5_DATA
5 Data
Definition amdsmi.h:675
@ AMDSMI_FW_ID_SDMA3
System Direct Memory Access 3 (high speed data transfers)
Definition amdsmi.h:586
@ AMDSMI_FW_ID_RS64_MES
Hardware Block RS64 - Micro Engine Scheduler.
Definition amdsmi.h:669
@ AMDSMI_FW_ID_SDMA1
System Direct Memory Access 1 (high speed data transfers)
Definition amdsmi.h:584
@ AMDSMI_FW_ID_PSP_IPKEYMGR
Platform Security Processor - IP Key Manager.
Definition amdsmi.h:683
@ AMDSMI_FW_ID_CP_ME
Compute Processor - Micro Engine (specialize processing)
Definition amdsmi.h:573
@ AMDSMI_FW_ID_RS64_KIQ_STACK
Hardware Block RS64 - Kernel Indirect Queue Stack.
Definition amdsmi.h:672
@ AMDSMI_FW_ID_RS64_MEC_P3_DATA
3 Data
Definition amdsmi.h:646
@ AMDSMI_FW_ID_CP_MEC_JT1
(queues, scheduling)
Definition amdsmi.h:574
@ AMDSMI_FW_ID_UVD
Unified Video Decoder (decode specific video formats)
Definition amdsmi.h:592
@ AMDSMI_FW_ID_RLC_V
Rasterizer and L2 Cache Virtual memory.
Definition amdsmi.h:604
@ AMDSMI_FW_ID_SMC
System Management Controller Firmware.
Definition amdsmi.h:663
@ AMDSMI_FW_ID_SDMA4
System Direct Memory Access 4 (high speed data transfers)
Definition amdsmi.h:587
@ AMDSMI_FW_ID_MES_KIQ
Micro Engine Scheduler - Kernel Indirect Queue.
Definition amdsmi.h:625
@ AMDSMI_FW_ID_PSP_IOVM
Platform Security Processor - I/O Virtual Machine.
Definition amdsmi.h:684
@ AMDSMI_FW_ID_DMCU
Display Micro-Controller Unit.
Definition amdsmi.h:664
@ AMDSMI_FW_ID_LSDMA
Low-power System Direct Memory Access (F32 LSDMA)
Definition amdsmi.h:681
@ AMDSMI_FW_ID_RLC_SRLG
Rasterizer and L2 Cache - Shared Resource Local Group.
Definition amdsmi.h:660
@ AMDSMI_FW_ID_RS64_PFP_P1_DATA
Partition 1 Data.
Definition amdsmi.h:637
@ AMDSMI_FW_ID_RLX6_DRAM_BOOT
Hardware Block RLX6 - Dynamic Ram Boot.
Definition amdsmi.h:630
@ AMDSMI_FW_ID_IMU_DRAM
Input/Output Memory Management Unit - Dynamic RAM.
Definition amdsmi.h:620
@ AMDSMI_FW_ID_CP_MEC1
managing resources)
Definition amdsmi.h:578
@ AMDSMI_FW_ID_RLC_RESTORE_LIST_CNTL
Rasterizer and L2 Cache Restore List Control.
Definition amdsmi.h:603
@ AMDSMI_FW_ID_RS64_MEC_P0_DATA
0 Data
Definition amdsmi.h:640
@ AMDSMI_FW_ID_RLX6_CORE1
Hardware Block RLX6 - Core 1.
Definition amdsmi.h:652
@ AMDSMI_FW_ID_RS64_MEC_P1_DATA
1 Data
Definition amdsmi.h:642
@ AMDSMI_FW_ID_MP5
Management Processor 5.
Definition amdsmi.h:682
@ AMDSMI_FW_ID_RLC_RESTORE_LIST_GPM_MEM
Processor Memory.
Definition amdsmi.h:599
@ AMDSMI_FW_ID_PSP_INTF
Platform Security Processor - Interface.
Definition amdsmi.h:651
@ AMDSMI_FW_ID_PSP_SPDM
Platform Security Processor - Security Protocol and Data Model.
Definition amdsmi.h:685
@ AMDSMI_FW_ID_CP_MEC_JT2
(queues, scheduling)
Definition amdsmi.h:576
@ AMDSMI_FW_ID_RLC_SAVE_RESTORE_LIST
Rasterizer and L2 Cache - Save Restore List.
Definition amdsmi.h:655
@ AMDSMI_FW_ID_CP_PFP
Compute Processor - Pixel Front End Processor (pixelating process)
Definition amdsmi.h:572
@ AMDSMI_FW_ID_PSP_RAS
Serviceability Firmware.
Definition amdsmi.h:665
@ AMDSMI_FW_ID_MES_THREAD1_STACK
Micro Engine Scheduler - Thread 1 Stack.
Definition amdsmi.h:628
@ AMDSMI_FW_ID_SMU
Definition amdsmi.h:568
@ AMDSMI_FW_ID_PPTABLE
Power Policy Table (power management policies)
Definition amdsmi.h:648
@ AMDSMI_FW_ID_PSP_SPL
Platform Security Processor Secure Program Loader.
Definition amdsmi.h:611
@ AMDSMI_FW_ID_REG_ACCESS_WHITELIST
access)
Definition amdsmi.h:618
@ AMDSMI_FW_ID_PSP_SYSDRV
Platform Security Processor System Driver.
Definition amdsmi.h:606
@ AMDSMI_FW_ID_RS64_MES_STACK
Hardware Block RS64 - Micro Engine Scheduler Stack.
Definition amdsmi.h:670
@ AMDSMI_FW_ID_RS64_PFP_P0_DATA
Partition 0 Data.
Definition amdsmi.h:635
@ AMDSMI_FW_ID_SDMA5
System Direct Memory Access 5 (high speed data transfers)
Definition amdsmi.h:588
@ AMDSMI_FW_ID_SDMA2
System Direct Memory Access 2 (high speed data transfers)
Definition amdsmi.h:585
@ AMDSMI_FW_ID_CP_MES
Compute Processor - Micro Engine Scheduler.
Definition amdsmi.h:624
@ AMDSMI_FW_ID_DMCU_ERAM
DMU)
Definition amdsmi.h:595
@ AMDSMI_FW_ID_RLCV_LX7
Hardware Block RLCV - Subsystem LX7.
Definition amdsmi.h:654
@ AMDSMI_FW_ID_RS64_MEC
Hardware Block RS64 - Micro Engine Controller.
Definition amdsmi.h:639
@ AMDSMI_FW_ID_DFC
Data Fabric Controller (bandwidth and coherency)
Definition amdsmi.h:610
@ AMDSMI_FW_ID_CP_MEC2
managing resources)
Definition amdsmi.h:580
@ AMDSMI_FW_ID_PSP_DPE
Platform Security Processor - Data Path Engine.
Definition amdsmi.h:686
amdsmi_driver_t
Driver.
Definition amdsmi.h:2321
#define AMDSMI_MAX_NIC_PORTS
Maximum size definitions AMDSMI NIC.
Definition amdsmi.h:3080
#define AMDSMI_MAX_DATE_STRING_LENGTH
Maximum size definitions for date strings.
Definition amdsmi.h:1772
#define AMDSMI_MAX_TA_WHITE_LIST_ELEMENTS
Maximum number of TA (Trusted Application) white list elements/*#end#*‍/.
Definition amdsmi.h:199
amdsmi_virtualization_mode_t
Variant placeholder.
Definition amdsmi.h:698
@ AMDSMI_VIRTUALIZATION_MODE_BAREMETAL
Baremetal Virtualization Mode.
Definition amdsmi.h:700
@ AMDSMI_VIRTUALIZATION_MODE_UNKNOWN
Unknown Virtualization Mode.
Definition amdsmi.h:699
@ AMDSMI_VIRTUALIZATION_MODE_HOST
Host Virtualization Mode.
Definition amdsmi.h:701
@ AMDSMI_VIRTUALIZATION_MODE_GUEST
Guest Virtualization Mode.
Definition amdsmi.h:702
@ AMDSMI_VIRTUALIZATION_MODE_PASSTHROUGH
Passthrough Virtualization Mode.
Definition amdsmi.h:703
#define AMDSMI_MAX_STRING_LENGTH
Maximum length for string buffers.
Definition amdsmi.h:171
amdsmi_guest_fw_engine_id_t
The values of this enum are used to identify the various firmware blocks.
Definition amdsmi.h:2239
amdsmi_metric_unit_t
Metric Unit.
Definition amdsmi.h:2603
amdsmi_link_status_t
Link Status.
Definition amdsmi.h:742
amdsmi_ecc_correction_schema_support_t
The values of this enum are used to identify supported ecc correction schema.
Definition amdsmi.h:2227
amdsmi_event_driver_t
Event Driver.
Definition amdsmi.h:1828
#define AMDSMI_FABRIC_LABEL_MAX_LENGTH
Fabric textual label structure.
Definition amdsmi.h:1436
amdsmi_compute_tray_type_t
Compute tray form factor type.
Definition amdsmi.h:730
#define AMDSMI_MAX_BLACK_LIST_ELEMENTS
Maximum number of black list elements for device access control/*#end#*‍/.
Definition amdsmi.h:196
amdsmi_processor_type_t
Processor types detectable by AMD SMI.
Definition amdsmi.h:58
@ AMDSMI_PROCESSOR_TYPE_AMD_APU
die
Definition amdsmi.h:67
@ AMDSMI_PROCESSOR_TYPE_UNKNOWN
Unknown processor type.
Definition amdsmi.h:59
@ AMDSMI_PROCESSOR_TYPE_NON_AMD_CPU
Non-AMD CPU processor type.
Definition amdsmi.h:64
@ AMDSMI_PROCESSOR_TYPE_AMD_CPU
the CPU
Definition amdsmi.h:61
@ AMDSMI_PROCESSOR_TYPE_AMD_CPU_CORE
units within the CPU
Definition amdsmi.h:65
@ AMDSMI_PROCESSOR_TYPE_AMD_GPU
AMD Graphics processor type.
Definition amdsmi.h:60
@ AMDSMI_PROCESSOR_TYPE_BRCM_NIC
Broadcom Network Interface Card processor type.
Definition amdsmi.h:70
@ AMDSMI_PROCESSOR_TYPE_NON_AMD_GPU
Non-AMD Graphics processor type.
Definition amdsmi.h:63
@ AMDSMI_PROCESSOR_TYPE_AMD_NIC
AMD Network Interface Card processor type.
Definition amdsmi.h:69
@ AMDSMI_PROCESSOR_TYPE_BRCM_SWITCH
Broadcom Switch processor type.
Definition amdsmi.h:71
amdsmi_processor_type_t processor_type_t
Backward-compatibility alias for amdsmi_processor_type_t.
Definition amdsmi.h:85
amdsmi_memory_partition_type_t
Memory Partitions.
Definition amdsmi.h:226
@ AMDSMI_MEMORY_PARTITION_NPS8
Definition amdsmi.h:236
@ AMDSMI_MEMORY_PARTITION_NPS1
Definition amdsmi.h:228
@ AMDSMI_MEMORY_PARTITION_NPS2
Definition amdsmi.h:230
@ AMDSMI_MEMORY_PARTITION_NPS4
Definition amdsmi.h:233
#define AMDSMI_MAX_NIC_RDMA_DEV
Maximum number of NIC RDMA devices.
Definition amdsmi.h:3081
amdsmi_event_iov_t
Event IOV.
Definition amdsmi.h:1964
amdsmi_guard_state_t
Guard State.
Definition amdsmi.h:2335
amdsmi_sched_block_t
Schedule Block.
Definition amdsmi.h:2346
amdsmi_tdi_state_t
TDI state enumeration.
Definition amdsmi.h:2667
@ AMDSMI_TDI_STATE_LOCKED
TDI (TEE Device Interface) is locked.
Definition amdsmi.h:2669
@ AMDSMI_TDI_STATE_ERROR
used
Definition amdsmi.h:2671
@ AMDSMI_TDI_STATE_UNLOCKED
TDI (TEE Device Interface) is unlocked;.
Definition amdsmi.h:2668
@ AMDSMI_TDI_STATE_RUN
TDI (TEE Device Interface) is actively running.
Definition amdsmi.h:2670
void * amdsmi_processor_handle
opaque handler point to underlying implementation
Definition amdsmi.h:50
amdsmi_event_gpu_t
Below are the error subcodes of each category.
Definition amdsmi.h:1810
amdsmi_fabric_type_t
Fabric type.
Definition amdsmi.h:1619
@ AMDSMI_FABRIC_TYPE_UALINK
Native UALink fabric.
Definition amdsmi.h:1621
@ AMDSMI_FABRIC_TYPE_UNKNOWN
Unknown fabric type.
Definition amdsmi.h:1622
@ AMDSMI_FABRIC_TYPE_UALOE
UALink-over-Ethernet fabric.
Definition amdsmi.h:1620
amdsmi_cache_property_type_t
cache properties
Definition amdsmi.h:502
@ AMDSMI_CACHE_PROPERTY_ENABLED
Cache enabled.
Definition amdsmi.h:503
@ AMDSMI_CACHE_PROPERTY_INST_CACHE
Instruction cache.
Definition amdsmi.h:505
@ AMDSMI_CACHE_PROPERTY_DATA_CACHE
Data cache.
Definition amdsmi.h:504
@ AMDSMI_CACHE_PROPERTY_SIMD_CACHE
Single Instruction, Multiple Data Cache.
Definition amdsmi.h:507
@ AMDSMI_CACHE_PROPERTY_CPU_CACHE
CPU cache.
Definition amdsmi.h:506
amdsmi_event_mmsch_t
Event MM Schedule.
Definition amdsmi.h:2190
#define AMDSMI_MAX_DEVICES
Maximum number of devices supported.
Definition amdsmi.h:170
amdsmi_fabric_size_constants_t
Fabric size constants.
Definition amdsmi.h:1490
@ AMDSMI_FABRIC_MAX_BITMAP_SIZE
Maximum bitmap size (64 bytes = 512 bits)
Definition amdsmi.h:1494
@ AMDSMI_FABRIC_MAX_LOCAL_GPUS
Maximum local GPUs in fabric.
Definition amdsmi.h:1493
@ AMDSMI_FABRIC_ACTIVE_ACCELERATORS_BITMAP_SIZE
Active accelerators bitmap size (32 x 32-bit words = 1024 bits)
Definition amdsmi.h:1491
amdsmi_status_t
Error codes returned by amdsmi functions.
Definition amdsmi.h:95
@ AMDSMI_STATUS_NOT_INIT
Processor not initialized.
Definition amdsmi.h:125
@ AMDSMI_STATUS_NON_AMD_CPU
System has different cpu than AMD.
Definition amdsmi.h:137
@ AMDSMI_STATUS_DIRECTORY_NOT_FOUND
Error when a directory is not found, maps to ENOTDIR.
Definition amdsmi.h:119
@ AMDSMI_STATUS_INVAL
Invalid parameters.
Definition amdsmi.h:98
@ AMDSMI_STATUS_BUSY
Processor busy.
Definition amdsmi.h:123
@ AMDSMI_STATUS_UNKNOWN_ERROR
An unknown error occurred.
Definition amdsmi.h:152
@ AMDSMI_STATUS_DRIVER_NOT_LOADED
Processor driver not loaded.
Definition amdsmi.h:127
@ AMDSMI_STATUS_FILE_ERROR
Problem accessing a file.
Definition amdsmi.h:111
@ AMDSMI_STATUS_DRM_ERROR
Error when call libdrm.
Definition amdsmi.h:103
@ AMDSMI_STATUS_CORRUPTED_EEPROM
EEPROM is corrupted.
Definition amdsmi.h:149
@ AMDSMI_STATUS_ARG_PTR_NULL
Parsed argument is invalid.
Definition amdsmi.h:146
@ AMDSMI_STATUS_IO
I/O Error.
Definition amdsmi.h:109
@ AMDSMI_STATUS_NO_HSMP_DRV
HSMP driver not found.
Definition amdsmi.h:140
@ AMDSMI_STATUS_HSMP_TIMEOUT
HSMP message timed out.
Definition amdsmi.h:143
@ AMDSMI_STATUS_NO_DATA
No data was found for a given input.
Definition amdsmi.h:130
@ AMDSMI_STATUS_RETRY
Retry operation.
Definition amdsmi.h:106
@ AMDSMI_STATUS_UNEXPECTED_SIZE
An unexpected amount of data was read.
Definition amdsmi.h:133
@ AMDSMI_STATUS_SETTING_UNAVAILABLE
Setting is not available.
Definition amdsmi.h:148
@ AMDSMI_STATUS_FILE_NOT_FOUND
file or directory not found
Definition amdsmi.h:145
@ AMDSMI_STATUS_INTERNAL_EXCEPTION
An internal exception was caught.
Definition amdsmi.h:113
@ AMDSMI_STATUS_NO_HSMP_SUP
HSMP not supported.
Definition amdsmi.h:141
@ AMDSMI_STATUS_MAP_ERROR
Library error did not map to a status code.
Definition amdsmi.h:151
@ AMDSMI_STATUS_FAIL_LOAD_SYMBOL
Fail to load symbol.
Definition amdsmi.h:102
@ AMDSMI_STATUS_INSUFFICIENT_SIZE
Not enough resources were available for the operation.
Definition amdsmi.h:131
@ AMDSMI_STATUS_INIT_ERROR
An error occurred when initializing internal data structures.
Definition amdsmi.h:116
@ AMDSMI_STATUS_OUT_OF_RESOURCES
Not enough memory.
Definition amdsmi.h:112
@ AMDSMI_STATUS_NO_SLOT
No more free slot.
Definition amdsmi.h:126
@ AMDSMI_STATUS_NO_MSR_DRV
MSR driver not found.
Definition amdsmi.h:139
@ AMDSMI_STATUS_INTERRUPT
An interrupt occurred during execution of function.
Definition amdsmi.h:108
@ AMDSMI_STATUS_SUCCESS
Call succeeded.
Definition amdsmi.h:96
@ AMDSMI_STATUS_NO_ENERGY_DRV
Energy driver not found.
Definition amdsmi.h:138
@ AMDSMI_STATUS_ADDRESS_FAULT
Bad address.
Definition amdsmi.h:110
@ AMDSMI_STATUS_MORE_DATA
There is more data than the buffer size the user passed.
Definition amdsmi.h:129
@ AMDSMI_STATUS_NOT_YET_IMPLEMENTED
Not implemented yet.
Definition amdsmi.h:100
@ AMDSMI_STATUS_NO_DRV
No Energy and HSMP driver present.
Definition amdsmi.h:144
@ AMDSMI_STATUS_IPC_ERROR
IPC communication error occurred.
Definition amdsmi.h:121
@ AMDSMI_STATUS_NO_PERM
Permission Denied.
Definition amdsmi.h:107
@ AMDSMI_STATUS_NOT_FOUND
Processor Not found.
Definition amdsmi.h:124
@ AMDSMI_STATUS_FAIL_LOAD_MODULE
Fail to load lib.
Definition amdsmi.h:101
@ AMDSMI_STATUS_AMDGPU_RESTART_ERR
AMDGPU restart failed.
Definition amdsmi.h:147
@ AMDSMI_STATUS_NOT_SUPPORTED
Command not supported.
Definition amdsmi.h:99
@ AMDSMI_STATUS_UNEXPECTED_DATA
The data read or provided to function is not what was expected.
Definition amdsmi.h:134
@ AMDSMI_STATUS_API_FAILED
API call failed.
Definition amdsmi.h:104
@ AMDSMI_STATUS_TIMEOUT
Timeout in API call.
Definition amdsmi.h:105
@ AMDSMI_STATUS_NO_HSMP_MSG_SUP
HSMP message/feature not supported.
Definition amdsmi.h:142
@ AMDSMI_STATUS_INPUT_OUT_OF_BOUNDS
The provided input is out of allowable or safe range.
Definition amdsmi.h:114
@ AMDSMI_STATUS_REFCOUNT_OVERFLOW
An internal reference counter exceeded INT32_MAX.
Definition amdsmi.h:118
#define AMDSMI_MAX_NUM_PM_POLICIES
Maximum number of power management policies.
Definition amdsmi.h:161
amdsmi_guest_fw_load_status_t
Guest firmware load status.
Definition amdsmi.h:2360
amdsmi_xgmi_fb_sharing_mode_t
XGMI FB Sharing Mode.
Definition amdsmi.h:2373
amdsmi_ptl_data_format_t
PTL (Peak Tops Limiter) data format types These correspond to the hardware data types used in matrix ...
Definition amdsmi.h:757
@ AMDSMI_PTL_DATA_FORMAT_INVALID
Invalid format.
Definition amdsmi.h:765
@ AMDSMI_PTL_DATA_FORMAT_I8
Integer 8-bit format.
Definition amdsmi.h:758
@ AMDSMI_PTL_DATA_FORMAT_F64
Float 64-bit format.
Definition amdsmi.h:762
@ AMDSMI_PTL_DATA_FORMAT_F8
Float 8-bit format.
Definition amdsmi.h:763
@ AMDSMI_PTL_DATA_FORMAT_BF16
Brain Float 16-bit format.
Definition amdsmi.h:760
@ AMDSMI_PTL_DATA_FORMAT_F32
Float 32-bit format.
Definition amdsmi.h:761
@ AMDSMI_PTL_DATA_FORMAT_F16
Float 16-bit format.
Definition amdsmi.h:759
@ AMDSMI_PTL_DATA_FORMAT_VECTOR
Vector format.
Definition amdsmi.h:764
amdsmi_affinity_scope_t
Scope for Numa affinity or Socket affinity.
Definition amdsmi.h:711
@ AMDSMI_AFFINITY_SCOPE_NODE
Memory affinity as numa node.
Definition amdsmi.h:712
@ AMDSMI_AFFINITY_SCOPE_SOCKET
socket affinity
Definition amdsmi.h:713
amdsmi_fabric_accelerator_vpod_state_t
Fabric accelerator vPoD state.
Definition amdsmi.h:1513
amdsmi_temperature_metric_t
Temperature Metrics. This enum is used to identify various temperature metrics. Corresponding values ...
Definition amdsmi.h:437
@ AMDSMI_TEMP_CRITICAL_HYST
Definition amdsmi.h:448
@ AMDSMI_TEMP_CRITICAL
Definition amdsmi.h:446
@ AMDSMI_TEMP_OFFSET
Definition amdsmi.h:460
@ AMDSMI_TEMP_EMERGENCY
Definition amdsmi.h:450
@ AMDSMI_TEMP_LOWEST
Historical min temperature.
Definition amdsmi.h:462
@ AMDSMI_TEMP_CRIT_MIN
Definition amdsmi.h:456
@ AMDSMI_TEMP_SHUTDOWN
Shutdown temperature.
Definition amdsmi.h:464
@ AMDSMI_TEMP_EMERGENCY_HYST
Definition amdsmi.h:454
@ AMDSMI_TEMP_CURRENT
Current temperature.
Definition amdsmi.h:438
@ AMDSMI_TEMP_MIN
Min temperature.
Definition amdsmi.h:441
@ AMDSMI_TEMP_HIGHEST
Historical max temperature.
Definition amdsmi.h:463
@ AMDSMI_TEMP_CRIT_MIN_HYST
Definition amdsmi.h:458
@ AMDSMI_TEMP_MIN_HYST
Definition amdsmi.h:444
@ AMDSMI_TEMP_MAX_HYST
Definition amdsmi.h:442
@ AMDSMI_TEMP_MAX
Max temperature.
Definition amdsmi.h:440
amdsmi_event_category_t
Event Category.
Definition amdsmi.h:1786
amdsmi_cper_sev_t
Cper sev.
Definition amdsmi.h:1258
@ AMDSMI_CPER_SEV_NUM
CPER severity Number.
Definition amdsmi.h:1262
@ AMDSMI_CPER_SEV_NON_FATAL_CORRECTED
CPER Non-Fatal Corrected severity.
Definition amdsmi.h:1261
@ AMDSMI_CPER_SEV_NON_FATAL_UNCORRECTED
CPER Non-Fatal Uncorrected severity.
Definition amdsmi.h:1259
@ AMDSMI_CPER_SEV_FATAL
CPER Fatal severity.
Definition amdsmi.h:1260
@ AMDSMI_CPER_SEV_UNUSED
CPER Unused severity.
Definition amdsmi.h:1263
amdsmi_gpu_block_t
This enum is used to identify different GPU blocks.
Definition amdsmi.h:515
@ AMDSMI_GPU_BLOCK_SHUB
SHUB block.
Definition amdsmi.h:554
@ AMDSMI_GPU_BLOCK_ECLR
ECLR block.
Definition amdsmi.h:541
@ AMDSMI_GPU_BLOCK_XGMI_WAFL
XGMI block.
Definition amdsmi.h:525
@ AMDSMI_GPU_BLOCK_MPRAS
MPRAS block.
Definition amdsmi.h:546
@ AMDSMI_GPU_BLOCK_GFX
GFX block.
Definition amdsmi.h:520
@ AMDSMI_GPU_BLOCK_OXRP
OXRP block.
Definition amdsmi.h:549
@ AMDSMI_GPU_BLOCK_ATU
ATU block.
Definition amdsmi.h:539
@ AMDSMI_GPU_BLOCK_IH
IH block.
Definition amdsmi.h:535
@ AMDSMI_GPU_BLOCK_NBIF
NBIF block.
Definition amdsmi.h:547
@ AMDSMI_GPU_BLOCK_PCS_XGMI
PCS_XGMI block.
Definition amdsmi.h:551
@ AMDSMI_GPU_BLOCK_DACC_BE
DACC_BE block.
Definition amdsmi.h:540
@ AMDSMI_GPU_BLOCK_LSDMA
LSDMA block.
Definition amdsmi.h:543
@ AMDSMI_GPU_BLOCK_VCN
VCN block.
Definition amdsmi.h:533
@ AMDSMI_GPU_BLOCK_INVALID
Invalid block.
Definition amdsmi.h:516
@ AMDSMI_GPU_BLOCK_PIE
PIE block.
Definition amdsmi.h:552
@ AMDSMI_GPU_BLOCK_MP0
MP0 block.
Definition amdsmi.h:529
@ AMDSMI_GPU_BLOCK_SSBDCI
SSBDCI block.
Definition amdsmi.h:555
@ AMDSMI_GPU_BLOCK_HDP
HDP block.
Definition amdsmi.h:524
@ AMDSMI_GPU_BLOCK_MPIO
MPIO block.
Definition amdsmi.h:536
@ AMDSMI_GPU_BLOCK_ATHUB
ATHUB block.
Definition amdsmi.h:522
@ AMDSMI_GPU_BLOCK_CS
CS block.
Definition amdsmi.h:553
@ AMDSMI_GPU_BLOCK_UCIE_PCS
UCIE_PCS block.
Definition amdsmi.h:556
@ AMDSMI_GPU_BLOCK_KPX_SERDES
KPX_SERDES block.
Definition amdsmi.h:542
@ AMDSMI_GPU_BLOCK_MP1
MP1 block.
Definition amdsmi.h:530
@ AMDSMI_GPU_BLOCK_PCIE_BIF
PCIE_BIF block.
Definition amdsmi.h:523
@ AMDSMI_GPU_BLOCK_SDMA
SDMA block.
Definition amdsmi.h:519
@ AMDSMI_GPU_BLOCK_JPEG
JPEG block.
Definition amdsmi.h:534
@ AMDSMI_GPU_BLOCK_MP5
MP5 block.
Definition amdsmi.h:538
@ AMDSMI_GPU_BLOCK_UMC
UMC block.
Definition amdsmi.h:518
@ AMDSMI_GPU_BLOCK_PCIE_PL
PCIE_PL block.
Definition amdsmi.h:550
@ AMDSMI_GPU_BLOCK_FUSE
Fuse block.
Definition amdsmi.h:531
@ AMDSMI_GPU_BLOCK_DF
DF block.
Definition amdsmi.h:526
@ AMDSMI_GPU_BLOCK_MPIFOE
MPIFOE block.
Definition amdsmi.h:545
@ AMDSMI_GPU_BLOCK_MPART
MPART block.
Definition amdsmi.h:544
@ AMDSMI_GPU_BLOCK_MMHUB
MMHUB block.
Definition amdsmi.h:521
@ AMDSMI_GPU_BLOCK_NBIO
NBIO block.
Definition amdsmi.h:548
@ AMDSMI_GPU_BLOCK_SMN
SMN block.
Definition amdsmi.h:527
@ AMDSMI_GPU_BLOCK_SEM
SEM block.
Definition amdsmi.h:528
@ AMDSMI_GPU_BLOCK_MCA
MCA block.
Definition amdsmi.h:532
@ AMDSMI_GPU_BLOCK_MMSCH
MMSCH block.
Definition amdsmi.h:537
amdsmi_metric_name_t
Metric Name.
Definition amdsmi.h:2425
amdsmi_vf_sched_state_t
VF Schedule State.
Definition amdsmi.h:2291
amdsmi_fabric_npa_address_mode_t
Fabric NPA address mode.
Definition amdsmi.h:1502
amdsmi_event_sched_t
Event Schedule.
Definition amdsmi.h:2071
amdsmi_nic_fw_version_type_t
NIC firmware version types.
Definition amdsmi.h:3089
@ AMDSMI_NIC_FW_VERSION_TYPE_RUNNING
Currently running firmware version.
Definition amdsmi.h:3091
@ AMDSMI_NIC_FW_VERSION_TYPE_FIXED
Fixed (hardware) firmware version.
Definition amdsmi.h:3090
@ AMDSMI_NIC_FW_VERSION_TYPE_STORED
Stored (pending) firmware version.
Definition amdsmi.h:3092
amdsmi_driver_model_type_t
The values of this enum are used to identify driver model type.
Definition amdsmi.h:977
amdsmi_temperature_type_t
This enumeration is used to indicate from which part of the processor a temperature reading should be...
Definition amdsmi.h:339
@ AMDSMI_TEMPERATURE_TYPE_GPUBOARD_NODE_OAM_X_04_HBM_D_VR
regulator temperature
Definition amdsmi.h:362
@ AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDCR_VDD3
VDDCR VDD3 voltage regulator temperature.
Definition amdsmi.h:372
@ AMDSMI_TEMPERATURE_TYPE_BASEBOARD_OAM_0_1_HSC
OAM 0-1 HSC temperature.
Definition amdsmi.h:400
@ AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDCR_SOC_A
VDDCR SOC A voltage regulator temperature.
Definition amdsmi.h:373
@ AMDSMI_TEMPERATURE_TYPE_BASEBOARD_OAM_6_7_HSC
OAM 6-7 HSC temperature.
Definition amdsmi.h:403
@ AMDSMI_TEMPERATURE_TYPE_HBM_2
High Bandwidth 2 temperature per stack.
Definition amdsmi.h:348
@ AMDSMI_TEMPERATURE_TYPE_GPUBOARD_NODE_OAM_X_IBC_2
OAM X IBC 2 temperature.
Definition amdsmi.h:357
@ AMDSMI_TEMPERATURE_TYPE_BASEBOARD_RETIMER_4_5_0V9_VR
regulator temperature
Definition amdsmi.h:414
@ AMDSMI_TEMPERATURE_TYPE_HOTSPOT
Hottest temperature reported for entire die.
Definition amdsmi.h:342
@ AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDD_085_HBM
temperature
Definition amdsmi.h:379
@ AMDSMI_TEMPERATURE_TYPE_HBM_0
High Bandwidth 0 temperature per stack.
Definition amdsmi.h:346
@ AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDCR_VDD2
VDDCR VDD2 voltage regulator temperature.
Definition amdsmi.h:371
@ AMDSMI_TEMPERATURE_TYPE_BASEBOARD_UBB_IBC
UBB IBC temperature.
Definition amdsmi.h:397
@ AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDCR_11_HBM_D
temperature
Definition amdsmi.h:383
@ AMDSMI_TEMPERATURE_TYPE_JUNCTION
Synonymous with HOTSPOT.
Definition amdsmi.h:343
@ AMDSMI_TEMPERATURE_TYPE_BASEBOARD_RETIMER_4_5_6_7_1V2_VR
regulator temperature
Definition amdsmi.h:410
@ AMDSMI_TEMPERATURE_TYPE_HBM_3
High Bandwidth 3 temperature per stack.
Definition amdsmi.h:349
@ AMDSMI_TEMPERATURE_TYPE_VRAM
VRAM temperature on graphics card.
Definition amdsmi.h:345
@ AMDSMI_TEMPERATURE_TYPE_BASEBOARD_OAM_2_3_HSC
OAM 2-3 HSC temperature.
Definition amdsmi.h:401
@ AMDSMI_TEMPERATURE_TYPE_EDGE
Edge temperature.
Definition amdsmi.h:340
@ AMDSMI_TEMPERATURE_TYPE_BASEBOARD_UBB_UFPGA
UBB UFPGA temperature.
Definition amdsmi.h:398
@ AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDD_USR
VDD USR voltage regulator temperature.
Definition amdsmi.h:385
@ AMDSMI_TEMPERATURE_TYPE_GPUBOARD_NODE_OAM_X_04_HBM_B_VR
regulator temperature
Definition amdsmi.h:360
@ AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDCR_SOC_C
VDDCR SOC C voltage regulator temperature.
Definition amdsmi.h:374
@ AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDCR_SOCIO_A
temperature
Definition amdsmi.h:375
@ AMDSMI_TEMPERATURE_TYPE_BASEBOARD_IBC_HSC
IBC HSC temperature.
Definition amdsmi.h:424
@ AMDSMI_TEMPERATURE_TYPE_BASEBOARD_OAM_4_5_HSC
OAM 4-5 HSC temperature.
Definition amdsmi.h:402
@ AMDSMI_TEMPERATURE_TYPE_BASEBOARD_RETIMER_2_3_0V9_VR
regulator temperature
Definition amdsmi.h:416
@ AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDCR_VDD1
VDDCR VDD1 voltage regulator temperature.
Definition amdsmi.h:370
@ AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDCR_SOCIO_C
temperature
Definition amdsmi.h:377
@ AMDSMI_TEMPERATURE_TYPE_BASEBOARD_RETIMER_0_1_0V9_VR
regulator temperature
Definition amdsmi.h:412
@ AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDCR_VDD0
VDDCR VDD0 voltage regulator temperature.
Definition amdsmi.h:368
@ AMDSMI_TEMPERATURE_TYPE_BASEBOARD_UBB_FPGA_0V72_VR
temperature
Definition amdsmi.h:404
@ AMDSMI_TEMPERATURE_TYPE_BASEBOARD_UBB_FPGA_3V3_VR
temperature
Definition amdsmi.h:406
@ AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDIO_11_E32
temperature
Definition amdsmi.h:386
@ AMDSMI_TEMPERATURE_TYPE_PLX
PCIe switch temperature.
Definition amdsmi.h:350
@ AMDSMI_TEMPERATURE_TYPE_HBM_1
High Bandwidth 1 temperature per stack.
Definition amdsmi.h:347
@ AMDSMI_TEMPERATURE_TYPE_BASEBOARD_UBB_OAM7
UBB OAM7 temperature.
Definition amdsmi.h:396
@ AMDSMI_TEMPERATURE_TYPE_BASEBOARD_OAM_0_1_2_3_3V3_VR
regulator temperature
Definition amdsmi.h:420
@ AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDCR_11_HBM_B
temperature
Definition amdsmi.h:381
@ AMDSMI_TEMPERATURE_TYPE_BASEBOARD_UBB_BACK
UBB back temperature.
Definition amdsmi.h:395
@ AMDSMI_TEMPERATURE_TYPE_BASEBOARD_UBB_FPGA
UBB FPGA temperature.
Definition amdsmi.h:392
@ AMDSMI_TEMPERATURE_TYPE_GPUBOARD_NODE_RETIMER_X
Retimer X temperature.
Definition amdsmi.h:354
@ AMDSMI_TEMPERATURE_TYPE_BASEBOARD_IBC
IBC temperature.
Definition amdsmi.h:425
@ AMDSMI_TEMPERATURE_TYPE_GPUBOARD_NODE_OAM_X_VDD18_VR
temperature
Definition amdsmi.h:358
@ AMDSMI_TEMPERATURE_TYPE_GPUBOARD_NODE_OAM_X_IBC
OAM X IBC temperature.
Definition amdsmi.h:356
@ AMDSMI_TEMPERATURE_TYPE_BASEBOARD_RETIMER_0_1_2_3_1V2_VR
regulator temperature
Definition amdsmi.h:408
@ AMDSMI_TEMPERATURE_TYPE_BASEBOARD_UBB_FRONT
UBB front temperature.
Definition amdsmi.h:394
@ AMDSMI_TEMPERATURE_TYPE_BASEBOARD_RETIMER_6_7_0V9_VR
regulator temperature
Definition amdsmi.h:418
@ AMDSMI_TEMPERATURE_TYPE_BASEBOARD_OAM_4_5_6_7_3V3_VR
regulator temperature
Definition amdsmi.h:422
@ AMDSMI_TEMPERATURE_TYPE__MAX
Maximum per GPU temperature type.
Definition amdsmi.h:427
@ AMDSMI_TEMPERATURE_TYPE_BASEBOARD_UBB_OAM1
UBB OAM1 temperature.
Definition amdsmi.h:399
#define AMDSMI_MAX_UUID_ELEMENTS
Maximum number of UUID elements supported.
Definition amdsmi.h:198
#define AMDSMI_MAX_NUM_FREQUENCIES
Guaranteed maximum possible number of supported frequencies/*#end#*‍/.
Definition amdsmi.h:203
#define AMDSMI_MAX_CACHE_TYPES
Maximum number of cache types.
Definition amdsmi.h:172
#define AMDSMI_DFC_FW_NUMBER_OF_ENTRIES
Number of DFC firmware entries supported.
Definition amdsmi.h:193
#define AMDSMI_MAX_NUM_NUMA_NODES
Maximum number of NUMA nodes.
Definition amdsmi.h:176
amdsmi_status_t amdsmi_set_gpu_accelerator_partition_profile(amdsmi_processor_handle processor_handle, uint32_t profile_index)
Set accelerator partition setting based on profile_index from amdsmi_get_gpu_accelerator_partition_pr...
amdsmi_status_t amdsmi_get_gpu_accelerator_partition_profile_config(amdsmi_processor_handle processor_handle, amdsmi_accelerator_partition_profile_config_t *profile_config)
Returns gpu accelerator partition caps as currently configured in the system.
amdsmi_status_t amdsmi_get_gpu_accelerator_partition_profile_config_global(amdsmi_processor_handle processor_handle, amdsmi_accelerator_partition_profile_config_global_t *config)
Returns all GPU accelerator partition capabilities which can be configured on the system.
amdsmi_status_t amdsmi_get_gpu_accelerator_partition_profile(amdsmi_processor_handle processor_handle, amdsmi_accelerator_partition_profile_t *profile, uint32_t *partition_id)
Returns current gpu accelerator partition cap.
amdsmi_status_t amdsmi_get_fb_layout(amdsmi_processor_handle processor_handle, amdsmi_pf_fb_info_t *info)
Returns the framebuffer info for the ASIC.
amdsmi_status_t amdsmi_get_power_cap_info(amdsmi_processor_handle processor_handle, uint32_t sensor_ind, amdsmi_power_cap_info_t *info)
Returns the power caps as currently configured in the system.
amdsmi_status_t amdsmi_get_pcie_info(amdsmi_processor_handle processor_handle, amdsmi_pcie_info_t *info)
Returns the PCIe info for the GPU.
amdsmi_status_t amdsmi_get_gpu_vram_info(amdsmi_processor_handle processor_handle, amdsmi_vram_info_t *info)
Returns vram info.
amdsmi_status_t amdsmi_get_gpu_board_info(amdsmi_processor_handle processor_handle, amdsmi_board_info_t *info)
Returns the board part number and board information for the requested device.
amdsmi_status_t amdsmi_get_gpu_asic_info(amdsmi_processor_handle processor_handle, amdsmi_asic_info_t *info)
Returns the ASIC information for the device.
amdsmi_status_t amdsmi_get_gpu_pci_bandwidth(amdsmi_processor_handle processor_handle, amdsmi_pcie_bandwidth_t *bandwidth)
Get the list of possible PCIe bandwidths that are available. It is not supported on virtual machine g...
amdsmi_status_t amdsmi_get_xgmi_plpd(amdsmi_processor_handle processor_handle, amdsmi_dpm_policy_t *xgmi_plpd)
Get the xgmi per-link power down policy parameter for the processor.
amdsmi_status_t amdsmi_set_xgmi_plpd(amdsmi_processor_handle processor_handle, uint32_t policy_id)
Set the xgmi per-link power down policy parameter for the processor.
amdsmi_status_t amdsmi_get_soc_pstate(amdsmi_processor_handle processor_handle, amdsmi_dpm_policy_t *policy)
Get the soc pstate policy for the processor.
amdsmi_status_t amdsmi_set_soc_pstate(amdsmi_processor_handle processor_handle, uint32_t policy_id)
Set the soc pstate policy for the processor.
amdsmi_status_t amdsmi_reset_gpu(amdsmi_processor_handle processor_handle)
Triggers a chain that resets all GPUs. It is not supported on virtual machine guest.
amdsmi_status_t amdsmi_get_tdi_state(amdsmi_vf_handle_t vf_handle, amdsmi_tdi_state_t *state)
Gets TDI (TEE(Trusted Execution Environment) Device Interface) state.
amdsmi_status_t amdsmi_get_cc_mode(amdsmi_processor_handle processor_handle, amdsmi_cc_mode_t *mode)
Gets CC (Confidential Compute) mode.
amdsmi_status_t amdsmi_set_cc_mode(amdsmi_processor_handle processor_handle, amdsmi_cc_mode_t mode)
Sets CC (Confidential Compute) mode.
amdsmi_status_t amdsmi_get_gpu_total_ecc_count(amdsmi_processor_handle processor_handle, amdsmi_error_count_t *ec)
Returns the total number of ECC errors (correctable, uncorrectable and deferred) in the given GPU....
amdsmi_status_t amdsmi_get_gpu_ecc_count(amdsmi_processor_handle processor_handle, amdsmi_gpu_block_t block, amdsmi_error_count_t *ec)
Retrieve the error counts for a GPU block. It is not supported on virtual machine guest.
amdsmi_status_t amdsmi_get_gpu_ecc_enabled(amdsmi_processor_handle processor_handle, uint64_t *enabled_blocks)
Retrieve the enabled ECC bit-mask. It is not supported on virtual machine guest.
amdsmi_status_t amdsmi_status_code_to_string(amdsmi_status_t status, const char **status_string)
Get a description of a provided AMDSMI error status.
amdsmi_status_t amdsmi_event_destroy(amdsmi_event_set set)
Destroys and frees an event set.
amdsmi_status_t amdsmi_event_read(amdsmi_event_set set, int64_t timeout_usec, amdsmi_event_entry_t *event)
The call blocks till timeout is expired to copy one event specified by the event set into the user pr...
amdsmi_status_t amdsmi_event_create(amdsmi_processor_handle *processor_list, uint32_t num_devices, uint64_t event_types, amdsmi_event_set *set)
Allocate a new event set notifier to monitor different types of issues with the GPU running virtualiz...
amdsmi_status_t amdsmi_get_gpu_vbios_info(amdsmi_processor_handle processor_handle, amdsmi_vbios_info_t *info)
Returns the static information for the vBIOS on the device.
amdsmi_status_t amdsmi_get_fw_info(amdsmi_processor_handle processor_handle, amdsmi_fw_info_t *info)
Returns the firmware versions running on the device.
amdsmi_status_t amdsmi_get_dfc_fw_table(amdsmi_processor_handle processor_handle, amdsmi_dfc_fw_t *info)
Returns the DFC fw table.
amdsmi_status_t amdsmi_get_fw_error_records(amdsmi_processor_handle processor_handle, amdsmi_fw_error_record_t *records)
Gets firmware error records.
amdsmi_status_t amdsmi_set_gpu_fabric_station_config(amdsmi_processor_handle processor_handle, const amdsmi_fabric_station_config_t *config)
Apply DF reconfiguration.
amdsmi_status_t amdsmi_set_gpu_fabric_vpod_config(amdsmi_processor_handle processor_handle, const amdsmi_fabric_vpod_config_t *config)
Apply VPOD configuration.
amdsmi_status_t amdsmi_get_gpu_fabric_info(amdsmi_processor_handle processor_handle, amdsmi_fabric_info_t *info)
Get Fabric device information.
amdsmi_status_t amdsmi_alloc_fabric_telemetry(amdsmi_processor_handle processor_handle, uint32_t category_mask, amdsmi_fabric_telemetry_t **telemetry)
Allocate storage for Fabric telemetry data.
amdsmi_status_t amdsmi_set_gpu_fabric_ppod_config(amdsmi_processor_handle processor_handle, const amdsmi_fabric_ppod_config_t *config)
Apply PPOD setup parameters.
amdsmi_status_t amdsmi_free_fabric_telemetry(amdsmi_processor_handle processor_handle, amdsmi_fabric_telemetry_t *telemetry)
Free Fabric telemetry storage.
amdsmi_status_t amdsmi_get_fabric_telemetry_data(amdsmi_processor_handle processor_handle, amdsmi_fabric_telemetry_t *telemetry)
Get Fabric telemetry data.
amdsmi_status_t amdsmi_get_power_info(amdsmi_processor_handle processor_handle, amdsmi_power_info_t *info)
Returns the current power and voltage of the GPU.
amdsmi_status_t amdsmi_get_gpu_metrics(amdsmi_processor_handle processor_handle, uint32_t *metrics_size, amdsmi_metric_t *metrics)
Return metrics information.
amdsmi_status_t amdsmi_get_temp_metric(amdsmi_processor_handle processor_handle, amdsmi_temperature_type_t sensor_type, amdsmi_temperature_metric_t metric, int64_t *temperature)
Get the temperature metric value for the specified metric, from the specified temperature sensor on t...
amdsmi_status_t amdsmi_get_gpu_activity(amdsmi_processor_handle processor_handle, amdsmi_engine_usage_t *info)
Returns the current usage of the GPU engines (GFX, MM and MEM). Each usage is reported as a percentag...
amdsmi_status_t amdsmi_get_clock_info(amdsmi_processor_handle processor_handle, amdsmi_clk_type_t clk_type, amdsmi_clk_info_t *info)
Returns the measurements of the clocks in the GPU for the GFX and multimedia engines and Memory....
amdsmi_status_t amdsmi_is_gpu_power_management_enabled(amdsmi_processor_handle processor_handle, bool *enabled)
Returns is power management enabled.
amdsmi_status_t amdsmi_topo_get_link_type(amdsmi_processor_handle processor_handle_src, amdsmi_processor_handle processor_handle_dst, uint64_t *hops, amdsmi_link_type_t *type)
Retrieve the hops and the connection type between 2 processors.
amdsmi_status_t amdsmi_get_xgmi_fb_sharing_caps(amdsmi_processor_handle processor_handle, amdsmi_xgmi_fb_sharing_caps_t *caps)
Return XGMI capabilities.
amdsmi_status_t amdsmi_set_xgmi_fb_sharing_mode_v2(amdsmi_processor_handle *processor_list, uint32_t num_processors, amdsmi_xgmi_fb_sharing_mode_t mode)
Set XGMI framebuffer custom sharing mode.
amdsmi_status_t amdsmi_get_xgmi_fb_sharing_mode_info(amdsmi_processor_handle processor_handle_src, amdsmi_processor_handle processor_handle_dst, amdsmi_xgmi_fb_sharing_mode_t mode, uint8_t *fb_sharing)
Return XGMI framebuffer sharing information between two GPUs.
amdsmi_status_t amdsmi_topo_get_numa_node_number(amdsmi_processor_handle processor_handle, uint32_t *numa_node)
Retrieve the NUMA CPU node number for a device.
amdsmi_status_t amdsmi_get_link_topology(amdsmi_processor_handle processor_handle_src, amdsmi_processor_handle processor_handle_dst, amdsmi_link_topology_t *topology_info)
Return link topology information between two connected processors.
amdsmi_status_t amdsmi_get_link_metrics(amdsmi_processor_handle processor_handle, amdsmi_link_metrics_t *link_metrics)
Return link metric information.
amdsmi_status_t amdsmi_topo_get_p2p_status(amdsmi_processor_handle processor_handle_src, amdsmi_processor_handle processor_handle_dst, amdsmi_link_type_t *type, amdsmi_p2p_capability_t *cap)
Retrieve connection type and P2P capabilities between 2 GPUs.
amdsmi_status_t amdsmi_set_xgmi_fb_sharing_mode(amdsmi_processor_handle processor_handle, amdsmi_xgmi_fb_sharing_mode_t mode)
Set XGMI framebuffer sharing mode.
amdsmi_status_t amdsmi_get_link_topology_nearest(amdsmi_processor_handle processor_handle, amdsmi_link_type_t link_type, amdsmi_topology_nearest_t *topology_nearest_info)
Retrieve the set of GPUs that are nearest to a given device at a specific interconnectivity level.
amdsmi_status_t amdsmi_get_guest_data(amdsmi_vf_handle_t vf_handle, amdsmi_guest_data_t *info)
Returns guest OS information of the queried VF. The fw_info field from the amdsmi_guest_data structur...
amdsmi_status_t amdsmi_get_vf_fw_info(amdsmi_vf_handle_t vf_handle, amdsmi_fw_info_t *info)
Returns the firmware versions running on a VF. In case the VM is not started on the VF,...
amdsmi_status_t amdsmi_shut_down(void)
Shutdown the AMD SMI library.
amdsmi_status_t amdsmi_init(uint64_t init_flags)
Initialize the AMD SMI library.
amdsmi_status_t amdsmi_get_gpu_memory_partition_config(amdsmi_processor_handle processor_handle, amdsmi_memory_partition_config_t *config)
Returns current gpu memory partition capabilities.
amdsmi_status_t amdsmi_set_gpu_memory_partition_mode(amdsmi_processor_handle processor_handle, amdsmi_memory_partition_type_t mode)
Sets memory partition mode Set memory partition setting based on memory_partition mode from amdsmi_ge...
amdsmi_status_t amdsmi_get_nic_fw_info(amdsmi_processor_handle processor_handle, amdsmi_nic_fw_info_t *info)
Retrieves firmware version information for the NIC.
amdsmi_status_t amdsmi_get_nic_rdma_dev_info(amdsmi_processor_handle processor_handle, amdsmi_nic_rdma_devices_info_t *info)
Retrieves RDMA devices information for the NIC.
amdsmi_status_t amdsmi_get_nic_rdma_port_statistics(amdsmi_processor_handle processor_handle, uint32_t rdma_port_index, uint32_t *num_stats, amdsmi_nic_stat_t *stats)
Retrieve RDMA port statistics for the NIC.
amdsmi_status_t amdsmi_get_nic_port_info(amdsmi_processor_handle processor_handle, amdsmi_nic_port_info_t *info)
Retrieves PORT information for the NIC.
amdsmi_status_t amdsmi_get_nic_vendor_statistics(amdsmi_processor_handle processor_handle, uint32_t port_index, uint32_t *num_stats, amdsmi_nic_stat_t *stats)
Retrieve vendor specific statistics for the NIC port.
amdsmi_status_t amdsmi_get_nic_port_statistics(amdsmi_processor_handle processor_handle, uint32_t port_index, uint32_t *num_stats, amdsmi_nic_stat_t *stats)
Retrieve PORT statistics for the specified NIC port.
amdsmi_status_t amdsmi_get_nic_driver_info(amdsmi_processor_handle processor_handle, amdsmi_nic_driver_info_t *info)
Retrieves information about the NIC driver.
amdsmi_status_t amdsmi_get_nic_bus_info(amdsmi_processor_handle processor_handle, amdsmi_nic_bus_info_t *info)
Retrieves BUS information for the NIC.
amdsmi_status_t amdsmi_get_nic_asic_info(amdsmi_processor_handle processor_handle, amdsmi_nic_asic_info_t *info)
Retrieves ASIC information for the NIC.
amdsmi_status_t amdsmi_get_nic_numa_info(amdsmi_processor_handle processor_handle, amdsmi_nic_numa_info_t *info)
Retrieves NUMA information for the NIC.
amdsmi_status_t amdsmi_get_npm_info(amdsmi_node_handle node_handle, amdsmi_npm_info_t *info)
Retrieves node power management (NPM) status and power limit for the specified node.
amdsmi_status_t amdsmi_get_tray_info(amdsmi_node_handle node_handle, amdsmi_tray_info_t *info)
Returns the compute tray configuration for the given node.
amdsmi_status_t amdsmi_get_gpu_ptl_state(amdsmi_processor_handle processor_handle, bool *enabled)
Get PTL enable/disable state.
amdsmi_status_t amdsmi_set_gpu_ptl_state(amdsmi_processor_handle processor_handle, bool enable)
Set PTL enable/disable state.
amdsmi_status_t amdsmi_set_gpu_ptl_formats(amdsmi_processor_handle processor_handle, amdsmi_ptl_data_format_t data_format1, amdsmi_ptl_data_format_t data_format2)
Set PTL with specified preferred data formats.
amdsmi_status_t amdsmi_get_gpu_ptl_formats(amdsmi_processor_handle processor_handle, amdsmi_ptl_data_format_t *data_format1, amdsmi_ptl_data_format_t *data_format2)
Get PTL (Peak Tops Limiter) formats for the processor.
amdsmi_status_t amdsmi_get_gpu_cache_info(amdsmi_processor_handle processor_handle, amdsmi_gpu_cache_info_t *info)
Returns gpu cache info.
amdsmi_status_t amdsmi_set_power_cap(amdsmi_processor_handle processor_handle, uint32_t sensor_ind, uint64_t cap)
Set the maximum gpu power cap value. It is not supported on virtual machine guest.
amdsmi_status_t amdsmi_get_supported_power_cap(amdsmi_processor_handle processor_handle, uint32_t *sensor_count, uint32_t *sensor_inds, amdsmi_power_cap_type_t *sensor_types)
Query the supported power cap sensors and their types for a device.
amdsmi_status_t amdsmi_get_processor_handles(amdsmi_socket_handle socket_handle, uint32_t *processor_count, amdsmi_processor_handle *processor_handles)
Get the list of the processor handles associated to a socket.
amdsmi_status_t amdsmi_get_index_from_processor_handle(amdsmi_processor_handle processor_handle, uint32_t *processor_index)
Returns the index of the given processor handle.
amdsmi_status_t amdsmi_get_gpu_device_uuid(amdsmi_processor_handle processor_handle, unsigned int *uuid_length, char *uuid)
Returns the UUID of the device.
amdsmi_status_t amdsmi_get_processor_type(amdsmi_processor_handle processor_handle, processor_type_t *processor_type)
Get the processor type of the processor_handle.
amdsmi_status_t amdsmi_get_socket_info(amdsmi_socket_handle socket_handle, size_t len, char *name)
Get information about the given socket.
amdsmi_status_t amdsmi_get_node_handle(amdsmi_processor_handle processor_handle, amdsmi_node_handle *node_handle)
Get the node handle associated with processor handle.
amdsmi_status_t amdsmi_get_gpu_virtualization_mode(amdsmi_processor_handle processor_handle, amdsmi_virtualization_mode_t *mode)
Returns the virtualization mode for the target device.
amdsmi_status_t amdsmi_get_nic_processor_handles(amdsmi_socket_handle socket_handle, uint32_t *processor_count, amdsmi_processor_handle *processor_handles)
Get the list of the NIC processor handles associated to a socket.
amdsmi_status_t amdsmi_get_nic_device_bdf(amdsmi_processor_handle processor_handle, amdsmi_bdf_t *bdf)
Returns BDF of the given NIC device.
amdsmi_status_t amdsmi_get_processor_handle_from_uuid(const char *uuid, amdsmi_processor_handle *processor_handle)
Returns the processor handle from the given UUID.
amdsmi_status_t amdsmi_get_socket_handles(uint32_t *socket_count, amdsmi_socket_handle *socket_handles)
Get the list of socket handles in the system.
amdsmi_status_t amdsmi_get_vf_bdf(amdsmi_vf_handle_t vf_handle, amdsmi_bdf_t *bdf)
Returns BDF of the given device (VF).
amdsmi_status_t amdsmi_get_vf_handle_from_bdf(amdsmi_bdf_t bdf, amdsmi_vf_handle_t *vf_handle)
Returns VF handle from the given BDF.
amdsmi_status_t amdsmi_get_processor_handle_from_bdf(amdsmi_bdf_t bdf, amdsmi_processor_handle *processor_handle)
Get processor handle with the matching bdf.
amdsmi_status_t amdsmi_get_vf_handle_from_vf_index(amdsmi_processor_handle processor_handle, uint32_t fcn_idx, amdsmi_vf_handle_t *vf_handle)
Returns the handle of a virtual function given its index.
amdsmi_status_t amdsmi_get_processor_handles_by_type(amdsmi_socket_handle socket_handle, processor_type_t processor_type, amdsmi_processor_handle *processor_handles, uint32_t *processor_count)
Returns a list of processor handles of the specified type in the system.
amdsmi_status_t amdsmi_get_vf_uuid(amdsmi_vf_handle_t processor_handle, unsigned int *uuid_length, char *uuid)
Returns the UUID of the VF.
amdsmi_status_t amdsmi_get_gpu_device_bdf(amdsmi_processor_handle processor_handle, amdsmi_bdf_t *bdf)
Returns BDF of the given GPU device.
amdsmi_status_t amdsmi_get_processor_bdf(amdsmi_processor_handle processor_handle, amdsmi_bdf_t *bdf)
Returns BDF of the given device.
amdsmi_status_t amdsmi_get_vf_handle_from_uuid(const char *uuid, amdsmi_vf_handle_t *vf_handle)
Returns the handle of a virtual function from the given UUID.
amdsmi_status_t amdsmi_get_cpu_affinity_with_scope(amdsmi_processor_handle processor_handle, uint32_t cpu_set_size, uint64_t *cpu_set, amdsmi_affinity_scope_t scope)
Retrieves an array of uint64_t (sized to cpu_set_size) of bitmasks with the affinity within numa node...
amdsmi_status_t amdsmi_get_processor_handle_from_index(uint32_t processor_index, amdsmi_processor_handle *processor_handle)
Returns the processor handle from the given processor index.
amdsmi_status_t amdsmi_get_fabric_cper_entries(amdsmi_processor_handle processor_handle, uint32_t severity_mask, char *cper_data, uint64_t *buf_size, amdsmi_cper_hdr_t **cper_hdrs, uint64_t *entry_count, uint64_t *cursor)
Retrieve CPER entries for UALoE fabric events.
amdsmi_status_t amdsmi_get_gpu_ras_policy_info(amdsmi_processor_handle processor_handle, amdsmi_gpu_ras_policy_info_t *info)
Get the RAS policy info for a device.
amdsmi_status_t amdsmi_get_afids_from_cper(char *cper_buffer, uint32_t buf_size, uint64_t *afids, uint32_t *num_afids)
Get the AFIDs from CPER buffer.
amdsmi_status_t amdsmi_get_bad_page_threshold(amdsmi_processor_handle processor_handle, uint32_t *threshold)
Get the bad page threshold for a device.
amdsmi_status_t amdsmi_get_gpu_cper_entries(amdsmi_processor_handle processor_handle, uint32_t severity_mask, char *cper_data, uint64_t *buf_size, amdsmi_cper_hdr_t **cper_hdrs, uint64_t *entry_count, uint64_t *cursor)
Retrieve CPER entries cached in the driver.
amdsmi_status_t amdsmi_get_gpu_ras_feature_info(amdsmi_processor_handle processor_handle, amdsmi_ras_feature_t *ras_feature)
Returns RAS features info.
amdsmi_status_t amdsmi_get_gpu_bad_page_info(amdsmi_processor_handle processor_handle, uint32_t *bad_page_size, amdsmi_eeprom_table_record_t *bad_pages)
Returns the bad page info.
amdsmi_status_t amdsmi_get_gpu_driver_info(amdsmi_processor_handle processor_handle, amdsmi_driver_info_t *info)
Returns the driver version information.
amdsmi_status_t amdsmi_get_gpu_driver_model(amdsmi_processor_handle processor_handle, amdsmi_driver_model_type_t *model)
Returns the driver model information.
amdsmi_status_t amdsmi_get_vf_hbm_info(amdsmi_vf_handle_t vf_handle, amdsmi_vf_hbm_info_t *info)
Returns the HBM information for a VF.
amdsmi_status_t amdsmi_get_vf_info(amdsmi_vf_handle_t vf_handle, amdsmi_vf_info_t *config)
Returns the configuration structure for a VF.
amdsmi_status_t amdsmi_get_vf_data(amdsmi_vf_handle_t vf_handle, amdsmi_vf_data_t *info)
Returns the data structure for a VF.
amdsmi_status_t amdsmi_get_vf_partition_info(amdsmi_processor_handle processor_handle, unsigned int vf_buffer_num, amdsmi_partition_info_t *info)
Returns the current framebuffer partitioning structure as currently configured by the driver.
amdsmi_status_t amdsmi_get_num_vf(amdsmi_processor_handle processor_handle, uint32_t *num_vf_enabled, uint32_t *num_vf_supported)
Returns the number of VFs enabled by gpuv in the ASIC.
amdsmi_status_t amdsmi_get_partition_profile_info(amdsmi_processor_handle processor_handle, amdsmi_profile_info_t *profile_info)
Return the list of supported profiles on the given GPU device.
amdsmi_status_t amdsmi_clear_vf_fb(amdsmi_vf_handle_t vf_handle)
Clear the framebuffer of a VF. If trying to clear the framebuffer of an active function,...
amdsmi_status_t amdsmi_set_num_vf(amdsmi_processor_handle processor_handle, uint32_t num_vf)
Enable a given number of VF.
amdsmi_status_t amdsmi_get_lib_version(amdsmi_version_t *version)
Get the build version information for the currently running build of AMDSMI.
uint32_t num_profiles
The length of profiles array.
Definition amdsmi.h:3066
uint32_t default_profile_index
The index of the default profile in the profiles array.
Definition amdsmi.h:3070
Accelerator Partition Profile Configurations.
Definition amdsmi.h:1110
uint32_t default_profile_index
The index of the default profile in the profiles array.
Definition amdsmi.h:1115
uint32_t num_profiles
The length of profiles array.
Definition amdsmi.h:1111
uint32_t vf_mode
Bitmask of VF modes (see amdsmi_vf_mode_t)
Definition amdsmi.h:3061
Accelerator Partition Resource Profile.
Definition amdsmi.h:1079
uint32_t profile_index
amdsmi_accelerator_partition_profile_t
Definition amdsmi.h:1083
uint32_t num_partitions
On MI300X: SPX=>1, DPX=>2, QPX=>4, CPX=>8; length of resources.
Definition amdsmi.h:1081
amdsmi_nps_caps_t memory_caps
Possible memory partition capabilities.
Definition amdsmi.h:1082
amdsmi_accelerator_partition_type_t profile_type
SPX, DPX, QPX, CPX and so on.
Definition amdsmi.h:1080
uint32_t num_resources
length of index_of_resources_profile
Definition amdsmi.h:1085
Accelerator Partition Resources. This struct is used to identify various partition resource profiles.
Definition amdsmi.h:1096
uint32_t partition_resource
Resources a partition can use, which may be shared.
Definition amdsmi.h:1099
uint32_t num_partitions_share_resource
If it is greater than 1, then resource is shared.
Definition amdsmi.h:1101
ASIC Information.
Definition amdsmi.h:916
uint64_t target_graphics_version
Definition amdsmi.h:927
uint32_t vendor_id
Use 32 bit to be compatible with other platform.
Definition amdsmi.h:918
uint64_t device_id
The device ID of a GPU.
Definition amdsmi.h:921
uint32_t oam_id
Corresponds to socket number, 0xFFFFFFFF if not supported.
Definition amdsmi.h:924
uint32_t num_of_compute_units
number of compute units
Definition amdsmi.h:925
uint32_t subvendor_id
The subsystem vendor ID.
Definition amdsmi.h:920
uint32_t physical_acc_id
devices), 0xFFFFFFFF if not supported
Definition amdsmi.h:933
uint32_t subsystem_id
The subsystem ID.
Definition amdsmi.h:931
uint64_t flags
Chip flags.
Definition amdsmi.h:932
uint32_t rev_id
The revision ID of a GPU.
Definition amdsmi.h:922
Definition amdsmi.h:774
Board Information.
Definition amdsmi.h:1125
Clock Information.
Definition amdsmi.h:1019
uint32_t clk
In MHz.
Definition amdsmi.h:1020
uint8_t clk_locked
True/False.
Definition amdsmi.h:1023
uint8_t clk_deep_sleep
True/False.
Definition amdsmi.h:1024
uint32_t min_clk
In MHz.
Definition amdsmi.h:1021
uint32_t max_clk
In MHz.
Definition amdsmi.h:1022
Cper.
Definition amdsmi.h:1335
Definition amdsmi.h:1360
amdsmi_cper_guid_t notify_type
CMC, MCE, can use amdsmi_cper_notify_type_t to decode.
Definition amdsmi.h:1372
uint64_t persistence_info
Reserved.
Definition amdsmi.h:1375
uint32_t signature_end
0xFFFFFFFF
Definition amdsmi.h:1363
uint32_t flags
Reserved.
Definition amdsmi.h:1374
amdsmi_cper_guid_t partition_id
Reserved.
Definition amdsmi.h:1370
uint32_t record_length
Total size of CPER Entry.
Definition amdsmi.h:1367
Definition amdsmi.h:1339
DFC Firmware Data.
Definition amdsmi.h:2920
uint32_t customer_ordinal
only used in driver version on NV32+
Definition amdsmi.h:2923
DFC Firmware Header.
Definition amdsmi.h:2888
DFC Firmware.
Definition amdsmi.h:2937
DFC Firmware TA UUID.
Definition amdsmi.h:2911
DFC Firmware White List.
Definition amdsmi.h:2901
The dpm policy.
Definition amdsmi.h:1214
DPM Policy.
Definition amdsmi.h:1226
uint32_t num_supported
The number of supported policies.
Definition amdsmi.h:1227
uint32_t current
The current policy index.
Definition amdsmi.h:1228
Driver Information.
Definition amdsmi.h:965
Structure representing an EEPROM table record for tracking memory errors.
Definition amdsmi.h:2951
uint64_t retired_page
Bad page frame address.
Definition amdsmi.h:2952
Engine Usage amdsmi_engine_usage_t: This structure holds common GPU activity values seen in both BM o...
Definition amdsmi.h:1007
uint32_t gfx_activity
In %.
Definition amdsmi.h:1008
uint32_t umc_activity
In %.
Definition amdsmi.h:1009
uint32_t mm_activity
In %.
Definition amdsmi.h:1010
This structure holds error counts.
Definition amdsmi.h:1033
uint64_t uncorrectable_count
Accumulated uncorrectable errors.
Definition amdsmi.h:1035
uint64_t correctable_count
Accumulated correctable errors.
Definition amdsmi.h:1034
uint64_t deferred_count
Accumulated deferred errors.
Definition amdsmi.h:1036
Event Entry.
Definition amdsmi.h:2700
uint64_t timestamp
UTC microseconds.
Definition amdsmi.h:2703
Fabric device information structure.
Definition amdsmi.h:1647
amdsmi_bdf_t bdf
BDF (Bus, Device, Function) of the Fabric device.
Definition amdsmi.h:1648
Fabric device configuration information (version 1)
Definition amdsmi.h:1634
amdsmi_fabric_accelerator_vpod_state_t accel_state
Accelerator vPoD State.
Definition amdsmi.h:1636
amdsmi_fabric_vpod_data_t vpod
Virtual PoD data.
Definition amdsmi.h:1638
amdsmi_fabric_type_t fabric_type
UALOE or UALINK.
Definition amdsmi.h:1635
amdsmi_fabric_ppod_data_t ppod
Physical PoD data (16 bytes)
Definition amdsmi.h:1637
amdsmi_fabric_station_data_t station
DF/station data (64 bytes)
Definition amdsmi.h:1639
Definition amdsmi.h:1438
PPOD setup request.
Definition amdsmi.h:1661
uint32_t mask
::AMDSMI_FABRIC_PPOD_FIELD_* bits for parameters to write (32 bits)
Definition amdsmi.h:1663
bool commit
When true, write setup/commit after masked parameters.
Definition amdsmi.h:1664
amdsmi_fabric_ppod_data_t data
PPOD data payload.
Definition amdsmi.h:1665
uint32_t version
Must be AMDSMI_FABRIC_PPOD_CONFIG_V1.
Definition amdsmi.h:1662
Physical PoD (PPOD) data payload.
Definition amdsmi.h:1571
uint32_t local_accelerator_count
Count of valid local accelerators.
Definition amdsmi.h:1576
uint32_t latency
Latency in nanoseconds (depends on switch presence and type)
Definition amdsmi.h:1578
uint32_t ppod_size
Physical PoD size.
Definition amdsmi.h:1574
uint32_t accelerator_id
Accelerator identifier (range 0 to 1023)
Definition amdsmi.h:1572
uint32_t bandwidth
Station bandwidth share in Mb/s.
Definition amdsmi.h:1577
DF/Station reconfiguration request.
Definition amdsmi.h:1685
amdsmi_fabric_station_data_t data
DF/station data payload.
Definition amdsmi.h:1689
uint32_t version
Must be AMDSMI_FABRIC_STATION_CONFIG_V1.
Definition amdsmi.h:1686
DF/station data payload.
Definition amdsmi.h:1607
uint32_t station_flags
DF/station flags.
Definition amdsmi.h:1608
uint8_t num_stations
Number of stations.
Definition amdsmi.h:1609
Fabric telemetry dataset structure.
Definition amdsmi.h:1463
amdsmi_fabric_telemetry_category_t category
Telemetry category.
Definition amdsmi.h:1464
unsigned instance_count
Number of instances for this category.
Definition amdsmi.h:1467
amdsmi_fabric_telemetry_instance_t * instances
Array of pointers to instances.
Definition amdsmi.h:1468
uint64_t generation_count
Sequence number incremented each time telemetry is written.
Definition amdsmi.h:1465
Fabric telemetry instance structure.
Definition amdsmi.h:1449
amdsmi_fabric_label_t name
Name for this instance.
Definition amdsmi.h:1450
amdsmi_fabric_telemetry_item_t * items
Pointer to array of telemetry items.
Definition amdsmi.h:1453
unsigned logical_idx
Logical index for this instance.
Definition amdsmi.h:1451
unsigned item_count
Number of telemetry items in the set.
Definition amdsmi.h:1452
Fabric telemetry item structure.
Definition amdsmi.h:1424
uint64_t value
Value of the telemetry item.
Definition amdsmi.h:1426
uint64_t id
Identifier of the telemetry item.
Definition amdsmi.h:1425
Fabric telemetry structure.
Definition amdsmi.h:1480
VPOD configuration request.
Definition amdsmi.h:1673
uint32_t version
Must be AMDSMI_FABRIC_VPOD_CONFIG_V1.
Definition amdsmi.h:1674
amdsmi_fabric_vpod_data_t data
VPOD data payload.
Definition amdsmi.h:1677
Virtual PoD (VPOD) data payload.
Definition amdsmi.h:1589
amdsmi_fabric_npa_address_mode_t addr_mode
Source aliasing or identification mode.
Definition amdsmi.h:1596
uint32_t vpod_size
Virtual PoD size.
Definition amdsmi.h:1591
uint32_t vpod_id
Virtual PoD Identifier.
Definition amdsmi.h:1590
This structure holds information about clock frequencies.
Definition amdsmi.h:827
uint32_t current
The current frequency index in MHz.
Definition amdsmi.h:830
uint32_t num_supported
The number of supported frequencies.
Definition amdsmi.h:829
bool has_deep_sleep
Deep Sleep frequency is only supported by some GPUs.
Definition amdsmi.h:828
Firmware Error Record.
Definition amdsmi.h:2982
Definition amdsmi.h:1201
Firmware Information.
Definition amdsmi.h:1199
Firmware Load Error Record.
Definition amdsmi.h:2969
uint64_t timestamp
UTC microseconds.
Definition amdsmi.h:2970
uint16_t status
amdsmi_guest_fw_load_status
Definition amdsmi.h:2973
Definition amdsmi.h:1180
uint32_t num_cache_instance
total number of instance of this cache type
Definition amdsmi.h:1188
uint32_t cache_size
In KB.
Definition amdsmi.h:1182
uint32_t max_num_cu_shared
instance
Definition amdsmi.h:1185
uint32_t cache_properties
amdsmi_cache_property_type_t which is a bitmask
Definition amdsmi.h:1181
GPU Cache Information.
Definition amdsmi.h:1178
Ras policy info structure for storing version and different ras policy version structures.
Definition amdsmi.h:1317
Ras policy v4.0.
Definition amdsmi.h:1292
uint16_t dram_critical_region_threshold
Critical region UCE threshold.
Definition amdsmi.h:1294
uint16_t dram_non_critical_region_threshold
Non-critical region UCE threshold.
Definition amdsmi.h:1293
Ras policy v5.0 (entity-based policy)
Definition amdsmi.h:1302
uint32_t hwa_threshold
Hardware Agent threshold.
Definition amdsmi.h:1307
uint32_t num_entities
Number of monitored RAS entities.
Definition amdsmi.h:1303
uint32_t max_pages_per_ret_event
Max pages retired per retirement event.
Definition amdsmi.h:1305
uint32_t od_sram_ecc_threshold
On-die SRAM ECC threshold.
Definition amdsmi.h:1306
uint32_t event_rma_threshold_per_entity
RMA event threshold per entity.
Definition amdsmi.h:1304
uint32_t wdt_threshold
Watchdog timer threshold.
Definition amdsmi.h:1308
Guard Information.
Definition amdsmi.h:2765
Guest Data.
Definition amdsmi.h:2877
uint32_t fb_usage
guest framebuffer usage in MB
Definition amdsmi.h:2879
Handshake.
Definition amdsmi.h:2719
Memory Partition Configuration. This structure is used to identify various memory partition configura...
Definition amdsmi.h:1062
Metric.
Definition amdsmi.h:3035
amdsmi_metric_res_group_t res_group
Resource group this metric belongs to.
Definition amdsmi.h:3042
amdsmi_metric_res_subgroup_t res_subgroup
Resource subgroup this metric belongs to.
Definition amdsmi.h:3043
uint32_t flags
used to determine type of the metric (amdsmi_metric_type_t)
Definition amdsmi.h:3039
uint32_t res_instance
Resource instance this metric belongs to.
Definition amdsmi.h:3044
uint32_t vf_mask
Mask of all active VFs + PF that this metric applies to.
Definition amdsmi.h:3040
NIC asic information.
Definition amdsmi.h:3112
NIC bus information.
Definition amdsmi.h:3130
uint32_t max_pcie_speed
maximum PCIe speed in GT/s
Definition amdsmi.h:3133
NIC driver information.
Definition amdsmi.h:3238
NIC firmware entry.
Definition amdsmi.h:3163
NIC firmware information.
Definition amdsmi.h:3173
NIC firmware.
Definition amdsmi.h:3153
NIC NUMA information.
Definition amdsmi.h:3143
NIC port information collection.
Definition amdsmi.h:3228
NIC port information.
Definition amdsmi.h:3204
uint32_t active_fec
Active FEC modes bitmask (see about FEC modes in the description)
Definition amdsmi.h:3216
NIC RDMA device information.
Definition amdsmi.h:3266
NIC RDMA devices information collection.
Definition amdsmi.h:3281
NIC RDMA port information.
Definition amdsmi.h:3253
uint16_t active_mtu
Active MTU in bytes.
Definition amdsmi.h:3258
uint16_t max_mtu
Maximum MTU in bytes.
Definition amdsmi.h:3257
Structure for NIC statistic name-value pairs.
Definition amdsmi.h:3102
NPM info.
Definition amdsmi.h:1152
uint32_t ubb_power_threshold
The UBB node power threshold (upper limit) in Watts.
Definition amdsmi.h:1155
amdsmi_npm_status_t status
NPM status (enabled/disabled).
Definition amdsmi.h:1153
uint64_t limit
Maximum allowed node-level power draw in Watts.
Definition amdsmi.h:1154
Definition amdsmi.h:1046
uint32_t nps8_cap
bool 1 = true; 0 = false
Definition amdsmi.h:1050
uint32_t nps4_cap
bool 1 = true; 0 = false
Definition amdsmi.h:1049
uint32_t nps2_cap
bool 1 = true; 0 = false
Definition amdsmi.h:1048
uint32_t nps1_cap
bool 1 = true; 0 = false
Definition amdsmi.h:1047
IO Link P2P Capability.
Definition amdsmi.h:1139
uint8_t is_iolink_atomics_64bit
1 = true, 0 = false, UINT8_MAX = Not defined
Definition amdsmi.h:1142
uint8_t is_iolink_atomics_32bit
1 = true, 0 = false, UINT8_MAX = Not defined
Definition amdsmi.h:1141
uint8_t is_iolink_bi_directional
1 = true, 0 = false, UINT8_MAX = Not defined
Definition amdsmi.h:1144
uint8_t is_iolink_coherent
1 = true, 0 = false, UINT8_MAX = Not defined
Definition amdsmi.h:1140
uint8_t is_iolink_dma
1 = true, 0 = false, UINT8_MAX = Not defined
Definition amdsmi.h:1143
Partition Information.
Definition amdsmi.h:2754
This structure holds information about the possible PCIe bandwidths. Specifically,...
Definition amdsmi.h:845
amdsmi_frequencies_t transfer_rate
Transfer rates (T/s) that are possible.
Definition amdsmi.h:846
Definition amdsmi.h:803
uint64_t pcie_nak_received_count
by the receiver
Definition amdsmi.h:814
uint64_t pcie_replay_count
total number of the replays issued on the PCIe link
Definition amdsmi.h:807
uint16_t pcie_width
current PCIe width
Definition amdsmi.h:804
uint32_t pcie_speed
current PCIe speed in MT/s
Definition amdsmi.h:805
uint32_t pcie_bandwidth
current PCIe bandwidth in Mb/s
Definition amdsmi.h:806
uint64_t pcie_l0_to_recovery_count
transitioned from L0 to the recovery state
Definition amdsmi.h:808
uint64_t pcie_nak_sent_count
the device
Definition amdsmi.h:812
uint64_t pcie_replay_roll_over_count
on the PCIe link
Definition amdsmi.h:810
uint32_t pcie_lc_perf_other_end_recovery_count
PCIe other end recovery counter.
Definition amdsmi.h:816
Definition amdsmi.h:795
uint16_t max_pcie_width
maximum number of PCIe lanes
Definition amdsmi.h:796
uint32_t max_pcie_interface_version
maximum PCIe link generation
Definition amdsmi.h:800
amdsmi_card_form_factor_t slot_type
card form factor
Definition amdsmi.h:799
uint32_t max_pcie_speed
maximum PCIe speed in GT/s
Definition amdsmi.h:797
uint32_t pcie_interface_version
PCIe interface version.
Definition amdsmi.h:798
pcie information
Definition amdsmi.h:794
PF FB Information.
Definition amdsmi.h:2728
uint32_t pf_fb_reserved
Total fb consumed by PF.
Definition amdsmi.h:2730
uint32_t min_vf_fb_usable
Minimum usable fb size in MB.
Definition amdsmi.h:2734
uint32_t fb_alignment
FB alignment.
Definition amdsmi.h:2732
uint32_t total_fb_size
Total GPU fb size in MB.
Definition amdsmi.h:2729
uint32_t max_vf_fb_usable
Maximum usable fb size in MB.
Definition amdsmi.h:2733
uint32_t pf_fb_offset
PF FB offset.
Definition amdsmi.h:2731
Power Cap Information.
Definition amdsmi.h:876
uint64_t power_cap
current power cap Units uW {@linux_bm} or W {@host}
Definition amdsmi.h:877
uint64_t dpm_cap
dpm power cap Units MHz {@linux_bm} or Hz {@host}
Definition amdsmi.h:879
uint64_t max_power_cap
maximum power cap Units uW {@linux_bm} or W {@host}
Definition amdsmi.h:881
uint64_t default_power_cap
default power cap Units uW {@linux_bm} or W {@host}
Definition amdsmi.h:878
uint64_t min_power_cap
minimum power cap Units uW {@linux_bm} or W {@host}
Definition amdsmi.h:880
Power Information.
Definition amdsmi.h:946
uint64_t soc_voltage
SOC voltage measurement in mV {@linux_bm} or V {@host}.
Definition amdsmi.h:953
uint64_t socket_power
Current power usage in W {@linux_bm}, uW {@host}.
Definition amdsmi.h:947
uint32_t power_limit
The power limit in W {@linux_bm}, Linux only.
Definition amdsmi.h:955
uint64_t mem_voltage
MEM voltage measurement in mV {@linux_bm} or V {@host}.
Definition amdsmi.h:954
uint32_t current_socket_power
300+ Series cards
Definition amdsmi.h:948
uint32_t average_socket_power
Definition amdsmi.h:950
uint64_t gfx_voltage
GFX voltage measurement in mV {@linux_bm} or V {@host}.
Definition amdsmi.h:952
uint32_t ubb_power
The UBB node power in W, MI350X+.
Definition amdsmi.h:956
Profile Caps Information.
Definition amdsmi.h:2848
Profile Information.
Definition amdsmi.h:2862
Definition amdsmi.h:1244
This structure holds ras feature information.
Definition amdsmi.h:1237
uint32_t ras_eeprom_version
Definition amdsmi.h:1238
uint32_t ecc_correction_schema_flag
Definition amdsmi.h:1241
Schedule Information.
Definition amdsmi.h:2811
uint64_t boot_up_time
in microseconds
Definition amdsmi.h:2813
Topology Nearest.
Definition amdsmi.h:3007
Compute tray information.
Definition amdsmi.h:1164
uint32_t max_acc_per_tray
Helios), 0xFFFFFFFF if not supported.
Definition amdsmi.h:1165
amdsmi_compute_tray_type_t tray_type
supported
Definition amdsmi.h:1168
VBios Information.
Definition amdsmi.h:900
This structure holds version information.
Definition amdsmi.h:3053
uint32_t minor
Minor version.
Definition amdsmi.h:3055
uint32_t major
Major version.
Definition amdsmi.h:3054
uint32_t release
Patch, build or stepping version.
Definition amdsmi.h:3056
VF Data.
Definition amdsmi.h:2837
VF FB Information.
Definition amdsmi.h:2743
uint32_t fb_size
Size in MB Must be divisible by 16 and not less than 256.
Definition amdsmi.h:2745
uint32_t fb_offset
Offset in MB from start of the framebuffer.
Definition amdsmi.h:2744
VF Handle.
Definition amdsmi.h:2691
VF HBM Information.
Definition amdsmi.h:2797
uint64_t phy_size
physical size represented in bytes
Definition amdsmi.h:2799
uint32_t numa_id
association exists (e.g. DAX mode)
Definition amdsmi.h:2800
VF Information.
Definition amdsmi.h:2786
uint32_t gfx_timeslice
Graphics timeslice in us, maximum value is 1000 ms.
Definition amdsmi.h:2788
VRam Information.
Definition amdsmi.h:989
uint32_t vram_bit_width
In bits.
Definition amdsmi.h:993
uint64_t vram_size
vram size in MB
Definition amdsmi.h:992
uint64_t vram_max_bandwidth
The VRAM max bandwidth at current memory clock (GB/s)
Definition amdsmi.h:994
Definition amdsmi.h:3019
bdf types
Definition amdsmi.h:773
Definition amdsmi.h:1350
Definition amdsmi.h:1650
This union holds memory partition bitmask.
Definition amdsmi.h:1045
XGMI FB Sharing Caps.
Definition amdsmi.h:3018